1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2014-2015 Freescale Semiconductor, Inc.
4 * Copyright 2020-2021 NXP
8 #include <clock_legacy.h>
9 #include <efi_loader.h>
11 #include <asm/cache.h>
12 #include <linux/libfdt.h>
13 #include <fdt_support.h>
15 #ifdef CONFIG_FSL_LSCH3
16 #include <asm/arch/fdt.h>
18 #ifdef CONFIG_FSL_ESDHC
19 #include <fsl_esdhc.h>
21 #ifdef CONFIG_SYS_DPAA_FMAN
25 #include <asm/arch/mp.h>
28 #include <asm/arch-fsl-layerscape/soc.h>
29 #if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
30 #include <asm/armv8/sec_firmware.h>
32 #include <asm/arch/speed.h>
33 #include <fsl_qbman.h>
35 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
39 /* Do NOT apply fixup for backplane modes specified in DT */
40 if (phyc == PHY_INTERFACE_MODE_XGMII) {
41 conn = fdt_getprop(blob, offset, "phy-connection-type", NULL);
42 if (is_backplane_mode(conn))
45 return fdt_setprop_string(blob, offset, "phy-connection-type",
46 phy_string_for_interface(phyc));
50 void ft_fixup_cpu(void *blob)
53 __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
57 u32 mask = cpu_pos_mask();
60 off = fdt_path_offset(blob, "/cpus");
62 puts("couldn't find /cpus node\n");
66 fdt_support_default_count_cells(blob, off, &addr_cells, NULL);
68 off = fdt_node_offset_by_prop_value(blob, off_prev, "device_type",
70 while (off != -FDT_ERR_NOTFOUND) {
71 reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
73 core_id = fdt_read_number(reg, addr_cells);
74 if (!test_bit(id_to_core(core_id), &mask)) {
75 fdt_del_node(blob, off);
80 off = fdt_node_offset_by_prop_value(blob, off_prev,
81 "device_type", "cpu", 4);
84 #if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT) && \
85 defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
89 /* Check the psci version to determine if the psci is supported */
90 psci_ver = sec_firmware_support_psci_version();
91 if (psci_ver == 0xffffffff) {
92 /* remove psci DT node */
93 node = fdt_path_offset(blob, "/psci");
95 goto remove_psci_node;
97 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
99 goto remove_psci_node;
101 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
103 goto remove_psci_node;
105 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
107 goto remove_psci_node;
111 fdt_del_node(blob, node);
116 off = fdt_path_offset(blob, "/cpus");
118 puts("couldn't find /cpus node\n");
121 fdt_support_default_count_cells(blob, off, &addr_cells, NULL);
123 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
124 while (off != -FDT_ERR_NOTFOUND) {
125 reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
127 core_id = fdt_read_number(reg, addr_cells);
128 if (core_id == 0 || (is_core_online(core_id))) {
130 val += id_to_core(core_id) *
131 SPIN_TABLE_ELEM_SIZE;
132 val = cpu_to_fdt64(val);
133 fdt_setprop_string(blob, off, "enable-method",
135 fdt_setprop(blob, off, "cpu-release-addr",
138 debug("skipping offline core\n");
141 puts("Warning: found cpu node without reg property\n");
143 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
147 fdt_add_mem_rsv(blob, (uintptr_t)secondary_boot_code_start,
148 secondary_boot_code_size);
149 #if CONFIG_IS_ENABLED(EFI_LOADER)
150 efi_add_memory_map((uintptr_t)secondary_boot_code_start,
151 secondary_boot_code_size, EFI_RESERVED_MEMORY_TYPE);
156 void fsl_fdt_disable_usb(void *blob)
160 * SYSCLK is used as a reference clock for USB. When the USB
161 * controller is used, SYSCLK must meet the additional requirement
164 if (get_board_sys_clk() != 100000000)
165 fdt_for_each_node_by_compatible(off, blob, -1, "snps,dwc3")
166 fdt_status_disabled(blob, off);
169 #ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
170 static void fdt_fixup_gic(void *blob)
174 struct ccsr_gur __iomem *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR);
176 struct ccsr_scfg __iomem *scfg = (void *)CFG_SYS_FSL_SCFG_ADDR;
179 val = gur_in32(&gur->svr);
181 if (!IS_SVR_DEV(val, SVR_DEV(SVR_LS1043A))) {
183 } else if (SVR_REV(val) != REV1_0) {
184 val = scfg_in32(&scfg->gic_align) & (0x01 << GIC_ADDR_BIT);
189 offset = fdt_subnode_offset(blob, 0, "interrupt-controller@1400000");
191 printf("WARNING: fdt_subnode_offset can't find node %s: %s\n",
192 "interrupt-controller@1400000", fdt_strerror(offset));
196 /* Fixup gic node align with 64K */
198 reg[0] = cpu_to_fdt64(GICD_BASE_64K);
199 reg[1] = cpu_to_fdt64(GICD_SIZE_64K);
200 reg[2] = cpu_to_fdt64(GICC_BASE_64K);
201 reg[3] = cpu_to_fdt64(GICC_SIZE_64K);
202 reg[4] = cpu_to_fdt64(GICH_BASE_64K);
203 reg[5] = cpu_to_fdt64(GICH_SIZE_64K);
204 reg[6] = cpu_to_fdt64(GICV_BASE_64K);
205 reg[7] = cpu_to_fdt64(GICV_SIZE_64K);
207 /* Fixup gic node align with default */
208 reg[0] = cpu_to_fdt64(GICD_BASE);
209 reg[1] = cpu_to_fdt64(GICD_SIZE);
210 reg[2] = cpu_to_fdt64(GICC_BASE);
211 reg[3] = cpu_to_fdt64(GICC_SIZE);
212 reg[4] = cpu_to_fdt64(GICH_BASE);
213 reg[5] = cpu_to_fdt64(GICH_SIZE);
214 reg[6] = cpu_to_fdt64(GICV_BASE);
215 reg[7] = cpu_to_fdt64(GICV_SIZE);
218 err = fdt_setprop(blob, offset, "reg", reg, sizeof(reg));
220 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
221 "reg", "interrupt-controller@1400000",
230 #ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI
231 static int _fdt_fixup_msi_node(void *blob, const char *name,
232 int irq_0, int irq_1, int rev)
234 int err, offset, len;
238 offset = fdt_path_offset(blob, name);
240 printf("WARNING: fdt_path_offset can't find path %s: %s\n",
241 name, fdt_strerror(offset));
245 /*fixup the property of interrupts*/
247 tmp[0][0] = cpu_to_fdt32(0x0);
248 tmp[0][1] = cpu_to_fdt32(irq_0);
249 tmp[0][2] = cpu_to_fdt32(0x4);
252 tmp[1][0] = cpu_to_fdt32(0x0);
253 tmp[1][1] = cpu_to_fdt32(irq_1);
254 tmp[1][2] = cpu_to_fdt32(0x4);
255 tmp[2][0] = cpu_to_fdt32(0x0);
256 tmp[2][1] = cpu_to_fdt32(irq_1 + 1);
257 tmp[2][2] = cpu_to_fdt32(0x4);
258 tmp[3][0] = cpu_to_fdt32(0x0);
259 tmp[3][1] = cpu_to_fdt32(irq_1 + 2);
260 tmp[3][2] = cpu_to_fdt32(0x4);
263 len = sizeof(tmp[0]);
266 err = fdt_setprop(blob, offset, "interrupts", tmp, len);
268 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
269 "interrupts", name, fdt_strerror(err));
273 /*fixup the property of reg*/
274 p = (char *)fdt_getprop(blob, offset, "reg", &len);
276 printf("WARNING: fdt_getprop can't get %s from node %s\n",
281 memcpy((char *)tmp, p, len);
284 *((u32 *)tmp + 3) = cpu_to_fdt32(0x1000);
286 *((u32 *)tmp + 3) = cpu_to_fdt32(0x8);
288 err = fdt_setprop(blob, offset, "reg", tmp, len);
290 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
291 "reg", name, fdt_strerror(err));
295 /*fixup the property of compatible*/
297 err = fdt_setprop_string(blob, offset, "compatible",
298 "fsl,ls1043a-v1.1-msi");
300 err = fdt_setprop_string(blob, offset, "compatible",
303 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
304 "compatible", name, fdt_strerror(err));
311 static int _fdt_fixup_pci_msi(void *blob, const char *name, int rev)
313 int offset, len, err;
318 offset = fdt_path_offset(blob, name);
320 printf("WARNING: fdt_path_offset can't find path %s: %s\n",
321 name, fdt_strerror(offset));
325 p = (char *)fdt_getprop(blob, offset, "interrupt-map", &len);
326 if (!p || len != sizeof(tmp)) {
327 printf("WARNING: fdt_getprop can't get %s from node %s\n",
328 "interrupt-map", name);
332 memcpy((char *)tmp, p, len);
334 val = fdt32_to_cpu(tmp[0][6]);
336 tmp[1][6] = cpu_to_fdt32(val + 1);
337 tmp[2][6] = cpu_to_fdt32(val + 2);
338 tmp[3][6] = cpu_to_fdt32(val + 3);
340 tmp[1][6] = cpu_to_fdt32(val);
341 tmp[2][6] = cpu_to_fdt32(val);
342 tmp[3][6] = cpu_to_fdt32(val);
345 err = fdt_setprop(blob, offset, "interrupt-map", tmp, sizeof(tmp));
347 printf("WARNING: fdt_setprop can't set %s from node %s: %s.\n",
348 "interrupt-map", name, fdt_strerror(err));
354 /* Fixup msi node for ls1043a rev1.1*/
356 static void fdt_fixup_msi(void *blob)
358 struct ccsr_gur __iomem *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR);
361 rev = gur_in32(&gur->svr);
363 if (!IS_SVR_DEV(rev, SVR_DEV(SVR_LS1043A)))
368 _fdt_fixup_msi_node(blob, "/soc/msi-controller1@1571000",
370 _fdt_fixup_msi_node(blob, "/soc/msi-controller2@1572000",
372 _fdt_fixup_msi_node(blob, "/soc/msi-controller3@1573000",
375 _fdt_fixup_pci_msi(blob, "/soc/pcie@3400000", rev);
376 _fdt_fixup_pci_msi(blob, "/soc/pcie@3500000", rev);
377 _fdt_fixup_pci_msi(blob, "/soc/pcie@3600000", rev);
381 #if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
382 /* Remove JR node used by SEC firmware */
383 void fdt_fixup_remove_jr(void *blob)
385 int jr_node, addr_cells, len;
386 int crypto_node = fdt_path_offset(blob, "crypto");
387 u64 jr_offset, used_jr;
390 /* Return if crypto node not found */
394 used_jr = sec_firmware_used_jobring_offset();
395 fdt_support_default_count_cells(blob, crypto_node, &addr_cells, NULL);
397 jr_node = fdt_node_offset_by_compatible(blob, crypto_node,
398 "fsl,sec-v4.0-job-ring");
400 while (jr_node != -FDT_ERR_NOTFOUND) {
401 reg = (fdt32_t *)fdt_getprop(blob, jr_node, "reg", &len);
403 jr_offset = fdt_read_number(reg, addr_cells);
404 if (jr_offset == used_jr) {
405 fdt_del_node(blob, jr_node);
409 jr_node = fdt_node_offset_by_compatible(blob, jr_node,
410 "fsl,sec-v4.0-job-ring");
415 #ifdef CONFIG_ARCH_LS1028A
416 static void fdt_disable_multimedia(void *blob, unsigned int svr)
420 if (IS_MULTIMEDIA_EN(svr))
423 /* Disable eDP/LCD node */
424 off = fdt_node_offset_by_compatible(blob, -1, "arm,mali-dp500");
425 if (off != -FDT_ERR_NOTFOUND)
426 fdt_status_disabled(blob, off);
428 /* Disable GPU node */
429 off = fdt_node_offset_by_compatible(blob, -1, "vivante,gc");
430 if (off != -FDT_ERR_NOTFOUND)
431 fdt_status_disabled(blob, off);
435 #ifdef CONFIG_PCIE_ECAM_GENERIC
436 __weak void fdt_fixup_ecam(void *blob)
442 * If it is a non-E part the crypto is disabled on the following SoCs:
447 * and their personalities.
449 * On all other SoCs just the export-controlled ciphers are disabled, that
450 * means that the following is still working:
451 * - hashing (using MDHA - message digest hash accelerator)
452 * - random number generation (using RNG4)
453 * - cyclic redundancy checking (using CRCA)
454 * - runtime integrity checker (RTIC)
456 * The linux driver will figure out what is available and what is not.
457 * Therefore, we just remove the crypto node on the SoCs which have no crypto
460 static bool crypto_is_disabled(unsigned int svr)
462 if (IS_E_PROCESSOR(svr))
465 if (IS_SVR_DEV(svr, SVR_DEV(SVR_LS1043A)))
468 if (IS_SVR_DEV(svr, SVR_DEV(SVR_LS1088A)))
471 if (IS_SVR_DEV(svr, SVR_DEV(SVR_LS2080A)))
474 if (IS_SVR_DEV(svr, SVR_DEV(SVR_LS2088A)))
480 #ifdef CONFIG_FSL_PFE
481 void pfe_set_firmware_in_fdt(void *blob, int pfenode, void *pfw, char *pename,
485 unsigned int phandle;
486 char subnode_str[32], prop_str[32], phandle_str[32], s[64];
488 sprintf(subnode_str, "pfe-%s-firmware", pename);
489 sprintf(prop_str, "fsl,pfe-%s-firmware", pename);
490 sprintf(phandle_str, "fsl,%s-firmware", pename);
492 /*Add PE FW to fdt.*/
493 /* Increase the size of the fdt to make room for the node. */
494 rc = fdt_increase_size(blob, len);
496 printf("Unable to make room for %s firmware: %s\n", pename,
501 /* Create the firmware node. */
502 fwnode = fdt_add_subnode(blob, pfenode, subnode_str);
504 fdt_get_path(blob, pfenode, s, sizeof(s));
505 printf("Could not add firmware node to %s: %s\n", s,
506 fdt_strerror(fwnode));
510 rc = fdt_setprop_string(blob, fwnode, "compatible", prop_str);
512 fdt_get_path(blob, fwnode, s, sizeof(s));
513 printf("Could not add compatible property to node %s: %s\n", s,
518 rc = fdt_setprop_u32(blob, fwnode, "length", len);
520 fdt_get_path(blob, fwnode, s, sizeof(s));
521 printf("Could not add compatible property to node %s: %s\n", s,
526 /*create phandle and set the property*/
527 phandle = fdt_create_phandle(blob, fwnode);
529 fdt_get_path(blob, fwnode, s, sizeof(s));
530 printf("Could not add phandle property to node %s: %s\n", s,
535 rc = fdt_setprop(blob, fwnode, phandle_str, pfw, len);
537 fdt_get_path(blob, fwnode, s, sizeof(s));
538 printf("Could not add firmware property to node %s: %s\n", s,
544 void fdt_fixup_pfe_firmware(void *blob)
547 unsigned int len_class = 0, len_tmu = 0, len_util = 0;
549 void *pclassfw, *ptmufw, *putilfw;
551 /* The first PFE we find, will contain the actual firmware. */
552 pfenode = fdt_node_offset_by_compatible(blob, -1, "fsl,pfe");
554 /* Exit silently if there are no PFE devices */
557 /* If we already have a firmware node, then also exit silently. */
558 if (fdt_node_offset_by_compatible(blob, -1,
559 "fsl,pfe-class-firmware") > 0)
562 /* If the environment variable is not set, then exit silently */
563 p = env_get("class_elf_firmware");
567 pclassfw = (void *)hextoul(p, NULL);
571 p = env_get("class_elf_size");
574 len_class = hextoul(p, NULL);
576 /* If the environment variable is not set, then exit silently */
577 p = env_get("tmu_elf_firmware");
581 ptmufw = (void *)hextoul(p, NULL);
585 p = env_get("tmu_elf_size");
588 len_tmu = hextoul(p, NULL);
590 if (len_class == 0 || len_tmu == 0) {
591 printf("PFE FW corrupted. CLASS FW size %d, TMU FW size %d\n",
596 /*Add CLASS FW to fdt.*/
597 pfe_set_firmware_in_fdt(blob, pfenode, pclassfw, "class", len_class);
599 /*Add TMU FW to fdt.*/
600 pfe_set_firmware_in_fdt(blob, pfenode, ptmufw, "tmu", len_tmu);
602 /* Util PE firmware is handled separately as it is not a usual case*/
603 p = env_get("util_elf_firmware");
607 putilfw = (void *)hextoul(p, NULL);
611 p = env_get("util_elf_size");
614 len_util = hextoul(p, NULL);
617 printf("PFE Util PE firmware is not added to FDT.\n");
621 pfe_set_firmware_in_fdt(blob, pfenode, putilfw, "util", len_util);
625 void ft_cpu_setup(void *blob, struct bd_info *bd)
627 struct ccsr_gur __iomem *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR);
628 unsigned int svr = gur_in32(&gur->svr);
630 /* delete crypto node if not on an E-processor */
631 if (crypto_is_disabled(svr))
632 fdt_fixup_crypto_node(blob, 0);
633 #if CONFIG_SYS_FSL_SEC_COMPAT >= 4
635 ccsr_sec_t __iomem *sec;
637 #if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
638 fdt_fixup_remove_jr(blob);
639 fdt_fixup_kaslr(blob);
642 sec = (void __iomem *)CFG_SYS_FSL_SEC_ADDR;
643 fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
651 #ifdef CONFIG_SYS_NS16550
652 do_fixup_by_compat_u32(blob, "fsl,ns16550",
653 "clock-frequency", CFG_SYS_NS16550_CLK, 1);
656 do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency",
657 get_board_sys_clk(), 1);
659 #ifdef CONFIG_GIC_V3_ITS
660 ls_gic_rd_tables_init(blob);
663 #if defined(CONFIG_PCIE_LAYERSCAPE) || defined(CONFIG_PCIE_LAYERSCAPE_GEN4)
664 ft_pci_setup(blob, bd);
667 #ifdef CONFIG_FSL_ESDHC
668 fdt_fixup_esdhc(blob, bd);
671 #ifdef CONFIG_SYS_DPAA_QBMAN
672 fdt_fixup_bportals(blob);
673 fdt_fixup_qportals(blob);
674 do_fixup_by_compat_u32(blob, "fsl,qman",
675 "clock-frequency", get_qman_freq(), 1);
678 #ifdef CONFIG_FMAN_ENET
679 fdt_fixup_fman_firmware(blob);
681 #ifdef CONFIG_FSL_PFE
682 fdt_fixup_pfe_firmware(blob);
684 #ifndef CONFIG_ARCH_LS1012A
685 fsl_fdt_disable_usb(blob);
687 #ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
690 #ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI
693 #ifdef CONFIG_ARCH_LS1028A
694 fdt_disable_multimedia(blob, svr);
696 #ifdef CONFIG_PCIE_ECAM_GENERIC
697 fdt_fixup_ecam(blob);