arch/arm/cpu/armv7/uniphier/support_card.c

   1 /*
   2  * Copyright (C) 2012-2014 Panasonic Corporation
   3  *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9 #include <asm/io.h>
  10 #include <asm/arch/board.h>
  11
  12 #if defined(CONFIG_PFC_MICRO_SUPPORT_CARD)
  13
  14 #define PFC_MICRO_SUPPORT_CARD_RESET    \
  15                                 ((CONFIG_SUPPORT_CARD_BASE) + 0x000D0034)
  16 #define PFC_MICRO_SUPPORT_CARD_REVISION \
  17                                 ((CONFIG_SUPPORT_CARD_BASE) + 0x000D00E0)
  18 /*
  19  * 0: reset deassert, 1: reset
  20  *
  21  * bit[0]: LAN, I2C, LED
  22  * bit[1]: UART
  23  */
  24 void support_card_reset_deassert(void)
  25 {
  26         writel(0, PFC_MICRO_SUPPORT_CARD_RESET);
  27 }
  28
  29 void support_card_reset(void)
  30 {
  31         writel(3, PFC_MICRO_SUPPORT_CARD_RESET);
  32 }
  33
  34 static int support_card_show_revision(void)
  35 {
  36         u32 revision;
  37
  38         revision = readl(PFC_MICRO_SUPPORT_CARD_REVISION);
  39         printf("(PFC CPLD version %d.%d)\n", revision >> 4, revision & 0xf);
  40         return 0;
  41 }
  42 #endif
  43
  44 #if defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
  45
  46 #define DCC_MICRO_SUPPORT_CARD_RESET_LAN        \
  47                                 ((CONFIG_SUPPORT_CARD_BASE) + 0x00401300)
  48 #define DCC_MICRO_SUPPORT_CARD_RESET_UART       \
  49                                 ((CONFIG_SUPPORT_CARD_BASE) + 0x00401304)
  50 #define DCC_MICRO_SUPPORT_CARD_RESET_I2C        \
  51                                 ((CONFIG_SUPPORT_CARD_BASE) + 0x00401308)
  52 #define DCC_MICRO_SUPPORT_CARD_REVISION         \
  53                                 ((CONFIG_SUPPORT_CARD_BASE) + 0x005000E0)
  54
  55 void support_card_reset_deassert(void)
  56 {
  57         writel(1, DCC_MICRO_SUPPORT_CARD_RESET_LAN); /* LAN and LED */
  58         writel(1, DCC_MICRO_SUPPORT_CARD_RESET_UART); /* UART */
  59         writel(1, DCC_MICRO_SUPPORT_CARD_RESET_I2C); /* I2C */
  60 }
  61
  62 void support_card_reset(void)
  63 {
  64         writel(0, DCC_MICRO_SUPPORT_CARD_RESET_LAN); /* LAN and LED */
  65         writel(0, DCC_MICRO_SUPPORT_CARD_RESET_UART); /* UART */
  66         writel(0, DCC_MICRO_SUPPORT_CARD_RESET_I2C); /* I2C */
  67 }
  68
  69 static int support_card_show_revision(void)
  70 {
  71         u32 revision;
  72
  73         revision = readl(DCC_MICRO_SUPPORT_CARD_REVISION);
  74
  75         if (revision >= 0x67) {
  76                 printf("(DCC CPLD version 3.%d.%d)\n",
  77                        revision >> 4, revision & 0xf);
  78                 return 0;
  79         } else {
  80                 printf("(DCC CPLD unknown version)\n");
  81                 return -1;
  82         }
  83 }
  84 #endif
  85
  86 void support_card_init(void)
  87 {
  88         /*
  89          * After power on, we need to keep the LAN controller in reset state
  90          * for a while. (200 usec)
  91          * Fortunatelly, enough wait time is already inserted in pll_init()
  92          * function. So we do not have to wait here.
  93          */
  94         support_card_reset_deassert();
  95 }
  96
  97 int check_support_card(void)
  98 {
  99         printf("SC:    Micro Support Card ");
 100         return support_card_show_revision();
 101 }
 102
 103 #if defined(CONFIG_SMC911X)
 104 #include <netdev.h>
 105
 106 int board_eth_init(bd_t *bis)
 107 {
 108         return smc911x_initialize(0, CONFIG_SMC911X_BASE);
 109 }
 110 #endif
 111
 112 #if !defined(CONFIG_SYS_NO_FLASH)
 113
 114 #include <mtd/cfi_flash.h>
 115
 116 #if CONFIG_SYS_MAX_FLASH_BANKS > 1
 117 static phys_addr_t flash_banks_list[CONFIG_SYS_MAX_FLASH_BANKS] =
 118                                         CONFIG_SYS_FLASH_BANKS_LIST;
 119
 120 phys_addr_t cfi_flash_bank_addr(int i)
 121 {
 122         return flash_banks_list[i];
 123 }
 124 #endif
 125
 126 int mem_is_flash(phys_addr_t base)
 127 {
 128         const int loop = 128;
 129         u32 *scratch_addr;
 130         u32 saved_value;
 131         int ret = 1;
 132         int i;
 133
 134         scratch_addr = map_physmem(base + 0x01e00000,
 135                                         sizeof(u32) * loop, MAP_NOCACHE);
 136
 137         for (i = 0; i < loop; i++, scratch_addr++) {
 138                 saved_value = readl(scratch_addr);
 139                 writel(~saved_value, scratch_addr);
 140                 if (readl(scratch_addr) != saved_value) {
 141                         /* We assume no memory or SRAM here. */
 142                         writel(saved_value, scratch_addr);
 143                         ret = 0;
 144                         break;
 145                 }
 146         }
 147
 148         unmap_physmem(scratch_addr, MAP_NOCACHE);
 149
 150         return ret;
 151 }
 152
 153 int board_flash_wp_on(void)
 154 {
 155         int i;
 156         int ret = 1;
 157
 158         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
 159                 if (mem_is_flash(cfi_flash_bank_addr(i))) {
 160                         /*
 161                          * We found at least one flash.
 162                          * We need to return 0 and call flash_init().
 163                          */
 164                         ret = 0;
 165                 }
 166 #if CONFIG_SYS_MAX_FLASH_BANKS > 1
 167                 else {
 168                         /*
 169                          * We might have a SRAM here.
 170                          * To prevent SRAM data from being destroyed,
 171                          * we set dummy address (SDRAM).
 172                          */
 173                         flash_banks_list[i] = 0x80000000 + 0x10000 * i;
 174                 }
 175 #endif
 176         }
 177
 178         return ret;
 179 }
 180 #endif