1 /******************************************************************************
2 ** File Name: chip_phy_v3.c *
3 ** Author: Richard Yang *
5 ** Copyright: 2002 Spreatrum, Incoporated. All Rights Reserved. *
6 ** Description: This file defines the basic information on chip. *
7 ******************************************************************************
9 ******************************************************************************
11 ** ------------------------------------------------------------------------- *
12 ** DATE NAME DESCRIPTION *
13 ** 08/14/2002 Richard.Yang Create. *
14 ** 09/16/2003 Xueliang.Wang Modify CR4013 *
15 ** 08/23/2004 JImmy.Jia Modify for SC6600D *
16 ******************************************************************************/
18 /**---------------------------------------------------------------------------*
20 **---------------------------------------------------------------------------*/
22 #include "adi_hal_internal.h"
23 #include "wdg_drvapi.h"
24 #include "mocor_boot_mode.h"
26 /**---------------------------------------------------------------------------*
28 **---------------------------------------------------------------------------*/
34 /**---------------------------------------------------------------------------*
36 **---------------------------------------------------------------------------*/
39 /**---------------------------------------------------------------------------*
41 **---------------------------------------------------------------------------*/
43 /**---------------------------------------------------------------------------*
45 **---------------------------------------------------------------------------*/
47 /**---------------------------------------------------------------------------*
48 ** Function Definitions *
49 **---------------------------------------------------------------------------*/
50 /*****************************************************************************/
51 // Description : This function is used to reset MCU.
52 // Global resource dependence :
53 // Author : Xueliang.Wang
55 /*****************************************************************************/
56 void CHIP_ResetMCU (void) //reset interrupt disable??
58 // This loop is very important to let the reset process work well on V3 board
62 ANA_REG_OR (ANA_APB_CLK_EN, WDG_EB | RTC_WDG_EB);
70 volatile uint32 tick1 = SCI_GetTickCount();
71 volatile uint32 tick2 = SCI_GetTickCount();
73 while ( (tick2 - tick1) < 500)
75 tick2 = SCI_GetTickCount();
80 /*****************************************************************************/
81 // Description: Returns the HW_RST register address.
83 // Note : Because there is no register which can restore information
84 // when watchdog resets the system, so we choose IRAM.
85 /*****************************************************************************/
86 LOCAL uint32 CHIP_PHY_GetHwRstAddr (void)
88 // Returns a DWORD of IRAM shared with DCAM
92 /*****************************************************************************/
93 // Description: Returns the reset mode register address.
96 /*****************************************************************************/
97 LOCAL uint32 CHIP_PHY_GetRstModeAddr (void)
99 return GR_ARM_BOOT_ADDR;
102 /*****************************************************************************/
103 // Description: Gets the register in analog die to judge the reset mode.
105 // Note: !It is called before __main now, so it can not call the adi
106 // interface because it contains SCI_DisableIRQ inside, below
107 // writes the adi read interface individually. Because the la-
108 // ckless of SCI_DisableIRQ, so this function must be called
109 // before system interrupt is turnned on!
110 /*****************************************************************************/
111 LOCAL uint32 CHIP_PHY_GetANAReg (void)
116 * (volatile uint32 *) ADI_ARM_RD_CMD = ANA_HWRST_STATUS;
118 // Wait read operation complete, RD_data[31] will be cleared after the read
119 // operation complete
122 adi_rd_data = * (volatile uint32 *) ADI_RD_DATA;
124 while (adi_rd_data & BIT_31);
126 return ((adi_rd_data & 0x0000FFFF));
129 /*****************************************************************************/
130 // Description: This fuction returns the HW_RST value written before reset.
133 /*****************************************************************************/
134 LOCAL uint32 CHIP_PHY_GetHWFlag (void)
136 // Switch IRAM from DCAM to ARM
137 REG32 (AHB_CTL1) |= BIT_0;
139 return CHIP_REG_GET (CHIP_PHY_GetHwRstAddr ());
142 /*****************************************************************************/
143 // Description: PHY layer realization of BOOT_SetRstMode.
145 // Note: The valid bit filed is from bit15 to bit0
146 /*****************************************************************************/
147 PUBLIC void CHIP_PHY_SetRstMode (uint32 val)
149 CHIP_REG_AND (CHIP_PHY_GetRstModeAddr (), ~0xFFFF);
150 CHIP_REG_OR (CHIP_PHY_GetRstModeAddr (), (val&0xFFFF));
153 /*****************************************************************************/
154 // Description: This fuction returns the reset mode value.
157 /*****************************************************************************/
158 PUBLIC uint32 CHIP_PHY_GetRstMode (void)
160 return (CHIP_REG_GET (CHIP_PHY_GetRstModeAddr ()) & 0xFFFF);
163 /*****************************************************************************/
164 // Description: PHY layer realization of BOOT_ResetHWFlag. It resets the HW
165 // reset register after system initialization.
167 // Note: The valid bit filed of analog register is from bit11 to bit0.
168 // | 11 10 9 8 | 7 6 5 4 | 3 2 1 0 |
169 // |ALL_HRST_MONITOR | POR_HRST_MONITOR| WDG_HRST_MONITOR |
171 // The valid bit filed of HW_RST is from bit11 to bit0.
172 /*****************************************************************************/
173 PUBLIC void CHIP_PHY_ResetHWFlag (uint32 val)
175 // Reset the analog die register
176 ANA_REG_AND (ANA_HWRST_STATUS, ~0xFFF);
177 ANA_REG_OR (ANA_HWRST_STATUS, (val&0xFFF));
180 CHIP_REG_AND (CHIP_PHY_GetHwRstAddr (), ~0xFFFF);
181 CHIP_REG_OR (CHIP_PHY_GetHwRstAddr (), (val&0xFFFF));
184 /*****************************************************************************/
185 // Description: PHY layer realization of BOOT_SetWDGHWFlag. It Writes flag
186 // to the register which would not be reset by watchdog reset.
188 // Note: The valid bit filed is from bit15 to bit0
189 /*****************************************************************************/
190 PUBLIC void CHIP_PHY_SetWDGHWFlag (WDG_HW_FLAG_T type, uint32 val)
192 if(TYPE_RESET == type)
194 // Switch IRAM from DCAM to ARM
195 REG32 (AHB_CTL1) |= BIT_0;
197 CHIP_REG_AND (CHIP_PHY_GetHwRstAddr (), ~0xFFFF);
198 CHIP_REG_OR (CHIP_PHY_GetHwRstAddr (), (val&0xFFFF));
207 /*****************************************************************************/
208 // Description: PHY layer realization of __BOOT_IRAM_EN.
210 // Note: Do nothing. There are 32KB internal ram dedicated for ARM.
211 /*****************************************************************************/
212 PUBLIC void CHIP_PHY_BootIramEn ()
216 /*****************************************************************************/
217 // Description : This function returns whether the watchdog reset is caused
218 // by software reset or system halted.
220 // Note : The valid bit filed is from bit15 to bit0
221 /*****************************************************************************/
222 PUBLIC BOOLEAN CHIP_PHY_IsWDGRstByMCU (uint32 flag)
224 // Copy the value of HW_RST register to the register specific to reset mode
225 CHIP_REG_SET (CHIP_PHY_GetRstModeAddr (),
226 (CHIP_PHY_GetHWFlag () & 0xFFFF));
228 if ((CHIP_PHY_GetHWFlag () & 0xFFFF) == (flag & 0xFFFF))
238 /*****************************************************************************/
239 // Description : This function returns whether the reset is caused by power
242 // Note : | 11 10 9 8 | 7 6 5 4 | 3 2 1 0 |
243 // |ALL_HRST_MONITOR | POR_HRST_MONITOR| WDG_HRST_MONITOR |
244 /*****************************************************************************/
245 PUBLIC BOOLEAN CHIP_PHY_IsResetByPowerUp()
247 if ((CHIP_PHY_GetANAReg () & 0xF0) == 0x0)
257 /*****************************************************************************/
258 // Description : This function returns whether the reset is caused by watch-
261 // Note : | 11 10 9 8 | 7 6 5 4 | 3 2 1 0 |
262 // |ALL_HRST_MONITOR | POR_HRST_MONITOR| WDG_HRST_MONITOR |
263 /*****************************************************************************/
264 PUBLIC BOOLEAN CHIP_PHY_IsResetByWatchDog()
266 if ((CHIP_PHY_GetANAReg () & 0xF) == 0x0)
276 /**---------------------------------------------------------------------------*
278 **---------------------------------------------------------------------------*/