2 * Copyright (c) 2011 The Chromium OS Authors.
3 * See file CREDITS for list of people who contributed to this
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 /* Tegra2 high-level function multiplexing */
24 #include <asm/arch/clock.h>
25 #include <asm/arch/funcmux.h>
26 #include <asm/arch/pinmux.h>
28 int funcmux_select(enum periph_id id, int config)
30 int bad_config = config != FUNCMUX_DEFAULT;
35 case FUNCMUX_UART1_IRRX_IRTX:
36 pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA);
37 pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA);
38 pinmux_tristate_disable(PINGRP_IRRX);
39 pinmux_tristate_disable(PINGRP_IRTX);
41 case FUNCMUX_UART1_UAA_UAB:
42 pinmux_set_func(PINGRP_UAA, PMUX_FUNC_UARTA);
43 pinmux_set_func(PINGRP_UAB, PMUX_FUNC_UARTA);
44 pinmux_tristate_disable(PINGRP_UAA);
45 pinmux_tristate_disable(PINGRP_UAB);
51 * Tegra appears to boot with function UARTA pre-
52 * selected on mux group SDB. If two mux groups are
53 * both set to the same function, it's unclear which
54 * group's pins drive the RX signals into the HW.
55 * For UARTA, SDB certainly overrides group IRTX in
56 * practice. To solve this, configure some alternative
57 * function on SDB to avoid the conflict. Also, tri-
58 * state the group to avoid driving any signal onto it
59 * until we know what's connected.
61 pinmux_tristate_enable(PINGRP_SDB);
62 pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3);
67 if (config == FUNCMUX_UART2_IRDA) {
68 pinmux_set_func(PINGRP_UAD, PMUX_FUNC_IRDA);
69 pinmux_tristate_disable(PINGRP_UAD);
74 if (config == FUNCMUX_UART4_GMC) {
75 pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD);
76 pinmux_tristate_disable(PINGRP_GMC);
80 case PERIPH_ID_DVC_I2C:
81 /* there is only one selection, pinmux_config is ignored */
82 if (config == FUNCMUX_DVC_I2CP) {
83 pinmux_set_func(PINGRP_I2CP, PMUX_FUNC_I2C);
84 pinmux_tristate_disable(PINGRP_I2CP);
89 /* support pinmux_config of 0 for now, */
90 if (config == FUNCMUX_I2C1_RM) {
91 pinmux_set_func(PINGRP_RM, PMUX_FUNC_I2C);
92 pinmux_tristate_disable(PINGRP_RM);
95 case PERIPH_ID_I2C2: /* I2C2 */
97 case FUNCMUX_I2C2_DDC: /* DDC pin group, select I2C2 */
98 pinmux_set_func(PINGRP_DDC, PMUX_FUNC_I2C2);
100 pinmux_set_func(PINGRP_PTA, PMUX_FUNC_HDMI);
101 pinmux_tristate_disable(PINGRP_DDC);
103 case FUNCMUX_I2C2_PTA: /* PTA pin group, select I2C2 */
104 pinmux_set_func(PINGRP_PTA, PMUX_FUNC_I2C2);
105 /* set DDC_SEL to RSVDx (RSVD2 works for now) */
106 pinmux_set_func(PINGRP_DDC, PMUX_FUNC_RSVD2);
107 pinmux_tristate_disable(PINGRP_PTA);
112 case PERIPH_ID_I2C3: /* I2C3 */
113 /* support pinmux_config of 0 for now */
114 if (config == FUNCMUX_I2C3_DTF) {
115 pinmux_set_func(PINGRP_DTF, PMUX_FUNC_I2C3);
116 pinmux_tristate_disable(PINGRP_DTF);
120 case PERIPH_ID_SDMMC2:
121 if (config == FUNCMUX_SDMMC2_DTA_DTD_8BIT) {
122 pinmux_set_func(PINGRP_DTA, PMUX_FUNC_SDIO2);
123 pinmux_set_func(PINGRP_DTD, PMUX_FUNC_SDIO2);
125 pinmux_tristate_disable(PINGRP_DTA);
126 pinmux_tristate_disable(PINGRP_DTD);
130 case PERIPH_ID_SDMMC3:
132 case FUNCMUX_SDMMC3_SDB_SLXA_8BIT:
133 pinmux_set_func(PINGRP_SLXA, PMUX_FUNC_SDIO3);
134 pinmux_set_func(PINGRP_SLXC, PMUX_FUNC_SDIO3);
135 pinmux_set_func(PINGRP_SLXD, PMUX_FUNC_SDIO3);
136 pinmux_set_func(PINGRP_SLXK, PMUX_FUNC_SDIO3);
138 pinmux_tristate_disable(PINGRP_SLXA);
139 pinmux_tristate_disable(PINGRP_SLXC);
140 pinmux_tristate_disable(PINGRP_SLXD);
141 pinmux_tristate_disable(PINGRP_SLXK);
144 case FUNCMUX_SDMMC3_SDB_4BIT:
145 pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3);
146 pinmux_set_func(PINGRP_SDC, PMUX_FUNC_SDIO3);
147 pinmux_set_func(PINGRP_SDD, PMUX_FUNC_SDIO3);
149 pinmux_tristate_disable(PINGRP_SDB);
150 pinmux_tristate_disable(PINGRP_SDC);
151 pinmux_tristate_disable(PINGRP_SDD);
157 case PERIPH_ID_SDMMC4:
159 case FUNCMUX_SDMMC4_ATC_ATD_8BIT:
160 pinmux_set_func(PINGRP_ATC, PMUX_FUNC_SDIO4);
161 pinmux_set_func(PINGRP_ATD, PMUX_FUNC_SDIO4);
163 pinmux_tristate_disable(PINGRP_ATC);
164 pinmux_tristate_disable(PINGRP_ATD);
167 case FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT:
168 pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4);
169 pinmux_tristate_disable(PINGRP_GME);
172 case FUNCMUX_SDMMC4_ATB_GMA_4_BIT:
173 pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4);
174 pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4);
176 pinmux_tristate_disable(PINGRP_ATB);
177 pinmux_tristate_disable(PINGRP_GMA);
184 if (config == FUNCMUX_DEFAULT) {
185 enum pmux_pingrp grp[] = {PINGRP_KBCA, PINGRP_KBCB,
186 PINGRP_KBCC, PINGRP_KBCD, PINGRP_KBCE,
190 for (i = 0; i < ARRAY_SIZE(grp); i++) {
191 pinmux_tristate_disable(grp[i]);
192 pinmux_set_func(grp[i], PMUX_FUNC_KBC);
193 pinmux_set_pullupdown(grp[i], PMUX_PULL_UP);
200 debug("%s: invalid periph_id %d", __func__, id);
205 debug("%s: invalid config %d for periph_id %d", __func__,