4 * Copyright (C) 2015 Hans de Goede <hdegoede@redhat.com>
5 * Copyright (C) 2014 Roman Byshko <rbyshko@gmail.com>
8 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/arch/clock.h>
15 #include <asm/arch/cpu.h>
16 #include <asm/arch/usb_phy.h>
21 #define SUNXI_USB_PMU_IRQ_ENABLE 0x800
22 #ifdef CONFIG_MACH_SUN8I_A33
23 #define SUNXI_USB_CSR 0x410
25 #define SUNXI_USB_CSR 0x404
27 #define SUNXI_USB_PASSBY_EN 1
29 #define SUNXI_EHCI_AHB_ICHR8_EN (1 << 10)
30 #define SUNXI_EHCI_AHB_INCR4_BURST_EN (1 << 9)
31 #define SUNXI_EHCI_AHB_INCRX_ALIGN_EN (1 << 8)
32 #define SUNXI_EHCI_ULPI_BYPASS_EN (1 << 0)
34 #define REG_PHY_UNK_H3 0x420
35 #define REG_PMU_UNK_H3 0x810
37 static struct sunxi_usb_phy {
48 .usb_rst_mask = CCM_USB_CTRL_PHY0_RST | CCM_USB_CTRL_PHY0_CLK,
50 .base = SUNXI_USB0_BASE,
53 .usb_rst_mask = CCM_USB_CTRL_PHY1_RST | CCM_USB_CTRL_PHY1_CLK,
55 .base = SUNXI_USB1_BASE,
57 #if CONFIG_SUNXI_USB_PHYS >= 3
59 .usb_rst_mask = CCM_USB_CTRL_PHY2_RST | CCM_USB_CTRL_PHY2_CLK,
61 .base = SUNXI_USB2_BASE,
64 #if CONFIG_SUNXI_USB_PHYS >= 4
66 .usb_rst_mask = CCM_USB_CTRL_PHY3_RST | CCM_USB_CTRL_PHY3_CLK,
68 .base = SUNXI_USB3_BASE,
73 static int get_vbus_gpio(int index)
76 case 0: return sunxi_name_to_gpio(CONFIG_USB0_VBUS_PIN);
77 case 1: return sunxi_name_to_gpio(CONFIG_USB1_VBUS_PIN);
78 case 2: return sunxi_name_to_gpio(CONFIG_USB2_VBUS_PIN);
83 static int get_vbus_detect_gpio(int index)
86 case 0: return sunxi_name_to_gpio(CONFIG_USB0_VBUS_DET);
91 static int get_id_detect_gpio(int index)
94 case 0: return sunxi_name_to_gpio(CONFIG_USB0_ID_DET);
99 static void usb_phy_write(struct sunxi_usb_phy *phy, int addr,
102 int j = 0, usbc_bit = 0;
103 void *dest = (void *)SUNXI_USB0_BASE + SUNXI_USB_CSR;
105 #ifdef CONFIG_MACH_SUN8I_A33
106 /* CSR needs to be explicitly initialized to 0 on A33 */
110 usbc_bit = 1 << (phy->id * 2);
111 for (j = 0; j < len; j++) {
112 /* set the bit address to be written */
113 clrbits_le32(dest, 0xff << 8);
114 setbits_le32(dest, (addr + j) << 8);
116 clrbits_le32(dest, usbc_bit);
119 setbits_le32(dest, 1 << 7);
121 clrbits_le32(dest, 1 << 7);
123 setbits_le32(dest, usbc_bit);
125 clrbits_le32(dest, usbc_bit);
131 #if defined CONFIG_MACH_SUN8I_H3
132 static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy)
135 clrbits_le32(SUNXI_USBPHY_BASE + REG_PHY_UNK_H3, 0x01);
137 clrbits_le32(phy->base + REG_PMU_UNK_H3, 0x02);
140 static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy)
142 /* The following comments are machine
143 * translated from Chinese, you have been warned!
146 /* Regulation 45 ohms */
148 usb_phy_write(phy, 0x0c, 0x01, 1);
150 /* adjust PHY's magnitude and rate */
151 usb_phy_write(phy, 0x20, 0x14, 5);
153 /* threshold adjustment disconnect */
154 #if defined CONFIG_MACH_SUN5I || defined CONFIG_MACH_SUN7I
155 usb_phy_write(phy, 0x2a, 2, 2);
157 usb_phy_write(phy, 0x2a, 3, 2);
164 static void sunxi_usb_phy_passby(struct sunxi_usb_phy *phy, int enable)
166 unsigned long bits = 0;
169 addr = (void *)phy->base + SUNXI_USB_PMU_IRQ_ENABLE;
171 bits = SUNXI_EHCI_AHB_ICHR8_EN |
172 SUNXI_EHCI_AHB_INCR4_BURST_EN |
173 SUNXI_EHCI_AHB_INCRX_ALIGN_EN |
174 SUNXI_EHCI_ULPI_BYPASS_EN;
177 setbits_le32(addr, bits);
179 clrbits_le32(addr, bits);
184 void sunxi_usb_phy_enable_squelch_detect(int index, int enable)
186 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
188 usb_phy_write(phy, 0x3c, enable ? 0 : 2, 2);
191 void sunxi_usb_phy_init(int index)
193 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
194 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
197 if (phy->init_count != 1)
200 setbits_le32(&ccm->usb_clk_cfg, phy->usb_rst_mask);
202 sunxi_usb_phy_config(phy);
205 sunxi_usb_phy_passby(phy, SUNXI_USB_PASSBY_EN);
208 void sunxi_usb_phy_exit(int index)
210 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
211 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
214 if (phy->init_count != 0)
218 sunxi_usb_phy_passby(phy, !SUNXI_USB_PASSBY_EN);
220 clrbits_le32(&ccm->usb_clk_cfg, phy->usb_rst_mask);
223 void sunxi_usb_phy_power_on(int index)
225 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
227 phy->power_on_count++;
228 if (phy->power_on_count != 1)
231 if (phy->gpio_vbus >= 0)
232 gpio_set_value(phy->gpio_vbus, 1);
235 void sunxi_usb_phy_power_off(int index)
237 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
239 phy->power_on_count--;
240 if (phy->power_on_count != 0)
243 if (phy->gpio_vbus >= 0)
244 gpio_set_value(phy->gpio_vbus, 0);
247 int sunxi_usb_phy_power_is_on(int index)
249 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
251 return phy->power_on_count > 0;
254 int sunxi_usb_phy_vbus_detect(int index)
256 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
257 int err, retries = 3;
259 if (phy->gpio_vbus_det < 0)
260 return phy->gpio_vbus_det;
262 err = gpio_get_value(phy->gpio_vbus_det);
264 * Vbus may have been provided by the board and just been turned of
265 * some milliseconds ago on reset, what we're measuring then is a
266 * residual charge on Vbus, sleep a bit and try again.
268 while (err > 0 && retries--) {
270 err = gpio_get_value(phy->gpio_vbus_det);
276 int sunxi_usb_phy_id_detect(int index)
278 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
280 if (phy->gpio_id_det < 0)
281 return phy->gpio_id_det;
283 return gpio_get_value(phy->gpio_id_det);
286 int sunxi_usb_phy_probe(void)
288 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
289 struct sunxi_usb_phy *phy;
292 for (i = 0; i < CONFIG_SUNXI_USB_PHYS; i++) {
293 phy = &sunxi_usb_phy[i];
295 phy->gpio_vbus = get_vbus_gpio(i);
296 if (phy->gpio_vbus >= 0) {
297 ret = gpio_request(phy->gpio_vbus, "usb_vbus");
300 ret = gpio_direction_output(phy->gpio_vbus, 0);
305 phy->gpio_vbus_det = get_vbus_detect_gpio(i);
306 if (phy->gpio_vbus_det >= 0) {
307 ret = gpio_request(phy->gpio_vbus_det, "usb_vbus_det");
310 ret = gpio_direction_input(phy->gpio_vbus_det);
315 phy->gpio_id_det = get_id_detect_gpio(i);
316 if (phy->gpio_id_det >= 0) {
317 ret = gpio_request(phy->gpio_id_det, "usb_id_det");
320 ret = gpio_direction_input(phy->gpio_id_det);
323 sunxi_gpio_set_pull(phy->gpio_id_det,
328 setbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE);
333 int sunxi_usb_phy_remove(void)
335 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
336 struct sunxi_usb_phy *phy;
339 clrbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE);
341 for (i = 0; i < CONFIG_SUNXI_USB_PHYS; i++) {
342 phy = &sunxi_usb_phy[i];
344 if (phy->gpio_vbus >= 0)
345 gpio_free(phy->gpio_vbus);
347 if (phy->gpio_vbus_det >= 0)
348 gpio_free(phy->gpio_vbus_det);
350 if (phy->gpio_id_det >= 0)
351 gpio_free(phy->gpio_id_det);