arch/arm/cpu/armv7/sc8830/watchdog_phy_v3.c

   1 /******************************************************************************
   2  ** File Name:      watchdog_phy_v3.c                                                 *
   3  ** Author:         Jie Dai                                                   *
   4  ** DATE:           08/02/2010                                                *
   5  ** Copyright:      2010 Spreatrum, Incoporated. All Rights Reserved.         *
   6  ** Description:    This file define the physical layer of I2C device.      *
   7  ******************************************************************************
   8
   9  ******************************************************************************
  10  **                        Edit History                                       *
  11  ** ------------------------------------------------------------------------- *
  12  ** DATE           NAME             DESCRIPTION                               *
  13  ** 08/02/2010     Jie Dai            Create.                                 *
  14  ******************************************************************************/
  15
  16 /**---------------------------------------------------------------------------*
  17  **                         Dependencies                                      *
  18  **---------------------------------------------------------------------------*/
  19 #include <common.h>
  20 #include <asm/arch/os_api.h>
  21 #include <asm/arch/sc_reg.h>
  22 #include <asm/arch/adi_hal_internal.h>
  23 #include <asm/arch/watchdog_phy.h>
  24 #include <asm/arch/watchdog_reg_v3.h>
  25 /**---------------------------------------------------------------------------*
  26  **                         Compiler Flag                                     *
  27  **---------------------------------------------------------------------------*/
  28 #ifdef   __cplusplus
  29 extern   "C"
  30 {
  31 #endif
  32
  33 #define ANA_WDG_LOAD_TIMEOUT_NUM    (0xfffff)
  34 #define ANA_WDG_CLR_INT_TIMEOUT_NUM (10000)
  35
  36 #define WDG_LOAD_TIMER_VALUE(value) \
  37     do{\
  38         uint32   cnt          =  0;\
  39         while((ANA_REG_GET(WDG_INT_RAW) & WDG_LD_BUSY_BIT) && ( cnt < ANA_WDG_LOAD_TIMEOUT_NUM )) cnt++;\
  40         ANA_REG_SET( WDG_LOAD_HIGH, (uint16)(((value) >> 16 ) & 0xffff));\
  41         ANA_REG_SET( WDG_LOAD_LOW , (uint16)((value)  & 0xffff) );\
  42     }while(0)
  43
  44 #define CLEAR_WDG_INT(msk) \
  45     do{ \
  46         uint32   cnt          =  0;\
  47         ANA_REG_SET(WDG_INT_CLR, (msk));\
  48         while((ANA_REG_GET(WDG_INT_RAW) & (msk))&&(cnt < ANA_WDG_CLR_INT_TIMEOUT_NUM)) cnt++; \
  49     }while(0)
  50
  51
  52 /**---------------------------------------------------------------------------*
  53  **                            Macro Define
  54  **---------------------------------------------------------------------------*/
  55 #define  WDG_TRACE printf
  56
  57 /*****************************************************************************/
  58 //  Description:    This function config the watch dog module.
  59 //  Dependency:     No
  60 //  Author:         Jie.Dai
  61 //  Note:
  62 /*****************************************************************************/
  63 PUBLIC int32 WDG_PHY_CONFIG (WDG_CONFIG_T *cfg)
  64 {
  65     ///WDG_TRACE("Watch Dog Trace: Watch Dog Value 0x%8.8x", CHIP_REG_GET(WDG_VALUE));
  66     ANA_REG_SET (WDG_LOCK, WDG_UNLOCK_KEY);
  67
  68     switch (cfg->mode)
  69     {
  70         case WDG_TIMEOUT_MODE_RESET:
  71             ANA_REG_AND (WDG_CTRL, (~WDG_INT_EN_BIT));
  72             break;
  73
  74         case WDG_TIMEOUT_MODE_INT:
  75             ANA_REG_OR (WDG_CTRL, WDG_INT_EN_BIT);
  76             break;
  77
  78         default:
  79             break;  //No need to change
  80     }
  81
  82     if (WDG_TIMER_STATE_STOP != cfg->state)
  83     {
  84         WDG_LOAD_TIMER_VALUE (cfg->val);
  85     }
  86
  87     switch (cfg->state)
  88     {
  89         case WDG_TIMER_STATE_STOP:
  90             ANA_REG_AND (WDG_CTRL, (~WDG_CNT_EN_BIT));
  91             break;
  92
  93         case WDG_TIMER_STATE_START:
  94             ANA_REG_OR (WDG_CTRL, WDG_CNT_EN_BIT | WDG_RST_EN_BIT);
  95             break;
  96
  97         default:
  98             break;  //No need to change
  99     }
 100
 101     WDG_TRACE ("Watch Dog Trace: Watch Dog Control 0x%8.8x", ANA_REG_GET (WDG_CTRL));
 102
 103     ANA_REG_SET (WDG_LOCK, (~WDG_UNLOCK_KEY));
 104     return 0;
 105 }
 106
 107 /*****************************************************************************/
 108 //  Description:    This function clear the watch dog interrupt
 109 //  Dependency:     No
 110 //  Author:         Jie.Dai
 111 //  Note:
 112 /*****************************************************************************/
 113 PUBLIC int32 WDG_PHY_INT_CLR (void)
 114 {
 115     ANA_REG_SET (WDG_LOCK, WDG_UNLOCK_KEY);
 116     CLEAR_WDG_INT (WDG_INT_CLEAR_BIT | WDG_INT_RST_BIT);
 117     ANA_REG_SET (WDG_LOCK, (~WDG_UNLOCK_KEY));
 118     return 0;
 119 }
 120 PUBLIC void WDG_ClockOn(void)
 121 {
 122         ANA_REG_OR (ANA_REG_GLB_ARM_MODULE_EN, BIT_ANA_WDG_EN); //WDG enable
 123         ANA_REG_OR (ANA_REG_GLB_RTC_CLK_EN,    BIT_RTC_WDG_EN); //WDG Rtc enable
 124 }
 125
 126 PUBLIC uint32 WDG_PHY_RST_RAW_INT(void)
 127 {
 128         return ANA_REG_GET(WDG_INT_RAW);
 129 }
 130
 131 /**---------------------------------------------------------------------------*
 132  **                         Compiler Flag                                     *
 133  **---------------------------------------------------------------------------*/
 134
 135 #ifdef   __cplusplus
 136 }
 137 #endif
 138
 139 /*  End Of File */
 140