2 * linux/arch/arm/mach-sprd/gpio.c
4 * Generic SPRD GPIO handling
6 * Author: Yingchun Li(yingchun.li@spreadtrum.com)
7 * Created: March 10, 2010
8 * Copyright: Spreadtrum Inc.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
16 #include <asm/arch/sprd_reg.h>
17 #include <asm/arch/sci_types.h>
18 #include <asm/arch/sprd_eic.h>
19 #include <asm/arch/adi_hal_internal.h>
20 #include <asm/arch/chip_drv_common_io.h>
21 #include <asm/arch/regs_adi.h>
23 #define KERN_WARNING ""
24 #define WARN(nmu, fmt...) printf(fmt)
26 #define pr_err(fmt...) printf(fmt)
27 #define pr_debug(fmt...) printf(fmt)
33 #define GPIO_DBG(fmt...) pr_debug(fmt)
35 #define GPIO_DBG(fmt...)
49 #define GPIO_INVALID_ID (0xffff)
50 #define INVALID_REG (~(u32)0)
69 #if defined(CONFIG_ADIE_SC2723S)||defined(CONFIG_ADIE_SC2723)
72 #define EIC10_CTL 0x68
76 static void __get_eic_base_info (u32 eic_id, struct eic_info *info)
78 if (eic_id>=SPRD_ADIE_EIC_START && eic_id<=SPRD_ADIE_EIC_END)
80 info->base_addr= SPRD_ANA_EIC_PHYS;
81 #if defined(CONFIG_ADIE_SC2723S)||defined(CONFIG_ADIE_SC2723)
82 info->bit_num = eic_id&0xF;
84 info->bit_num = eic_id&0x7;
89 else if (eic_id>=SPRD_DDIE_EIC_START && eic_id<=SPRD_DDIE_EIC_END)
91 info->base_addr= SPRD_EIC_PHYS+0x80;
92 info->bit_num = eic_id&0x7;
97 info->base_addr = INVALID_REG;
101 static int __eic_get_pin_data (struct eic_info *info)
103 u32 reg_addr = 0, reg_data;
105 if (info->base_addr == INVALID_REG)
110 reg_addr = info->base_addr + EIC_DATA;
112 if (info->die == D_DIE)
113 reg_data = __raw_readl (reg_addr);
115 reg_data = ANA_REG_GET (reg_addr);
116 reg_data &= 1<<info->bit_num;
121 static int __eic_get_data_mask (struct eic_info *info)
123 u32 reg_addr = 0, reg_data;
125 if (info->base_addr == INVALID_REG)
130 reg_addr = info->base_addr + EIC_MASK;
132 if (info->die == D_DIE)
133 reg_data = __raw_readl (reg_addr);
135 reg_data = ANA_REG_GET (reg_addr);
136 reg_data &= 1<<info->bit_num;
142 set data mask, the gpio data register can be access
144 static void __eic_set_data_mask (struct eic_info *info, int b_on)
146 u32 reg_addr = 0, reg_data;
148 reg_addr = info->base_addr + EIC_MASK;
150 if (info->base_addr == INVALID_REG)
155 if (info->die == D_DIE)
156 reg_data = __raw_readl (reg_addr);
158 reg_data = ANA_REG_GET (reg_addr);
162 if (!(reg_data&(1<<info->bit_num)))
164 reg_data |= 1<<info->bit_num;
165 if (info->die == D_DIE)
166 __raw_writel (reg_addr, reg_data);
168 ANA_REG_SET (reg_addr, reg_data);
173 if (reg_data&(1<<info->bit_num))
175 reg_data &= ~(1<<info->bit_num);
176 if (info->die == D_DIE)
177 __raw_writel (reg_addr, reg_data);
179 ANA_REG_SET (reg_addr, reg_data);
184 int sprd_eic_get(unsigned offset)
186 unsigned eic_id = offset;
187 struct eic_info gpio_info;
189 __get_eic_base_info (eic_id, &gpio_info);
191 if (!__eic_get_data_mask (&gpio_info)) {
192 WARN(1, "GPIO_%d data mask hasn't been opened!\n", eic_id);
195 return __eic_get_pin_data (&gpio_info);
198 int sprd_eic_irq_set_type(unsigned offset, unsigned flow_type)
203 int sprd_eic_irq_sts(unsigned offset)
208 int sprd_eic_request(unsigned offset)
210 unsigned eic_id = offset;
211 struct eic_info gpio_info;
213 __get_eic_base_info (eic_id, &gpio_info);
214 __eic_set_data_mask (&gpio_info, 1);
219 static void sprd_eic_free(unsigned offset)
221 unsigned eic_id = offset;
222 struct eic_info gpio_info;
224 __get_eic_base_info (eic_id, &gpio_info);
225 __eic_set_data_mask (&gpio_info, 0);
230 void sprd_eic_init(void)
232 REG32(REG_AON_APB_APB_EB0) |= BIT_EIC_EB;
233 REG32(REG_AON_APB_APB_RTC_EB) |= BIT_EIC_RTC_EB|BIT_EIC_RTCDV5_EB;
234 ANA_REG_OR(ANA_REG_GLB_ARM_MODULE_EN, BIT_ANA_EIC_EN);
235 ANA_REG_OR(ANA_REG_GLB_RTC_CLK_EN, BIT_RTC_EIC_EN);
238 int get_volumn_down_status2(void)
243 ANA_REG_SET(ADI_EIC_MASK, 0xffff);
249 status = ANA_REG_GET(ADI_EIC_DATA);
250 status = status & (1 << 10);
251 } while(temp_cnt > 0);