1 /******************************************************************************
2 ** File Name: chip_phy_v3.c *
3 ** Author: Richard Yang *
5 ** Copyright: 2002 Spreatrum, Incoporated. All Rights Reserved. *
6 ** Description: This file defines the basic information on chip. *
7 ******************************************************************************
9 ******************************************************************************
11 ** ------------------------------------------------------------------------- *
12 ** DATE NAME DESCRIPTION *
13 ** 08/14/2002 Richard.Yang Create. *
14 ** 09/16/2003 Xueliang.Wang Modify CR4013 *
15 ** 08/23/2004 JImmy.Jia Modify for SC6600D *
16 ******************************************************************************/
18 /**---------------------------------------------------------------------------*
20 **---------------------------------------------------------------------------*/
21 #include "asm/arch/sc_reg.h"
22 #include "asm/arch/adi_hal_internal.h"
23 #include "asm/arch/wdg_drvapi.h"
24 #include "asm/arch/mocor_boot_mode.h"
26 /**---------------------------------------------------------------------------*
28 **---------------------------------------------------------------------------*/
34 /**---------------------------------------------------------------------------*
36 **---------------------------------------------------------------------------*/
39 /**---------------------------------------------------------------------------*
41 **---------------------------------------------------------------------------*/
43 /**---------------------------------------------------------------------------*
45 **---------------------------------------------------------------------------*/
47 /**---------------------------------------------------------------------------*
48 ** Function Definitions *
49 **---------------------------------------------------------------------------*/
50 /*****************************************************************************/
51 // Description : This function is used to reset MCU.
52 // Global resource dependence :
53 // Author : Xueliang.Wang
55 /*****************************************************************************/
56 void CHIP_ResetMCU (void) //reset interrupt disable??
58 // This loop is very important to let the reset process work well on V3 board
62 ANA_REG_OR (ANA_APB_CLK_EN, WDG_EB | RTC_WDG_EB);
70 /*****************************************************************************/
71 // Description: Returns the HW_RST register address.
73 // Note : Because there is no register which can restore information
74 // when watchdog resets the system, so we choose IRAM.
75 /*****************************************************************************/
76 LOCAL uint32 CHIP_PHY_GetHwRstAddr (void)
78 // Returns a DWORD of IRAM shared with DCAM
82 /*****************************************************************************/
83 // Description: Returns the reset mode register address.
86 /*****************************************************************************/
87 LOCAL uint32 CHIP_PHY_GetRstModeAddr (void)
89 return GR_ARM_BOOT_ADDR;
92 /*****************************************************************************/
93 // Description: PHY layer realization of BOOT_SetRstMode.
95 // Note: The valid bit filed is from bit15 to bit0
96 /*****************************************************************************/
97 PUBLIC void CHIP_PHY_SetRstMode(uint32 val)
99 CHIP_REG_AND (CHIP_PHY_GetRstModeAddr (), ~0xFFFF);
100 CHIP_REG_OR (CHIP_PHY_GetRstModeAddr (), (val&0xFFFF));
103 /*****************************************************************************/
104 // Description: PHY layer realization of BOOT_ResetHWFlag. It resets the HW
105 // reset register after system initialization.
107 // Note: The valid bit filed of analog register is from bit11 to bit0.
108 // | 11 10 9 8 | 7 6 5 4 | 3 2 1 0 |
109 // |ALL_HRST_MONITOR | POR_HRST_MONITOR| WDG_HRST_MONITOR |
111 // The valid bit filed of HW_RST is from bit11 to bit0.
112 /*****************************************************************************/
113 PUBLIC void CHIP_PHY_ResetHWFlag (uint32 val)
115 // Reset the analog die register
116 ANA_REG_AND (ANA_HWRST_STATUS, ~0xFFF);
117 ANA_REG_OR (ANA_HWRST_STATUS, (val&0xFFF));
120 CHIP_REG_AND (CHIP_PHY_GetHwRstAddr (), ~0xFFFF);
121 CHIP_REG_OR (CHIP_PHY_GetHwRstAddr (), (val&0xFFFF));
124 /*****************************************************************************/
125 // Description: PHY layer realization of BOOT_SetWDGHWFlag. It Writes flag
126 // to the register which would not be reset by watchdog reset.
128 // Note: The valid bit filed is from bit15 to bit0
129 /*****************************************************************************/
130 PUBLIC void CHIP_PHY_SetWDGHWFlag (WDG_HW_FLAG_T type, uint32 val)
132 if(TYPE_RESET == type)
134 // Switch IRAM from DCAM to ARM
135 REG32 (AHB_CTL1) |= BIT_0;
137 CHIP_REG_AND (CHIP_PHY_GetHwRstAddr (), ~0xFFFF);
138 CHIP_REG_OR (CHIP_PHY_GetHwRstAddr (), (val&0xFFFF));
147 /**---------------------------------------------------------------------------*
149 **---------------------------------------------------------------------------*/