arch/arm/cpu/armv7/omap4/sdram_elpida.c

   1 /*
   2  * Timing and Organization details of the Elpida parts used in OMAP4
   3  * SDPs and Panda
   4  *
   5  * (C) Copyright 2010
   6  * Texas Instruments, <www.ti.com>
   7  *
   8  * Aneesh V <aneesh@ti.com>
   9  *
  10  * See file CREDITS for list of people who contributed to this
  11  * project.
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License as
  15  * published by the Free Software Foundation; either version 2 of
  16  * the License, or (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21  * GNU General Public License for more details.
  22  *
  23  * You should have received a copy of the GNU General Public License
  24  * along with this program; if not, write to the Free Software
  25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26  * MA 02111-1307 USA
  27  */
  28
  29 #include <asm/arch/emif.h>
  30 #include <asm/arch/sys_proto.h>
  31
  32 /*
  33  * This file provides details of the LPDDR2 SDRAM parts used on OMAP4430
  34  * SDP and Panda. Since the parts used and geometry are identical for
  35  * SDP and Panda for a given OMAP4 revision, this information is kept
  36  * here instead of being in board directory. However the key functions
  37  * exported are weakly linked so that they can be over-ridden in the board
  38  * directory if there is a OMAP4 board in the future that uses a different
  39  * memory device or geometry.
  40  *
  41  * For any new board with different memory devices over-ride one or more
  42  * of the following functions as per the CONFIG flags you intend to enable:
  43  * - emif_get_reg_dump()
  44  * - emif_get_dmm_regs()
  45  * - emif_get_device_details()
  46  * - emif_get_device_timings()
  47  */
  48
  49 static const struct emif_regs emif_regs_elpida_200_mhz_2cs = {
  50         .sdram_config_init              = 0x80000eb9,
  51         .sdram_config                   = 0x80001ab9,
  52         .ref_ctrl                       = 0x0000030c,
  53         .sdram_tim1                     = 0x08648311,
  54         .sdram_tim2                     = 0x101b06ca,
  55         .sdram_tim3                     = 0x0048a19f,
  56         .read_idle_ctrl                 = 0x000501ff,
  57         .zq_config                      = 0x500b3214,
  58         .temp_alert_config              = 0xd8016893,
  59         .emif_ddr_phy_ctlr_1_init       = 0x049ffff5,
  60         .emif_ddr_phy_ctlr_1            = 0x049ff808
  61 };
  62
  63 static const struct emif_regs emif_regs_elpida_380_mhz_1cs = {
  64         .sdram_config_init              = 0x80000eb1,
  65         .sdram_config                   = 0x80001ab1,
  66         .ref_ctrl                       = 0x000005cd,
  67         .sdram_tim1                     = 0x10cb0622,
  68         .sdram_tim2                     = 0x20350d52,
  69         .sdram_tim3                     = 0x00b1431f,
  70         .read_idle_ctrl                 = 0x000501ff,
  71         .zq_config                      = 0x500b3214,
  72         .temp_alert_config              = 0x58016893,
  73         .emif_ddr_phy_ctlr_1_init       = 0x049ffff5,
  74         .emif_ddr_phy_ctlr_1            = 0x049ff418
  75 };
  76
  77 const struct emif_regs emif_regs_elpida_400_mhz_2cs = {
  78         .sdram_config_init              = 0x80000eb9,
  79         .sdram_config                   = 0x80001ab9,
  80         .ref_ctrl                       = 0x00000618,
  81         .sdram_tim1                     = 0x10eb0662,
  82         .sdram_tim2                     = 0x20370dd2,
  83         .sdram_tim3                     = 0x00b1c33f,
  84         .read_idle_ctrl                 = 0x000501ff,
  85         .zq_config                      = 0xd00b3214,
  86         .temp_alert_config              = 0xd8016893,
  87         .emif_ddr_phy_ctlr_1_init       = 0x049ffff5,
  88         .emif_ddr_phy_ctlr_1            = 0x049ff418
  89 };
  90 const struct dmm_lisa_map_regs lisa_map_2G_x_1_x_2 = {
  91         .dmm_lisa_map_0 = 0xFF020100,
  92         .dmm_lisa_map_1 = 0,
  93         .dmm_lisa_map_2 = 0,
  94         .dmm_lisa_map_3 = 0x80540300
  95 };
  96
  97 const struct dmm_lisa_map_regs lisa_map_2G_x_2_x_2 = {
  98         .dmm_lisa_map_0 = 0xFF020100,
  99         .dmm_lisa_map_1 = 0,
 100         .dmm_lisa_map_2 = 0,
 101         .dmm_lisa_map_3 = 0x80640300
 102 };
 103
 104 static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs)
 105 {
 106         u32 omap4_rev = omap_revision();
 107
 108         /* Same devices and geometry on both EMIFs */
 109         if (omap4_rev == OMAP4430_ES1_0)
 110                 *regs = &emif_regs_elpida_380_mhz_1cs;
 111         else if (omap4_rev == OMAP4430_ES2_0)
 112                 *regs = &emif_regs_elpida_200_mhz_2cs;
 113         else
 114                 *regs = &emif_regs_elpida_400_mhz_2cs;
 115 }
 116 void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
 117         __attribute__((weak, alias("emif_get_reg_dump_sdp")));
 118
 119 static void emif_get_dmm_regs_sdp(const struct dmm_lisa_map_regs
 120                                                 **dmm_lisa_regs)
 121 {
 122         u32 omap_rev = omap_revision();
 123
 124         if (omap_rev == OMAP4430_ES1_0)
 125                 *dmm_lisa_regs = &lisa_map_2G_x_1_x_2;
 126         else
 127                 *dmm_lisa_regs = &lisa_map_2G_x_2_x_2;
 128 }
 129
 130 void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
 131         __attribute__((weak, alias("emif_get_dmm_regs_sdp")));