2 * Timing and Organization details of the Elpida parts used in OMAP4
6 * Texas Instruments, <www.ti.com>
8 * Aneesh V <aneesh@ti.com>
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <asm/arch/sys_proto.h>
33 * This file provides details of the LPDDR2 SDRAM parts used on OMAP4430
34 * SDP and Panda. Since the parts used and geometry are identical for
35 * SDP and Panda for a given OMAP4 revision, this information is kept
36 * here instead of being in board directory. However the key functions
37 * exported are weakly linked so that they can be over-ridden in the board
38 * directory if there is a OMAP4 board in the future that uses a different
39 * memory device or geometry.
41 * For any new board with different memory devices over-ride one or more
42 * of the following functions as per the CONFIG flags you intend to enable:
43 * - emif_get_reg_dump()
44 * - emif_get_dmm_regs()
45 * - emif_get_device_details()
46 * - emif_get_device_timings()
49 #ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
51 static const struct emif_regs emif_regs_elpida_200_mhz_2cs = {
52 .sdram_config_init = 0x80000eb9,
53 .sdram_config = 0x80001ab9,
54 .ref_ctrl = 0x0000030c,
55 .sdram_tim1 = 0x08648311,
56 .sdram_tim2 = 0x101b06ca,
57 .sdram_tim3 = 0x0048a19f,
58 .read_idle_ctrl = 0x000501ff,
59 .zq_config = 0x500b3214,
60 .temp_alert_config = 0xd8016893,
61 .emif_ddr_phy_ctlr_1_init = 0x049ffff5,
62 .emif_ddr_phy_ctlr_1 = 0x049ff808
65 static const struct emif_regs emif_regs_elpida_380_mhz_1cs = {
66 .sdram_config_init = 0x80000eb1,
67 .sdram_config = 0x80001ab1,
68 .ref_ctrl = 0x000005cd,
69 .sdram_tim1 = 0x10cb0622,
70 .sdram_tim2 = 0x20350d52,
71 .sdram_tim3 = 0x00b1431f,
72 .read_idle_ctrl = 0x000501ff,
73 .zq_config = 0x500b3214,
74 .temp_alert_config = 0x58016893,
75 .emif_ddr_phy_ctlr_1_init = 0x049ffff5,
76 .emif_ddr_phy_ctlr_1 = 0x049ff418
79 const struct emif_regs emif_regs_elpida_400_mhz_2cs = {
80 .sdram_config_init = 0x80000eb9,
81 .sdram_config = 0x80001ab9,
82 .ref_ctrl = 0x00000618,
83 .sdram_tim1 = 0x10eb0662,
84 .sdram_tim2 = 0x20370dd2,
85 .sdram_tim3 = 0x00b1c33f,
86 .read_idle_ctrl = 0x000501ff,
87 .zq_config = 0xd00b3214,
88 .temp_alert_config = 0xd8016893,
89 .emif_ddr_phy_ctlr_1_init = 0x049ffff5,
90 .emif_ddr_phy_ctlr_1 = 0x049ff418
93 const struct dmm_lisa_map_regs lisa_map_2G_x_1_x_2 = {
94 .dmm_lisa_map_0 = 0xFF020100,
97 .dmm_lisa_map_3 = 0x80540300,
101 const struct dmm_lisa_map_regs lisa_map_2G_x_2_x_2 = {
102 .dmm_lisa_map_0 = 0xFF020100,
105 .dmm_lisa_map_3 = 0x80640300,
109 const struct dmm_lisa_map_regs ma_lisa_map_2G_x_2_x_2 = {
110 .dmm_lisa_map_0 = 0xFF020100,
113 .dmm_lisa_map_3 = 0x80640300,
117 static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs)
119 u32 omap4_rev = omap_revision();
121 /* Same devices and geometry on both EMIFs */
122 if (omap4_rev == OMAP4430_ES1_0)
123 *regs = &emif_regs_elpida_380_mhz_1cs;
124 else if (omap4_rev == OMAP4430_ES2_0)
125 *regs = &emif_regs_elpida_200_mhz_2cs;
127 *regs = &emif_regs_elpida_400_mhz_2cs;
129 void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
130 __attribute__((weak, alias("emif_get_reg_dump_sdp")));
132 static void emif_get_dmm_regs_sdp(const struct dmm_lisa_map_regs
135 u32 omap_rev = omap_revision();
137 if (omap_rev == OMAP4430_ES1_0)
138 *dmm_lisa_regs = &lisa_map_2G_x_1_x_2;
139 else if (omap_rev < OMAP4460_ES1_0)
140 *dmm_lisa_regs = &lisa_map_2G_x_2_x_2;
142 *dmm_lisa_regs = &ma_lisa_map_2G_x_2_x_2;
145 void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
146 __attribute__((weak, alias("emif_get_dmm_regs_sdp")));
150 static const struct lpddr2_device_details elpida_2G_S4_details = {
151 .type = LPDDR2_TYPE_S4,
152 .density = LPDDR2_DENSITY_2Gb,
153 .io_width = LPDDR2_IO_WIDTH_32,
154 .manufacturer = LPDDR2_MANUFACTURER_ELPIDA
157 struct lpddr2_device_details *emif_get_device_details_sdp(u32 emif_nr, u8 cs,
158 struct lpddr2_device_details *lpddr2_dev_details)
160 u32 omap_rev = omap_revision();
162 /* EMIF1 & EMIF2 have identical configuration */
163 if ((omap_rev == OMAP4430_ES1_0) && (cs == CS1)) {
164 /* Nothing connected on CS1 for ES1.0 */
167 /* In all other cases Elpida 2G device */
168 *lpddr2_dev_details = elpida_2G_S4_details;
169 return lpddr2_dev_details;
173 struct lpddr2_device_details *emif_get_device_details(u32 emif_nr, u8 cs,
174 struct lpddr2_device_details *lpddr2_dev_details)
175 __attribute__((weak, alias("emif_get_device_details_sdp")));
177 #endif /* CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS */
179 #ifndef CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
180 static const struct lpddr2_ac_timings timings_elpida_400_mhz = {
181 .max_freq = 400000000,
203 static const struct lpddr2_ac_timings timings_elpida_333_mhz = {
204 .max_freq = 333000000,
226 static const struct lpddr2_ac_timings timings_elpida_200_mhz = {
227 .max_freq = 200000000,
249 static const struct lpddr2_min_tck min_tck_elpida = {
264 static const struct lpddr2_ac_timings *elpida_ac_timings[MAX_NUM_SPEEDBINS] = {
265 &timings_elpida_200_mhz,
266 &timings_elpida_333_mhz,
267 &timings_elpida_400_mhz
270 static const struct lpddr2_device_timings elpida_2G_S4_timings = {
271 .ac_timings = elpida_ac_timings,
272 .min_tck = &min_tck_elpida,
275 void emif_get_device_timings_sdp(u32 emif_nr,
276 const struct lpddr2_device_timings **cs0_device_timings,
277 const struct lpddr2_device_timings **cs1_device_timings)
279 u32 omap_rev = omap_revision();
281 /* Identical devices on EMIF1 & EMIF2 */
282 *cs0_device_timings = &elpida_2G_S4_timings;
284 if (omap_rev == OMAP4430_ES1_0)
285 *cs1_device_timings = NULL;
287 *cs1_device_timings = &elpida_2G_S4_timings;
290 void emif_get_device_timings(u32 emif_nr,
291 const struct lpddr2_device_timings **cs0_device_timings,
292 const struct lpddr2_device_timings **cs1_device_timings)
293 __attribute__((weak, alias("emif_get_device_timings_sdp")));
295 #endif /* CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS */
297 const struct lpddr2_mr_regs mr_regs = {
298 .mr1 = MR1_BL_8_BT_SEQ_WRAP_EN_NWR_3,
301 .mr10 = MR10_ZQ_ZQINIT,
302 .mr16 = MR16_REF_FULL_ARRAY
305 void get_lpddr2_mr_regs(const struct lpddr2_mr_regs **regs)