2 * (C) Copyright 2009 DENX Software Engineering
3 * Author: John Rigby <jrigby@gmail.com>
5 * Based on mx27/generic.c:
6 * Copyright (c) 2008 Eric Jarrige <eric.jarrige@armadeus.org>
7 * Copyright (c) 2009 Ilya Yanok <yanok@emcraft.com>
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/arch/imx-regs.h>
30 #include <asm/arch/imx25-pinmux.h>
31 #include <asm/arch/clock.h>
33 #include <asm/arch/mxcmmc.h>
36 #ifdef CONFIG_FSL_ESDHC
37 DECLARE_GLOBAL_DATA_PTR;
41 * get the system pll clock in Hz
43 * mfi + mfn / (mfd +1)
44 * f = 2 * f_ref * --------------------
47 static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)
49 unsigned int mfi = (pll >> CCM_PLL_MFI_SHIFT)
51 int mfn = (pll >> CCM_PLL_MFN_SHIFT)
53 unsigned int mfd = (pll >> CCM_PLL_MFD_SHIFT)
55 unsigned int pd = (pll >> CCM_PLL_PD_SHIFT)
58 mfi = mfi <= 5 ? 5 : mfi;
59 mfn = mfn >= 512 ? mfn - 1024 : mfn;
63 return lldiv(2 * (u64) f_ref * (mfi * mfd + mfn),
67 static ulong imx_get_mpllclk(void)
69 struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
70 ulong fref = MXC_HCLK;
72 return imx_decode_pll(readl(&ccm->mpctl), fref);
75 ulong imx_get_armclk(void)
77 struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
78 ulong cctl = readl(&ccm->cctl);
79 ulong fref = imx_get_mpllclk();
82 if (cctl & CCM_CCTL_ARM_SRC)
83 fref = lldiv((u64) fref * 3, 4);
85 div = ((cctl >> CCM_CCTL_ARM_DIV_SHIFT)
86 & CCM_CCTL_ARM_DIV_MASK) + 1;
91 ulong imx_get_ahbclk(void)
93 struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
94 ulong cctl = readl(&ccm->cctl);
95 ulong fref = imx_get_armclk();
98 div = ((cctl >> CCM_CCTL_AHB_DIV_SHIFT)
99 & CCM_CCTL_AHB_DIV_MASK) + 1;
104 static ulong imx_get_ipgclk(void)
106 return imx_get_ahbclk() / 2;
109 ulong imx_get_perclk(int clk)
111 struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
112 ulong fref = imx_get_ahbclk();
115 div = readl(&ccm->pcdr[CCM_PERCLK_REG(clk)]);
116 div = ((div >> CCM_PERCLK_SHIFT(clk)) & CCM_PERCLK_MASK) + 1;
121 unsigned int mxc_get_clock(enum mxc_clock clk)
123 if (clk >= MXC_CLK_NUM)
127 return imx_get_armclk();
129 return imx_get_ahbclk();
132 return imx_get_ipgclk();
134 return imx_get_ahbclk();
136 return imx_get_perclk(clk);
140 u32 get_cpu_rev(void)
143 u32 system_rev = 0x25000;
145 /* read SREV register from IIM module */
146 struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
147 srev = readl(&iim->iim_srev);
151 system_rev |= CHIP_REV_1_0;
154 system_rev |= CHIP_REV_1_1;
157 system_rev |= CHIP_REV_1_2;
160 system_rev |= 0x8000;
167 #if defined(CONFIG_DISPLAY_CPUINFO)
168 static char *get_reset_cause(void)
170 /* read RCSR register from CCM module */
171 struct ccm_regs *ccm =
172 (struct ccm_regs *)IMX_CCM_BASE;
174 u32 cause = readl(&ccm->rcsr) & 0x0f;
180 else if ((cause & 2) == 2)
182 else if ((cause & 4) == 4)
184 else if ((cause & 8) == 8)
187 return "unknown reset";
191 int print_cpuinfo(void)
194 u32 cpurev = get_cpu_rev();
196 printf("CPU: Freescale i.MX25 rev%d.%d%s at %s MHz\n",
197 (cpurev & 0xF0) >> 4, (cpurev & 0x0F),
198 ((cpurev & 0x8000) ? " unknown" : ""),
199 strmhz(buf, imx_get_armclk()));
200 printf("Reset cause: %s\n\n", get_reset_cause());
205 void enable_caches(void)
207 #ifndef CONFIG_SYS_DCACHE_OFF
208 /* Enable D-cache. I-cache is already enabled in start.S */
213 int cpu_eth_init(bd_t *bis)
215 #if defined(CONFIG_FEC_MXC)
216 struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
219 val = readl(&ccm->cgr0);
221 writel(val, &ccm->cgr0);
222 return fecmxc_initialize(bis);
230 #ifdef CONFIG_FSL_ESDHC
231 gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
237 * Initializes on-chip MMC controllers.
238 * to override, implement board_mmc_init()
240 int cpu_mmc_init(bd_t *bis)
242 #ifdef CONFIG_MXC_MMC
243 return mxc_mmc_init(bis);
249 #ifdef CONFIG_MXC_UART
250 void mx25_uart1_init_pins(void)
252 struct iomuxc_mux_ctl *muxctl;
253 struct iomuxc_pad_ctl *padctl;
258 muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
259 padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
260 muxmode0 = MX25_PIN_MUX_MODE(0);
262 * set up input pins with hysteresis and 100K pull-ups
264 inpadctl = MX25_PIN_PAD_CTL_HYS
265 | MX25_PIN_PAD_CTL_PKE
266 | MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_100K_PU;
269 * set up output pins with 100K pull-downs
270 * FIXME: need to revisit this
271 * PUE is ignored if PKE is not set
272 * so the right value here is likely
273 * 0x0 for no pull up/down
275 * 0xc0 for 100k pull down
277 outpadctl = MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_100K_PD;
281 writel(muxmode0, &muxctl->pad_uart1_rxd);
282 writel(inpadctl, &padctl->pad_uart1_rxd);
285 writel(muxmode0, &muxctl->pad_uart1_txd);
286 writel(outpadctl, &padctl->pad_uart1_txd);
289 writel(muxmode0, &muxctl->pad_uart1_rts);
290 writel(outpadctl, &padctl->pad_uart1_rts);
293 writel(muxmode0, &muxctl->pad_uart1_cts);
294 writel(inpadctl, &padctl->pad_uart1_cts);
296 #endif /* CONFIG_MXC_UART */
298 #ifdef CONFIG_FEC_MXC
299 void mx25_fec_init_pins(void)
301 struct iomuxc_mux_ctl *muxctl;
302 struct iomuxc_pad_ctl *padctl;
308 muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
309 padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
310 muxmode0 = MX25_PIN_MUX_MODE(0);
311 inpadctl_100kpd = MX25_PIN_PAD_CTL_HYS
312 | MX25_PIN_PAD_CTL_PKE
313 | MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_100K_PD;
314 inpadctl_22kpu = MX25_PIN_PAD_CTL_HYS
315 | MX25_PIN_PAD_CTL_PKE
316 | MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_22K_PU;
318 * set up output pins with 100K pull-downs
319 * FIXME: need to revisit this
320 * PUE is ignored if PKE is not set
321 * so the right value here is likely
324 * 0xc0 for 100k pull down
326 outpadctl = MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_100K_PD;
329 writel(muxmode0, &muxctl->pad_fec_tx_clk);
330 writel(inpadctl_100kpd, &padctl->pad_fec_tx_clk);
333 writel(muxmode0, &muxctl->pad_fec_rx_dv);
334 writel(inpadctl_100kpd, &padctl->pad_fec_rx_dv);
337 writel(muxmode0, &muxctl->pad_fec_rdata0);
338 writel(inpadctl_100kpd, &padctl->pad_fec_rdata0);
341 writel(muxmode0, &muxctl->pad_fec_tdata0);
342 writel(outpadctl, &padctl->pad_fec_tdata0);
345 writel(muxmode0, &muxctl->pad_fec_tx_en);
346 writel(outpadctl, &padctl->pad_fec_tx_en);
349 writel(muxmode0, &muxctl->pad_fec_mdc);
350 writel(outpadctl, &padctl->pad_fec_mdc);
353 writel(muxmode0, &muxctl->pad_fec_mdio);
354 writel(inpadctl_22kpu, &padctl->pad_fec_mdio);
357 writel(muxmode0, &muxctl->pad_fec_rdata1);
358 writel(inpadctl_100kpd, &padctl->pad_fec_rdata1);
361 writel(muxmode0, &muxctl->pad_fec_tdata1);
362 writel(outpadctl, &padctl->pad_fec_tdata1);
366 void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
369 struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
370 struct fuse_bank *bank = &iim->bank[0];
371 struct fuse_bank0_regs *fuse =
372 (struct fuse_bank0_regs *)bank->fuse_regs;
374 for (i = 0; i < 6; i++)
375 mac[i] = readl(&fuse->mac_addr[i]) & 0xff;
377 #endif /* CONFIG_FEC_MXC */