2 * armboot - Startup Code for ARM920 CPU-core
4 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
5 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
6 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #include <asm-offsets.h>
32 *************************************************************************
34 * Jump vector table as in table 3.1 in [1]
36 *************************************************************************
42 ldr pc, _undefined_instruction
43 ldr pc, _software_interrupt
44 ldr pc, _prefetch_abort
50 _undefined_instruction: .word undefined_instruction
51 _software_interrupt: .word software_interrupt
52 _prefetch_abort: .word prefetch_abort
53 _data_abort: .word data_abort
54 _not_used: .word not_used
58 .balignl 16,0xdeadbeef
62 *************************************************************************
64 * Startup Code (called from the ARM reset exception vector)
66 * do important init only if we don't start from memory!
67 * relocate armboot to ram
69 * jump to second stage
71 *************************************************************************
76 .word CONFIG_SYS_TEXT_BASE
78 #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
85 * These are defined in the board-specific linker script.
96 /* IRQ stack memory (calculated at run-time) */
97 .globl IRQ_STACK_START
101 /* IRQ stack memory (calculated at run-time) */
102 .globl FIQ_STACK_START
107 #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
108 /* IRQ stack memory (calculated at run-time) + 8 bytes */
109 .globl IRQ_STACK_START_IN
113 .globl _datarel_start
115 .word __datarel_start
117 .globl _datarelrolocal_start
118 _datarelrolocal_start:
119 .word __datarelrolocal_start
121 .globl _datarellocal_start
123 .word __datarellocal_start
125 .globl _datarelro_start
127 .word __datarelro_start
138 * the actual start code
143 * set the cpu to SVC32 mode
153 #if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK)
155 * relocate exception table
167 #ifdef CONFIG_S3C24X0
168 /* turn off the watchdog */
170 # if defined(CONFIG_S3C2400)
171 # define pWTCON 0x15300000
172 # define INTMSK 0x14400008 /* Interupt-Controller base addresses */
173 # define CLKDIVN 0x14800014 /* clock divisor register */
175 # define pWTCON 0x53000000
176 # define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
177 # define INTSUBMSK 0x4A00001C
178 # define CLKDIVN 0x4C000014 /* clock divisor register */
186 * mask all IRQs by setting all bits in the INTMR - default
191 # if defined(CONFIG_S3C2410)
197 /* FCLK:HCLK:PCLK = 1:2:4 */
198 /* default FCLK is 120 MHz ! */
202 #endif /* CONFIG_S3C24X0 */
205 * we do sys-critical inits only at reboot,
206 * not when booting from ram!
208 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
212 /* Set stackpointer in internal RAM to call board_init_f */
214 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
218 /*------------------------------------------------------------------------------*/
221 * void relocate_code (addr_sp, gd, addr_moni)
223 * This "function" does not return, instead it continues in RAM
224 * after relocating the monitor code.
229 mov r4, r0 /* save addr_sp */
230 mov r5, r1 /* save addr of gd */
231 mov r6, r2 /* save addr of destination */
232 mov r7, r2 /* save addr of destination */
234 /* Set up the stack */
241 sub r2, r3, r2 /* r2 <- size of armboot */
242 add r2, r0, r2 /* r2 <- source end address */
246 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
248 ldmia r0!, {r9-r10} /* copy from source address [r0] */
249 stmia r6!, {r9-r10} /* copy to target address [r1] */
250 cmp r0, r2 /* until source end address [r2] */
253 #ifndef CONFIG_PRELOADER
254 /* fix got entries */
255 ldr r1, _TEXT_BASE /* Text base */
256 mov r0, r7 /* reloc addr */
257 ldr r2, _got_start /* addr in Flash */
258 ldr r3, _got_end /* addr in Flash */
273 #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
276 #ifndef CONFIG_PRELOADER
279 ldr r3, _TEXT_BASE /* Text base */
280 mov r4, r7 /* reloc addr */
285 mov r2, #0x00000000 /* clear */
287 clbss_l:str r2, [r0] /* clear loop... */
297 * We are done. Do not return, instead branch to second part of board
298 * initialization, now running from RAM.
300 #ifdef CONFIG_NAND_SPL
303 _nand_boot: .word nand_boot
306 ldr r2, _board_init_r
308 add r2, r2, r7 /* position from board_init_r in RAM */
309 /* setup parameters for board_init_r */
310 mov r0, r5 /* gd_t */
311 mov r1, r7 /* dest_addr */
316 _board_init_r: .word board_init_r
319 #else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
321 * the actual start code
326 * set the cpu to SVC32 mode
336 #if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK)
338 * relocate exception table
350 #ifdef CONFIG_S3C24X0
351 /* turn off the watchdog */
353 # if defined(CONFIG_S3C2400)
354 # define pWTCON 0x15300000
355 # define INTMSK 0x14400008 /* Interupt-Controller base addresses */
356 # define CLKDIVN 0x14800014 /* clock divisor register */
358 # define pWTCON 0x53000000
359 # define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
360 # define INTSUBMSK 0x4A00001C
361 # define CLKDIVN 0x4C000014 /* clock divisor register */
369 * mask all IRQs by setting all bits in the INTMR - default
374 # if defined(CONFIG_S3C2410)
380 /* FCLK:HCLK:PCLK = 1:2:4 */
381 /* default FCLK is 120 MHz ! */
385 #endif /* CONFIG_S3C24X0 */
388 * we do sys-critical inits only at reboot,
389 * not when booting from ram!
391 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
395 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
396 relocate: /* relocate U-Boot to RAM */
397 adr r0, _start /* r0 <- current position of code */
398 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
399 cmp r0, r1 /* don't reloc during debug */
402 ldr r2, _armboot_start
404 sub r2, r3, r2 /* r2 <- size of armboot */
405 add r2, r0, r2 /* r2 <- source end address */
408 ldmia r0!, {r3-r10} /* copy from source address [r0] */
409 stmia r1!, {r3-r10} /* copy to target address [r1] */
410 cmp r0, r2 /* until source end address [r2] */
412 #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
414 /* Set up the stack */
416 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
417 sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
418 sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
419 #ifdef CONFIG_USE_IRQ
420 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
422 sub sp, r0, #12 /* leave 3 words for abort-stack */
423 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
426 ldr r0, _bss_start /* find start of bss segment */
427 ldr r1, _bss_end /* stop here */
428 mov r2, #0x00000000 /* clear */
430 clbss_l:str r2, [r0] /* clear loop... */
435 ldr pc, _start_armboot
437 _start_armboot: .word start_armboot
438 #endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
441 *************************************************************************
443 * CPU_init_critical registers
445 * setup important registers
446 * setup memory timing
448 *************************************************************************
452 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
455 * flush v4 I/D caches
458 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
459 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
462 * disable MMU stuff and caches
464 mrc p15, 0, r0, c1, c0, 0
465 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
466 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
467 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
468 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
469 mcr p15, 0, r0, c1, c0, 0
472 * before relocating, we have to setup RAM timing
473 * because memory timing is board-dependend, you will
474 * find a lowlevel_init.S in your board directory.
482 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
485 *************************************************************************
489 *************************************************************************
495 #define S_FRAME_SIZE 72
517 #define MODE_SVC 0x13
521 * use bad_save_user_regs for abort/prefetch/undef/swi ...
522 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
525 .macro bad_save_user_regs
526 sub sp, sp, #S_FRAME_SIZE
527 stmia sp, {r0 - r12} @ Calling r0-r12
528 #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
529 ldr r2, _armboot_start
530 sub r2, r2, #(CONFIG_STACKSIZE)
531 sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
532 /* set base 2 words into abort stack */
533 sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8)
535 ldr r2, IRQ_STACK_START_IN
537 ldmia r2, {r2 - r3} @ get pc, cpsr
538 add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
542 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
546 .macro irq_save_user_regs
547 sub sp, sp, #S_FRAME_SIZE
548 stmia sp, {r0 - r12} @ Calling r0-r12
550 stmdb r7, {sp, lr}^ @ Calling SP, LR
551 str lr, [r7, #0] @ Save calling PC
553 str r6, [r7, #4] @ Save CPSR
554 str r0, [r7, #8] @ Save OLD_R0
558 .macro irq_restore_user_regs
559 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
561 ldr lr, [sp, #S_PC] @ Get PC
562 add sp, sp, #S_FRAME_SIZE
563 /* return & move spsr_svc into cpsr */
568 #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
569 ldr r13, _armboot_start @ setup our mode stack
570 sub r13, r13, #(CONFIG_STACKSIZE)
571 sub r13, r13, #(CONFIG_SYS_MALLOC_LEN)
572 /* reserve a couple spots in abort stack */
573 sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8)
575 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
578 str lr, [r13] @ save caller lr / spsr
582 mov r13, #MODE_SVC @ prepare SVC-Mode
589 .macro get_irq_stack @ setup IRQ stack
590 ldr sp, IRQ_STACK_START
593 .macro get_fiq_stack @ setup FIQ stack
594 ldr sp, FIQ_STACK_START
601 undefined_instruction:
604 bl do_undefined_instruction
610 bl do_software_interrupt
630 #ifdef CONFIG_USE_IRQ
637 irq_restore_user_regs
642 /* someone ought to write a more effiction fiq_save_user_regs */
645 irq_restore_user_regs