2 * (C) Copyright 2009 Faraday Technology
3 * Po-Yu Chuang <ratbert@faraday-tech.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <asm/arch/ftpmu010.h>
23 #include <asm/arch/fttmr010.h>
25 static ulong timestamp;
28 static struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE;
29 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
31 #define TIMER_CLOCK 32768
32 #define TIMER_LOAD_VAL 0xffffffff
39 debug("%s()\n", __func__);
45 * use 32768Hz oscillator for RTC, WDT, TIMER
48 /* enable the 32768Hz oscillator */
49 oscc = readl(&pmu->OSCC);
50 oscc &= ~(FTPMU010_OSCC_OSCL_OFF | FTPMU010_OSCC_OSCL_TRI);
51 writel(oscc, &pmu->OSCC);
53 /* wait until ready */
54 while (!(readl(&pmu->OSCC) & FTPMU010_OSCC_OSCL_STABLE))
57 /* select 32768Hz oscillator */
58 oscc = readl(&pmu->OSCC);
59 oscc |= FTPMU010_OSCC_OSCL_RTCLSEL;
60 writel(oscc, &pmu->OSCC);
63 writel(TIMER_LOAD_VAL, &tmr->timer3_load);
64 writel(TIMER_LOAD_VAL, &tmr->timer3_counter);
65 writel(0, &tmr->timer3_match1);
66 writel(0, &tmr->timer3_match2);
68 /* we don't want timer to issue interrupts */
69 writel(FTTMR010_TM3_MATCH1 |
71 FTTMR010_TM3_OVERFLOW,
72 &tmr->interrupt_mask);
75 cr |= FTTMR010_TM3_CLOCK; /* use external clock */
76 cr |= FTTMR010_TM3_ENABLE;
79 /* init the timestamp and lastdec value */
86 * timer without interrupts
92 void reset_timer_masked(void)
94 /* capure current decrementer value time */
95 lastdec = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
96 timestamp = 0; /* start "advancing" time stamp from 0 */
98 debug("%s(): lastdec = %lx\n", __func__, lastdec);
101 void reset_timer(void)
103 debug("%s()\n", __func__);
104 reset_timer_masked();
110 ulong get_timer_masked(void)
112 /* current tick value */
113 ulong now = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
115 debug("%s(): now = %lx, lastdec = %lx\n", __func__, now, lastdec);
117 if (lastdec >= now) {
119 * normal mode (non roll)
120 * move stamp fordward with absoulte diff ticks
122 timestamp += lastdec - now;
125 * we have overflow of the count down timer
127 * nts = ts + ld + (TLV - now)
128 * ts=old stamp, ld=time that passed before passing through -1
129 * (TLV-now) amount of time after passing though -1
130 * nts = new "advancing time stamp"...it could also roll and
133 timestamp += lastdec + TIMER_LOAD_VAL - now;
138 debug("%s() returns %lx\n", __func__, timestamp);
144 * return difference between timer ticks and base
146 ulong get_timer(ulong base)
148 debug("%s(%lx)\n", __func__, base);
149 return get_timer_masked() - base;
152 void set_timer(ulong t)
154 debug("%s(%lx)\n", __func__, t);
158 /* delay x useconds AND preserve advance timestamp value */
159 void __udelay(unsigned long usec)
161 long tmo = usec * (TIMER_CLOCK / 1000) / 1000;
162 unsigned long now, last = readl(&tmr->timer3_counter);
164 debug("%s(%lu)\n", __func__, usec);
166 now = readl(&tmr->timer3_counter);
167 if (now > last) /* count down timer overflow */
168 tmo -= TIMER_LOAD_VAL + last - now;
176 * This function is derived from PowerPC code (read timebase as long long).
177 * On ARM it just returns the timer value.
179 unsigned long long get_ticks(void)
181 debug("%s()\n", __func__);
186 * This function is derived from PowerPC code (timebase clock frequency).
187 * On ARM it returns the number of timer ticks per second.
189 ulong get_tbclk(void)
191 debug("%s()\n", __func__);
192 return CONFIG_SYS_HZ;