arm: factorize relocate_code routine
[platform/kernel/u-boot.git] / arch / arm / cpu / arm720t / start.S
1 /*
2  *  armboot - Startup Code for ARM720 CPU-core
3  *
4  *  Copyright (c) 2001  Marius Gröger <mag@sysgo.de>
5  *  Copyright (c) 2002  Alex Züpke <azu@sysgo.de>
6  *
7  * See file CREDITS for list of people who contributed to this
8  * project.
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License as
12  * published by the Free Software Foundation; either version 2 of
13  * the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23  * MA 02111-1307 USA
24  */
25
26 #include <asm-offsets.h>
27 #include <config.h>
28 #include <version.h>
29 #include <asm/hardware.h>
30
31 /*
32  *************************************************************************
33  *
34  * Jump vector table as in table 3.1 in [1]
35  *
36  *************************************************************************
37  */
38
39
40 .globl _start
41 _start: b       reset
42         ldr     pc, _undefined_instruction
43         ldr     pc, _software_interrupt
44         ldr     pc, _prefetch_abort
45         ldr     pc, _data_abort
46         ldr     pc, _not_used
47         ldr     pc, _irq
48         ldr     pc, _fiq
49
50 #ifdef CONFIG_SPL_BUILD
51 _undefined_instruction: .word _undefined_instruction
52 _software_interrupt:    .word _software_interrupt
53 _prefetch_abort:        .word _prefetch_abort
54 _data_abort:            .word _data_abort
55 _not_used:              .word _not_used
56 _irq:                   .word _irq
57 _fiq:                   .word _fiq
58 _pad:                   .word 0x12345678 /* now 16*4=64 */
59 #else
60 _undefined_instruction: .word undefined_instruction
61 _software_interrupt:    .word software_interrupt
62 _prefetch_abort:        .word prefetch_abort
63 _data_abort:            .word data_abort
64 _not_used:              .word not_used
65 _irq:                   .word irq
66 _fiq:                   .word fiq
67 _pad:                   .word 0x12345678 /* now 16*4=64 */
68 #endif  /* CONFIG_SPL_BUILD */
69
70         .balignl 16,0xdeadbeef
71
72
73 /*
74  *************************************************************************
75  *
76  * Startup Code (reset vector)
77  *
78  * do important init only if we don't start from RAM!
79  * relocate armboot to ram
80  * setup stack
81  * jump to second stage
82  *
83  *************************************************************************
84  */
85
86 .globl _TEXT_BASE
87 _TEXT_BASE:
88 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
89         .word   CONFIG_SPL_TEXT_BASE
90 #else
91         .word   CONFIG_SYS_TEXT_BASE
92 #endif
93
94 /*
95  * These are defined in the board-specific linker script.
96  * Subtracting _start from them lets the linker put their
97  * relative position in the executable instead of leaving
98  * them null.
99  */
100 .globl _bss_start_ofs
101 _bss_start_ofs:
102         .word __bss_start - _start
103
104 .globl _bss_end_ofs
105 _bss_end_ofs:
106         .word __bss_end - _start
107
108 .globl _end_ofs
109 _end_ofs:
110         .word _end - _start
111
112 #ifdef CONFIG_USE_IRQ
113 /* IRQ stack memory (calculated at run-time) */
114 .globl IRQ_STACK_START
115 IRQ_STACK_START:
116         .word   0x0badc0de
117
118 /* IRQ stack memory (calculated at run-time) */
119 .globl FIQ_STACK_START
120 FIQ_STACK_START:
121         .word 0x0badc0de
122 #endif
123
124 /* IRQ stack memory (calculated at run-time) + 8 bytes */
125 .globl IRQ_STACK_START_IN
126 IRQ_STACK_START_IN:
127         .word   0x0badc0de
128
129 /*
130  * the actual reset code
131  */
132
133 reset:
134         /*
135          * set the cpu to SVC32 mode
136          */
137         mrs     r0,cpsr
138         bic     r0,r0,#0x1f
139         orr     r0,r0,#0xd3
140         msr     cpsr,r0
141
142         /*
143          * we do sys-critical inits only at reboot,
144          * not when booting from ram!
145          */
146 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
147         bl      cpu_init_crit
148 #endif
149
150         bl      _main
151
152 /*------------------------------------------------------------------------------*/
153
154         .globl  c_runtime_cpu_setup
155 c_runtime_cpu_setup:
156
157         mov     pc, lr
158
159 /*
160  *************************************************************************
161  *
162  * CPU_init_critical registers
163  *
164  * setup important registers
165  * setup memory timing
166  *
167  *************************************************************************
168  */
169
170 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
171 cpu_init_crit:
172
173         mov     ip, lr
174         /*
175          * before relocating, we have to setup RAM timing
176          * because memory timing is board-dependent, you will
177          * find a lowlevel_init.S in your board directory.
178          */
179         bl      lowlevel_init
180         mov     lr, ip
181
182         mov     pc, lr
183 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
184
185
186 #ifndef CONFIG_SPL_BUILD
187 /*
188  *************************************************************************
189  *
190  * Interrupt handling
191  *
192  *************************************************************************
193  */
194
195 @
196 @ IRQ stack frame.
197 @
198 #define S_FRAME_SIZE    72
199
200 #define S_OLD_R0        68
201 #define S_PSR           64
202 #define S_PC            60
203 #define S_LR            56
204 #define S_SP            52
205
206 #define S_IP            48
207 #define S_FP            44
208 #define S_R10           40
209 #define S_R9            36
210 #define S_R8            32
211 #define S_R7            28
212 #define S_R6            24
213 #define S_R5            20
214 #define S_R4            16
215 #define S_R3            12
216 #define S_R2            8
217 #define S_R1            4
218 #define S_R0            0
219
220 #define MODE_SVC 0x13
221 #define I_BIT    0x80
222
223 /*
224  * use bad_save_user_regs for abort/prefetch/undef/swi ...
225  * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
226  */
227
228         .macro  bad_save_user_regs
229         sub     sp, sp, #S_FRAME_SIZE
230         stmia   sp, {r0 - r12}                  @ Calling r0-r12
231         add     r8, sp, #S_PC
232
233         ldr     r2, IRQ_STACK_START_IN
234         ldmia   r2, {r2 - r4}                   @ get pc, cpsr, old_r0
235         add     r0, sp, #S_FRAME_SIZE           @ restore sp_SVC
236
237         add     r5, sp, #S_SP
238         mov     r1, lr
239         stmia   r5, {r0 - r4}                   @ save sp_SVC, lr_SVC, pc, cpsr, old_r
240         mov     r0, sp
241         .endm
242
243         .macro  irq_save_user_regs
244         sub     sp, sp, #S_FRAME_SIZE
245         stmia   sp, {r0 - r12}                  @ Calling r0-r12
246         add     r8, sp, #S_PC
247         stmdb   r8, {sp, lr}^                   @ Calling SP, LR
248         str     lr, [r8, #0]                    @ Save calling PC
249         mrs     r6, spsr
250         str     r6, [r8, #4]                    @ Save CPSR
251         str     r0, [r8, #8]                    @ Save OLD_R0
252         mov     r0, sp
253         .endm
254
255         .macro  irq_restore_user_regs
256         ldmia   sp, {r0 - lr}^                  @ Calling r0 - lr
257         mov     r0, r0
258         ldr     lr, [sp, #S_PC]                 @ Get PC
259         add     sp, sp, #S_FRAME_SIZE
260         subs    pc, lr, #4                      @ return & move spsr_svc into cpsr
261         .endm
262
263         .macro get_bad_stack
264         ldr     r13, IRQ_STACK_START_IN         @ setup our mode stack
265
266         str     lr, [r13]                       @ save caller lr / spsr
267         mrs     lr, spsr
268         str     lr, [r13, #4]
269
270         mov     r13, #MODE_SVC                  @ prepare SVC-Mode
271         msr     spsr_c, r13
272         mov     lr, pc
273         movs    pc, lr
274         .endm
275
276         .macro get_irq_stack                    @ setup IRQ stack
277         ldr     sp, IRQ_STACK_START
278         .endm
279
280         .macro get_fiq_stack                    @ setup FIQ stack
281         ldr     sp, FIQ_STACK_START
282         .endm
283
284 /*
285  * exception handlers
286  */
287         .align  5
288 undefined_instruction:
289         get_bad_stack
290         bad_save_user_regs
291         bl      do_undefined_instruction
292
293         .align  5
294 software_interrupt:
295         get_bad_stack
296         bad_save_user_regs
297         bl      do_software_interrupt
298
299         .align  5
300 prefetch_abort:
301         get_bad_stack
302         bad_save_user_regs
303         bl      do_prefetch_abort
304
305         .align  5
306 data_abort:
307         get_bad_stack
308         bad_save_user_regs
309         bl      do_data_abort
310
311         .align  5
312 not_used:
313         get_bad_stack
314         bad_save_user_regs
315         bl      do_not_used
316
317 #ifdef CONFIG_USE_IRQ
318
319         .align  5
320 irq:
321         get_irq_stack
322         irq_save_user_regs
323         bl      do_irq
324         irq_restore_user_regs
325
326         .align  5
327 fiq:
328         get_fiq_stack
329         /* someone ought to write a more effiction fiq_save_user_regs */
330         irq_save_user_regs
331         bl      do_fiq
332         irq_restore_user_regs
333
334 #else
335
336         .align  5
337 irq:
338         get_bad_stack
339         bad_save_user_regs
340         bl      do_irq
341
342         .align  5
343 fiq:
344         get_bad_stack
345         bad_save_user_regs
346         bl      do_fiq
347
348 #endif
349 #endif /* CONFIG_SPL_BUILD */