arch/arm/boot/dts/wm8650.dtsi

   1 /*
   2  * wm8650.dtsi - Device tree file for Wondermedia WM8650 SoC
   3  *
   4  * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
   5  *
   6  * Licensed under GPLv2 or later
   7  */
   8
   9 /include/ "skeleton.dtsi"
  10
  11 / {
  12         compatible = "wm,wm8650";
  13
  14         soc {
  15                 #address-cells = <1>;
  16                 #size-cells = <1>;
  17                 compatible = "simple-bus";
  18                 ranges;
  19                 interrupt-parent = <&intc0>;
  20
  21                 intc0: interrupt-controller@d8140000 {
  22                         compatible = "via,vt8500-intc";
  23                         interrupt-controller;
  24                         reg = <0xd8140000 0x10000>;
  25                         #interrupt-cells = <1>;
  26                 };
  27
  28                 /* Secondary IC cascaded to intc0 */
  29                 intc1: interrupt-controller@d8150000 {
  30                         compatible = "via,vt8500-intc";
  31                         interrupt-controller;
  32                         #interrupt-cells = <1>;
  33                         reg = <0xD8150000 0x10000>;
  34                         interrupts = <56 57 58 59 60 61 62 63>;
  35                 };
  36
  37                 gpio: gpio-controller@d8110000 {
  38                         compatible = "wm,wm8650-gpio";
  39                         gpio-controller;
  40                         reg = <0xd8110000 0x10000>;
  41                         #gpio-cells = <3>;
  42                 };
  43
  44                 pmc@d8130000 {
  45                         compatible = "via,vt8500-pmc";
  46                         reg = <0xd8130000 0x1000>;
  47
  48                         clocks {
  49                                 #address-cells = <1>;
  50                                 #size-cells = <0>;
  51
  52                                 ref25: ref25M {
  53                                         #clock-cells = <0>;
  54                                         compatible = "fixed-clock";
  55                                         clock-frequency = <25000000>;
  56                                 };
  57
  58                                 ref24: ref24M {
  59                                         #clock-cells = <0>;
  60                                         compatible = "fixed-clock";
  61                                         clock-frequency = <24000000>;
  62                                 };
  63
  64                                 plla: plla {
  65                                         #clock-cells = <0>;
  66                                         compatible = "wm,wm8650-pll-clock";
  67                                         clocks = <&ref25>;
  68                                         reg = <0x200>;
  69                                 };
  70
  71                                 pllb: pllb {
  72                                         #clock-cells = <0>;
  73                                         compatible = "wm,wm8650-pll-clock";
  74                                         clocks = <&ref25>;
  75                                         reg = <0x204>;
  76                                 };
  77
  78                                 clkuart0: uart0 {
  79                                         #clock-cells = <0>;
  80                                         compatible = "via,vt8500-device-clock";
  81                                         clocks = <&ref24>;
  82                                         enable-reg = <0x250>;
  83                                         enable-bit = <1>;
  84                                 };
  85
  86                                 clkuart1: uart1 {
  87                                         #clock-cells = <0>;
  88                                         compatible = "via,vt8500-device-clock";
  89                                         clocks = <&ref24>;
  90                                         enable-reg = <0x250>;
  91                                         enable-bit = <2>;
  92                                 };
  93
  94                                 arm: arm {
  95                                         #clock-cells = <0>;
  96                                         compatible = "via,vt8500-device-clock";
  97                                         clocks = <&plla>;
  98                                         divisor-reg = <0x300>;
  99                                 };
 100
 101                                 sdhc: sdhc {
 102                                         #clock-cells = <0>;
 103                                         compatible = "via,vt8500-device-clock";
 104                                         clocks = <&pllb>;
 105                                         divisor-reg = <0x328>;
 106                                         divisor-mask = <0x3f>;
 107                                         enable-reg = <0x254>;
 108                                         enable-bit = <18>;
 109                                 };
 110                         };
 111                 };
 112
 113                 timer@d8130100 {
 114                         compatible = "via,vt8500-timer";
 115                         reg = <0xd8130100 0x28>;
 116                         interrupts = <36>;
 117                 };
 118
 119                 ehci@d8007900 {
 120                         compatible = "via,vt8500-ehci";
 121                         reg = <0xd8007900 0x200>;
 122                         interrupts = <43>;
 123                 };
 124
 125                 uhci@d8007b00 {
 126                         compatible = "platform-uhci";
 127                         reg = <0xd8007b00 0x200>;
 128                         interrupts = <43>;
 129                 };
 130
 131                 fb@d8050800 {
 132                         compatible = "wm,wm8505-fb";
 133                         reg = <0xd8050800 0x200>;
 134                         display = <&display>;
 135                         default-mode = <&mode0>;
 136                 };
 137
 138                 ge_rops@d8050400 {
 139                         compatible = "wm,prizm-ge-rops";
 140                         reg = <0xd8050400 0x100>;
 141                 };
 142
 143                 uart@d8200000 {
 144                         compatible = "via,vt8500-uart";
 145                         reg = <0xd8200000 0x1040>;
 146                         interrupts = <32>;
 147                         clocks = <&clkuart0>;
 148                 };
 149
 150                 uart@d82b0000 {
 151                         compatible = "via,vt8500-uart";
 152                         reg = <0xd82b0000 0x1040>;
 153                         interrupts = <33>;
 154                         clocks = <&clkuart1>;
 155                 };
 156
 157                 rtc@d8100000 {
 158                         compatible = "via,vt8500-rtc";
 159                         reg = <0xd8100000 0x10000>;
 160                         interrupts = <48>;
 161                 };
 162         };
 163 };