arch/arm/boot/dts/ti/omap/omap4-l4.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 &l4_cfg {                                               /* 0x4a000000 */
   3         compatible = "ti,omap4-l4-cfg", "simple-pm-bus";
   4         power-domains = <&prm_core>;
   5         clocks = <&l4_cfg_clkctrl OMAP4_L4_CFG_CLKCTRL 0>;
   6         clock-names = "fck";
   7         reg = <0x4a000000 0x800>,
   8               <0x4a000800 0x800>,
   9               <0x4a001000 0x1000>;
  10         reg-names = "ap", "la", "ia0";
  11         #address-cells = <1>;
  12         #size-cells = <1>;
  13         ranges = <0x00000000 0x4a000000 0x080000>,      /* segment 0 */
  14                  <0x00080000 0x4a080000 0x080000>,      /* segment 1 */
  15                  <0x00100000 0x4a100000 0x080000>,      /* segment 2 */
  16                  <0x00180000 0x4a180000 0x080000>,      /* segment 3 */
  17                  <0x00200000 0x4a200000 0x080000>,      /* segment 4 */
  18                  <0x00280000 0x4a280000 0x080000>,      /* segment 5 */
  19                  <0x00300000 0x4a300000 0x080000>;      /* segment 6 */
  20
  21         segment@0 {                                     /* 0x4a000000 */
  22                 compatible = "simple-pm-bus";
  23                 #address-cells = <1>;
  24                 #size-cells = <1>;
  25                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
  26                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
  27                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
  28                          <0x00002000 0x00002000 0x001000>,      /* ap 3 */
  29                          <0x00003000 0x00003000 0x001000>,      /* ap 4 */
  30                          <0x00004000 0x00004000 0x001000>,      /* ap 5 */
  31                          <0x00005000 0x00005000 0x001000>,      /* ap 6 */
  32                          <0x00056000 0x00056000 0x001000>,      /* ap 7 */
  33                          <0x00057000 0x00057000 0x001000>,      /* ap 8 */
  34                          <0x0005c000 0x0005c000 0x001000>,      /* ap 9 */
  35                          <0x00058000 0x00058000 0x004000>,      /* ap 10 */
  36                          <0x00062000 0x00062000 0x001000>,      /* ap 11 */
  37                          <0x00063000 0x00063000 0x001000>,      /* ap 12 */
  38                          <0x00008000 0x00008000 0x002000>,      /* ap 23 */
  39                          <0x0000a000 0x0000a000 0x001000>,      /* ap 24 */
  40                          <0x00066000 0x00066000 0x001000>,      /* ap 25 */
  41                          <0x00067000 0x00067000 0x001000>,      /* ap 26 */
  42                          <0x0005e000 0x0005e000 0x002000>,      /* ap 80 */
  43                          <0x00060000 0x00060000 0x001000>,      /* ap 81 */
  44                          <0x00064000 0x00064000 0x001000>,      /* ap 86 */
  45                          <0x00065000 0x00065000 0x001000>;      /* ap 87 */
  46
  47                 target-module@2000 {                    /* 0x4a002000, ap 3 06.0 */
  48                         compatible = "ti,sysc-omap4", "ti,sysc";
  49                         reg = <0x2000 0x4>,
  50                               <0x2010 0x4>;
  51                         reg-names = "rev", "sysc";
  52                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
  53                                         <SYSC_IDLE_NO>,
  54                                         <SYSC_IDLE_SMART>,
  55                                         <SYSC_IDLE_SMART_WKUP>;
  56                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
  57                         #address-cells = <1>;
  58                         #size-cells = <1>;
  59                         ranges = <0x0 0x2000 0x1000>;
  60
  61                         omap4_scm_core: scm@0 {
  62                                 compatible = "ti,omap4-scm-core", "simple-bus";
  63                                 reg = <0x0 0x1000>;
  64                                 #address-cells = <1>;
  65                                 #size-cells = <1>;
  66                                 ranges = <0 0 0x1000>;
  67
  68                                 scm_conf: scm_conf@0 {
  69                                         compatible = "syscon";
  70                                         reg = <0x0 0x800>;
  71                                         #address-cells = <1>;
  72                                         #size-cells = <1>;
  73                                 };
  74
  75                                 omap_control_usb2phy: control-phy@300 {
  76                                         compatible = "ti,control-phy-usb2";
  77                                         reg = <0x300 0x4>;
  78                                         reg-names = "power";
  79                                 };
  80
  81                                 omap_control_usbotg: control-phy@33c {
  82                                         compatible = "ti,control-phy-otghs";
  83                                         reg = <0x33c 0x4>;
  84                                         reg-names = "otghs_control";
  85                                 };
  86                         };
  87                 };
  88
  89                 target-module@4000 {                    /* 0x4a004000, ap 5 02.0 */
  90                         compatible = "ti,sysc-omap4", "ti,sysc";
  91                         reg = <0x4000 0x4>;
  92                         reg-names = "rev";
  93                         #address-cells = <1>;
  94                         #size-cells = <1>;
  95                         ranges = <0x0 0x4000 0x1000>;
  96
  97                         cm1: cm1@0 {
  98                                 compatible = "ti,omap4-cm1", "simple-bus";
  99                                 reg = <0x0 0x2000>;
 100                                 #address-cells = <1>;
 101                                 #size-cells = <1>;
 102                                 ranges = <0 0 0x2000>;
 103
 104                                 cm1_clocks: clocks {
 105                                         #address-cells = <1>;
 106                                         #size-cells = <0>;
 107                                 };
 108
 109                                 cm1_clockdomains: clockdomains {
 110                                 };
 111                         };
 112                 };
 113
 114                 target-module@8000 {                    /* 0x4a008000, ap 23 32.0 */
 115                         compatible = "ti,sysc-omap4", "ti,sysc";
 116                         reg = <0x8000 0x4>;
 117                         reg-names = "rev";
 118                         #address-cells = <1>;
 119                         #size-cells = <1>;
 120                         ranges = <0x0 0x8000 0x2000>;
 121
 122                         cm2: cm2@0 {
 123                                 compatible = "ti,omap4-cm2", "simple-bus";
 124                                 reg = <0x0 0x2000>;
 125                                 #address-cells = <1>;
 126                                 #size-cells = <1>;
 127                                 ranges = <0 0 0x2000>;
 128
 129                                 cm2_clocks: clocks {
 130                                         #address-cells = <1>;
 131                                         #size-cells = <0>;
 132                                 };
 133
 134                                 cm2_clockdomains: clockdomains {
 135                                 };
 136                         };
 137                 };
 138
 139                 target-module@56000 {                   /* 0x4a056000, ap 7 0a.0 */
 140                         compatible = "ti,sysc-omap2", "ti,sysc";
 141                         reg = <0x56000 0x4>,
 142                               <0x5602c 0x4>,
 143                               <0x56028 0x4>;
 144                         reg-names = "rev", "sysc", "syss";
 145                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 146                                          SYSC_OMAP2_EMUFREE |
 147                                          SYSC_OMAP2_SOFTRESET |
 148                                          SYSC_OMAP2_AUTOIDLE)>;
 149                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 150                                         <SYSC_IDLE_NO>,
 151                                         <SYSC_IDLE_SMART>;
 152                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 153                                         <SYSC_IDLE_NO>,
 154                                         <SYSC_IDLE_SMART>;
 155                         ti,syss-mask = <1>;
 156                         /* Domains (V, P, C): core, core_pwrdm, l3_dma_clkdm */
 157                         clocks = <&l3_dma_clkctrl OMAP4_DMA_SYSTEM_CLKCTRL 0>;
 158                         clock-names = "fck";
 159                         #address-cells = <1>;
 160                         #size-cells = <1>;
 161                         ranges = <0x0 0x56000 0x1000>;
 162
 163                         sdma: dma-controller@0 {
 164                                 compatible = "ti,omap4430-sdma", "ti,omap-sdma";
 165                                 reg = <0x0 0x1000>;
 166                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 167                                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 168                                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 169                                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 170                                 #dma-cells = <1>;
 171                                 dma-channels = <32>;
 172                                 dma-requests = <127>;
 173                         };
 174                 };
 175
 176                 target-module@58000 {                   /* 0x4a058000, ap 10 0e.0 */
 177                         compatible = "ti,sysc-omap2", "ti,sysc";
 178                         reg = <0x58000 0x4>,
 179                               <0x58010 0x4>,
 180                               <0x58014 0x4>;
 181                         reg-names = "rev", "sysc", "syss";
 182                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
 183                                          SYSC_OMAP2_SOFTRESET |
 184                                          SYSC_OMAP2_AUTOIDLE)>;
 185                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 186                                         <SYSC_IDLE_NO>,
 187                                         <SYSC_IDLE_SMART>,
 188                                         <SYSC_IDLE_SMART_WKUP>;
 189                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 190                                         <SYSC_IDLE_NO>,
 191                                         <SYSC_IDLE_SMART>,
 192                                         <SYSC_IDLE_SMART_WKUP>;
 193                         ti,syss-mask = <1>;
 194                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 195                         clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
 196                         clock-names = "fck";
 197                         #address-cells = <1>;
 198                         #size-cells = <1>;
 199                         ranges = <0x0 0x58000 0x5000>;
 200
 201                         hsi: hsi@0 {
 202                                 compatible = "ti,omap4-hsi";
 203                                 reg = <0x0 0x4000>,
 204                                       <0x5000 0x1000>;
 205                                 reg-names = "sys", "gdd";
 206
 207                                 clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
 208                                 clock-names = "hsi_fck";
 209
 210                                 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 211                                 interrupt-names = "gdd_mpu";
 212
 213                                 #address-cells = <1>;
 214                                 #size-cells = <1>;
 215                                 ranges = <0 0 0x4000>;
 216
 217                                 hsi_port1: hsi-port@2000 {
 218                                         compatible = "ti,omap4-hsi-port";
 219                                         reg = <0x2000 0x800>,
 220                                               <0x2800 0x800>;
 221                                         reg-names = "tx", "rx";
 222                                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 223                                 };
 224
 225                                 hsi_port2: hsi-port@3000 {
 226                                         compatible = "ti,omap4-hsi-port";
 227                                         reg = <0x3000 0x800>,
 228                                               <0x3800 0x800>;
 229                                         reg-names = "tx", "rx";
 230                                         interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 231                                 };
 232                         };
 233                 };
 234
 235                 target-module@5e000 {                   /* 0x4a05e000, ap 80 68.0 */
 236                         compatible = "ti,sysc";
 237                         status = "disabled";
 238                         #address-cells = <1>;
 239                         #size-cells = <1>;
 240                         ranges = <0x0 0x5e000 0x2000>;
 241                 };
 242
 243                 target-module@62000 {                   /* 0x4a062000, ap 11 16.0 */
 244                         compatible = "ti,sysc-omap2", "ti,sysc";
 245                         reg = <0x62000 0x4>,
 246                               <0x62010 0x4>,
 247                               <0x62014 0x4>;
 248                         reg-names = "rev", "sysc", "syss";
 249                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 250                                          SYSC_OMAP2_ENAWAKEUP |
 251                                          SYSC_OMAP2_SOFTRESET |
 252                                          SYSC_OMAP2_AUTOIDLE)>;
 253                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 254                                         <SYSC_IDLE_NO>,
 255                                         <SYSC_IDLE_SMART>;
 256                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 257                         clocks = <&l3_init_clkctrl OMAP4_USB_TLL_HS_CLKCTRL 0>;
 258                         clock-names = "fck";
 259                         #address-cells = <1>;
 260                         #size-cells = <1>;
 261                         ranges = <0x0 0x62000 0x1000>;
 262
 263                         usbhstll: usbhstll@0 {
 264                                 compatible = "ti,usbhs-tll";
 265                                 reg = <0x0 0x1000>;
 266                                 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 267                         };
 268                 };
 269
 270                 target-module@64000 {                   /* 0x4a064000, ap 86 1e.0 */
 271                         compatible = "ti,sysc-omap4", "ti,sysc";
 272                         reg = <0x64000 0x4>,
 273                               <0x64010 0x4>,
 274                               <0x64014 0x4>;
 275                         reg-names = "rev", "sysc", "syss";
 276                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 277                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 278                                         <SYSC_IDLE_NO>,
 279                                         <SYSC_IDLE_SMART>,
 280                                         <SYSC_IDLE_SMART_WKUP>;
 281                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 282                                         <SYSC_IDLE_NO>,
 283                                         <SYSC_IDLE_SMART>,
 284                                         <SYSC_IDLE_SMART_WKUP>;
 285                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 286                         clocks = <&l3_init_clkctrl OMAP4_USB_HOST_HS_CLKCTRL 0>;
 287                         clock-names = "fck";
 288                         #address-cells = <1>;
 289                         #size-cells = <1>;
 290                         ranges = <0x0 0x64000 0x1000>;
 291
 292                         usbhshost: usbhshost@0 {
 293                                 compatible = "ti,usbhs-host";
 294                                 reg = <0x0 0x800>;
 295                                 #address-cells = <1>;
 296                                 #size-cells = <1>;
 297                                 ranges = <0 0 0x1000>;
 298                                 clocks = <&init_60m_fclk>,
 299                                          <&xclk60mhsp1_ck>,
 300                                          <&xclk60mhsp2_ck>;
 301                                 clock-names = "refclk_60m_int",
 302                                               "refclk_60m_ext_p1",
 303                                               "refclk_60m_ext_p2";
 304
 305                                 usbhsohci: ohci@800 {
 306                                         compatible = "ti,ohci-omap3";
 307                                         reg = <0x800 0x400>;
 308                                         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 309                                         remote-wakeup-connected;
 310                                 };
 311
 312                                 usbhsehci: ehci@c00 {
 313                                         compatible = "ti,ehci-omap";
 314                                         reg = <0xc00 0x400>;
 315                                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 316                                 };
 317                         };
 318                 };
 319
 320                 target-module@66000 {                   /* 0x4a066000, ap 25 26.0 */
 321                         compatible = "ti,sysc-omap2", "ti,sysc";
 322                         reg = <0x66000 0x4>,
 323                               <0x66010 0x4>,
 324                               <0x66014 0x4>;
 325                         reg-names = "rev", "sysc", "syss";
 326                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 327                                          SYSC_OMAP2_SOFTRESET |
 328                                          SYSC_OMAP2_AUTOIDLE)>;
 329                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 330                                         <SYSC_IDLE_NO>,
 331                                         <SYSC_IDLE_SMART>;
 332                         /* Domains (V, P, C): iva, tesla_pwrdm, tesla_clkdm */
 333                         clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
 334                         clock-names = "fck";
 335                         power-domains = <&prm_tesla>;
 336                         resets = <&prm_tesla 1>;
 337                         reset-names = "rstctrl";
 338                         #address-cells = <1>;
 339                         #size-cells = <1>;
 340                         ranges = <0x0 0x66000 0x1000>;
 341
 342                         mmu_dsp: mmu@0 {
 343                                 compatible = "ti,omap4-iommu";
 344                                 reg = <0x0 0x100>;
 345                                 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 346                                 #iommu-cells = <0>;
 347                         };
 348                 };
 349         };
 350
 351         segment@80000 {                                 /* 0x4a080000 */
 352                 compatible = "simple-pm-bus";
 353                 #address-cells = <1>;
 354                 #size-cells = <1>;
 355                 ranges = <0x00059000 0x000d9000 0x001000>,      /* ap 13 */
 356                          <0x0005a000 0x000da000 0x001000>,      /* ap 14 */
 357                          <0x0005b000 0x000db000 0x001000>,      /* ap 15 */
 358                          <0x0005c000 0x000dc000 0x001000>,      /* ap 16 */
 359                          <0x0005d000 0x000dd000 0x001000>,      /* ap 17 */
 360                          <0x0005e000 0x000de000 0x001000>,      /* ap 18 */
 361                          <0x00060000 0x000e0000 0x001000>,      /* ap 19 */
 362                          <0x00061000 0x000e1000 0x001000>,      /* ap 20 */
 363                          <0x00074000 0x000f4000 0x001000>,      /* ap 27 */
 364                          <0x00075000 0x000f5000 0x001000>,      /* ap 28 */
 365                          <0x00076000 0x000f6000 0x001000>,      /* ap 29 */
 366                          <0x00077000 0x000f7000 0x001000>,      /* ap 30 */
 367                          <0x00036000 0x000b6000 0x001000>,      /* ap 69 */
 368                          <0x00037000 0x000b7000 0x001000>,      /* ap 70 */
 369                          <0x0004d000 0x000cd000 0x001000>,      /* ap 78 */
 370                          <0x0004e000 0x000ce000 0x001000>,      /* ap 79 */
 371                          <0x00029000 0x000a9000 0x001000>,      /* ap 82 */
 372                          <0x0002a000 0x000aa000 0x001000>,      /* ap 83 */
 373                          <0x0002b000 0x000ab000 0x001000>,      /* ap 84 */
 374                          <0x0002c000 0x000ac000 0x001000>,      /* ap 85 */
 375                          <0x0002d000 0x000ad000 0x001000>,      /* ap 88 */
 376                          <0x0002e000 0x000ae000 0x001000>;      /* ap 89 */
 377
 378                 target-module@29000 {                   /* 0x4a0a9000, ap 82 04.0 */
 379                         compatible = "ti,sysc";
 380                         status = "disabled";
 381                         #address-cells = <1>;
 382                         #size-cells = <1>;
 383                         ranges = <0x0 0x29000 0x1000>;
 384                 };
 385
 386                 target-module@2b000 {                   /* 0x4a0ab000, ap 84 12.0 */
 387                         compatible = "ti,sysc-omap2", "ti,sysc";
 388                         reg = <0x2b400 0x4>,
 389                               <0x2b404 0x4>,
 390                               <0x2b408 0x4>;
 391                         reg-names = "rev", "sysc", "syss";
 392                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 393                                          SYSC_OMAP2_SOFTRESET |
 394                                          SYSC_OMAP2_AUTOIDLE)>;
 395                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 396                                         <SYSC_IDLE_NO>,
 397                                         <SYSC_IDLE_SMART>;
 398                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 399                                         <SYSC_IDLE_NO>,
 400                                         <SYSC_IDLE_SMART>,
 401                                         <SYSC_IDLE_SMART_WKUP>;
 402                         ti,syss-mask = <1>;
 403                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 404                         clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>;
 405                         clock-names = "fck";
 406                         #address-cells = <1>;
 407                         #size-cells = <1>;
 408                         ranges = <0x0 0x2b000 0x1000>;
 409
 410                         usb_otg_hs: usb_otg_hs@0 {
 411                                 compatible = "ti,omap4-musb";
 412                                 reg = <0x0 0x7ff>;
 413                                 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 414                                 interrupt-names = "mc", "dma";
 415                                 usb-phy = <&usb2_phy>;
 416                                 phys = <&usb2_phy>;
 417                                 phy-names = "usb2-phy";
 418                                 multipoint = <1>;
 419                                 num-eps = <16>;
 420                                 ram-bits = <12>;
 421                                 ctrl-module = <&omap_control_usbotg>;
 422                         };
 423                 };
 424
 425                 target-module@2d000 {                   /* 0x4a0ad000, ap 88 0c.0 */
 426                         compatible = "ti,sysc-omap2", "ti,sysc";
 427                         reg = <0x2d000 0x4>,
 428                               <0x2d010 0x4>,
 429                               <0x2d014 0x4>;
 430                         reg-names = "rev", "sysc", "syss";
 431                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 432                                          SYSC_OMAP2_AUTOIDLE)>;
 433                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 434                                         <SYSC_IDLE_NO>,
 435                                         <SYSC_IDLE_SMART>;
 436                         ti,syss-mask = <1>;
 437                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 438                         clocks = <&l3_init_clkctrl OMAP4_OCP2SCP_USB_PHY_CLKCTRL 0>;
 439                         clock-names = "fck";
 440                         #address-cells = <1>;
 441                         #size-cells = <1>;
 442                         ranges = <0x0 0x2d000 0x1000>;
 443
 444                         ocp2scp@0 {
 445                                 compatible = "ti,omap-ocp2scp";
 446                                 reg = <0x0 0x1f>;
 447                                 #address-cells = <1>;
 448                                 #size-cells = <1>;
 449                                 ranges = <0 0 0x1000>;
 450                                 usb2_phy: usb2phy@80 {
 451                                         compatible = "ti,omap-usb2";
 452                                         reg = <0x80 0x58>;
 453                                         ctrl-module = <&omap_control_usb2phy>;
 454                                         clocks = <&usb_phy_cm_clk32k>;
 455                                         clock-names = "wkupclk";
 456                                         #phy-cells = <0>;
 457                                 };
 458                         };
 459                 };
 460
 461                 /* d2d mdm */
 462                 target-module@36000 {                   /* 0x4a0b6000, ap 69 60.0 */
 463                         compatible = "ti,sysc-omap2", "ti,sysc";
 464                         reg = <0x36000 0x4>,
 465                               <0x36010 0x4>,
 466                               <0x36014 0x4>;
 467                         reg-names = "rev", "sysc", "syss";
 468                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)>;
 469                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 470                                         <SYSC_IDLE_NO>,
 471                                         <SYSC_IDLE_SMART>,
 472                                         <SYSC_IDLE_SMART_WKUP>;
 473                         ti,syss-mask = <1>;
 474                         /* Domains (V, P, C): core, core_pwrdm, d2d_clkdm */
 475                         clocks = <&d2d_clkctrl OMAP4_C2C_CLKCTRL 0>;
 476                         clock-names = "fck";
 477                         #address-cells = <1>;
 478                         #size-cells = <1>;
 479                         ranges = <0x0 0x36000 0x1000>;
 480                 };
 481
 482                 /* d2d mpu */
 483                 target-module@4d000 {                   /* 0x4a0cd000, ap 78 58.0 */
 484                         compatible = "ti,sysc-omap2", "ti,sysc";
 485                         reg = <0x4d000 0x4>,
 486                               <0x4d010 0x4>,
 487                               <0x4d014 0x4>;
 488                         reg-names = "rev", "sysc", "syss";
 489                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)>;
 490                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 491                                         <SYSC_IDLE_NO>,
 492                                         <SYSC_IDLE_SMART>,
 493                                         <SYSC_IDLE_SMART_WKUP>;
 494                         ti,syss-mask = <1>;
 495                         /* Domains (V, P, C): core, core_pwrdm, d2d_clkdm */
 496                         clocks = <&d2d_clkctrl OMAP4_C2C_CLKCTRL 0>;
 497                         clock-names = "fck";
 498                         #address-cells = <1>;
 499                         #size-cells = <1>;
 500                         ranges = <0x0 0x4d000 0x1000>;
 501                 };
 502
 503                 target-module@59000 {                   /* 0x4a0d9000, ap 13 1a.0 */
 504                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 505                         reg = <0x59038 0x4>;
 506                         reg-names = "sysc";
 507                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 508                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 509                                         <SYSC_IDLE_NO>,
 510                                         <SYSC_IDLE_SMART>,
 511                                         <SYSC_IDLE_SMART_WKUP>;
 512                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 513                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_MPU_CLKCTRL 0>;
 514                         clock-names = "fck";
 515                         #address-cells = <1>;
 516                         #size-cells = <1>;
 517                         ranges = <0x0 0x59000 0x1000>;
 518
 519                         smartreflex_mpu: smartreflex@0 {
 520                                 compatible = "ti,omap4-smartreflex-mpu";
 521                                 reg = <0x0 0x80>;
 522                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 523                         };
 524                 };
 525
 526                 target-module@5b000 {                   /* 0x4a0db000, ap 15 08.0 */
 527                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 528                         reg = <0x5b038 0x4>;
 529                         reg-names = "sysc";
 530                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 531                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 532                                         <SYSC_IDLE_NO>,
 533                                         <SYSC_IDLE_SMART>,
 534                                         <SYSC_IDLE_SMART_WKUP>;
 535                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 536                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_IVA_CLKCTRL 0>;
 537                         clock-names = "fck";
 538                         #address-cells = <1>;
 539                         #size-cells = <1>;
 540                         ranges = <0x0 0x5b000 0x1000>;
 541
 542                         smartreflex_iva: smartreflex@0 {
 543                                 compatible = "ti,omap4-smartreflex-iva";
 544                                 reg = <0x0 0x80>;
 545                                 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 546                         };
 547                 };
 548
 549                 target-module@5d000 {                   /* 0x4a0dd000, ap 17 22.0 */
 550                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 551                         reg = <0x5d038 0x4>;
 552                         reg-names = "sysc";
 553                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 554                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 555                                         <SYSC_IDLE_NO>,
 556                                         <SYSC_IDLE_SMART>,
 557                                         <SYSC_IDLE_SMART_WKUP>;
 558                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 559                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_CORE_CLKCTRL 0>;
 560                         clock-names = "fck";
 561                         #address-cells = <1>;
 562                         #size-cells = <1>;
 563                         ranges = <0x0 0x5d000 0x1000>;
 564
 565                         smartreflex_core: smartreflex@0 {
 566                                 compatible = "ti,omap4-smartreflex-core";
 567                                 reg = <0x0 0x80>;
 568                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 569                         };
 570                 };
 571
 572                 target-module@60000 {                   /* 0x4a0e0000, ap 19 1c.0 */
 573                         compatible = "ti,sysc";
 574                         status = "disabled";
 575                         #address-cells = <1>;
 576                         #size-cells = <1>;
 577                         ranges = <0x0 0x60000 0x1000>;
 578                 };
 579
 580                 target-module@74000 {                   /* 0x4a0f4000, ap 27 24.0 */
 581                         compatible = "ti,sysc-omap4", "ti,sysc";
 582                         reg = <0x74000 0x4>,
 583                               <0x74010 0x4>;
 584                         reg-names = "rev", "sysc";
 585                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 586                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 587                                         <SYSC_IDLE_NO>,
 588                                         <SYSC_IDLE_SMART>;
 589                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 590                         clocks = <&l4_cfg_clkctrl OMAP4_MAILBOX_CLKCTRL 0>;
 591                         clock-names = "fck";
 592                         #address-cells = <1>;
 593                         #size-cells = <1>;
 594                         ranges = <0x0 0x74000 0x1000>;
 595
 596                         mailbox: mailbox@0 {
 597                                 compatible = "ti,omap4-mailbox";
 598                                 reg = <0x0 0x200>;
 599                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 600                                 #mbox-cells = <1>;
 601                                 ti,mbox-num-users = <3>;
 602                                 ti,mbox-num-fifos = <8>;
 603                                 mbox_ipu: mbox-ipu {
 604                                         ti,mbox-tx = <0 0 0>;
 605                                         ti,mbox-rx = <1 0 0>;
 606                                 };
 607                                 mbox_dsp: mbox-dsp {
 608                                         ti,mbox-tx = <3 0 0>;
 609                                         ti,mbox-rx = <2 0 0>;
 610                                 };
 611                         };
 612                 };
 613
 614                 target-module@76000 {                   /* 0x4a0f6000, ap 29 3a.0 */
 615                         compatible = "ti,sysc-omap2", "ti,sysc";
 616                         reg = <0x76000 0x4>,
 617                               <0x76010 0x4>,
 618                               <0x76014 0x4>;
 619                         reg-names = "rev", "sysc", "syss";
 620                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 621                                          SYSC_OMAP2_ENAWAKEUP |
 622                                          SYSC_OMAP2_SOFTRESET |
 623                                          SYSC_OMAP2_AUTOIDLE)>;
 624                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 625                                         <SYSC_IDLE_NO>,
 626                                         <SYSC_IDLE_SMART>;
 627                         ti,syss-mask = <1>;
 628                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 629                         clocks = <&l4_cfg_clkctrl OMAP4_SPINLOCK_CLKCTRL 0>;
 630                         clock-names = "fck";
 631                         #address-cells = <1>;
 632                         #size-cells = <1>;
 633                         ranges = <0x0 0x76000 0x1000>;
 634
 635                         hwspinlock: spinlock@0 {
 636                                 compatible = "ti,omap4-hwspinlock";
 637                                 reg = <0x0 0x1000>;
 638                                 #hwlock-cells = <1>;
 639                         };
 640                 };
 641         };
 642
 643         segment@100000 {                                        /* 0x4a100000 */
 644                 compatible = "simple-pm-bus";
 645                 #address-cells = <1>;
 646                 #size-cells = <1>;
 647                 ranges = <0x00000000 0x00100000 0x001000>,      /* ap 21 */
 648                          <0x00001000 0x00101000 0x001000>,      /* ap 22 */
 649                          <0x00002000 0x00102000 0x001000>,      /* ap 61 */
 650                          <0x00003000 0x00103000 0x001000>,      /* ap 62 */
 651                          <0x00008000 0x00108000 0x001000>,      /* ap 63 */
 652                          <0x00009000 0x00109000 0x001000>,      /* ap 64 */
 653                          <0x0000a000 0x0010a000 0x001000>,      /* ap 65 */
 654                          <0x0000b000 0x0010b000 0x001000>;      /* ap 66 */
 655
 656                 target-module@0 {                       /* 0x4a100000, ap 21 2a.0 */
 657                         compatible = "ti,sysc-omap4", "ti,sysc";
 658                         reg = <0x0 0x4>,
 659                               <0x10 0x4>;
 660                         reg-names = "rev", "sysc";
 661                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 662                                         <SYSC_IDLE_NO>,
 663                                         <SYSC_IDLE_SMART>,
 664                                         <SYSC_IDLE_SMART_WKUP>;
 665                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 666                         #address-cells = <1>;
 667                         #size-cells = <1>;
 668                         ranges = <0x0 0x0 0x1000>;
 669
 670                         omap4_pmx_core: pinmux@40 {
 671                                 compatible = "ti,omap4-padconf",
 672                                              "pinctrl-single";
 673                                 reg = <0x40 0x0196>;
 674                                 #address-cells = <1>;
 675                                 #size-cells = <0>;
 676                                 #pinctrl-cells = <1>;
 677                                 #interrupt-cells = <1>;
 678                                 interrupt-controller;
 679                                 pinctrl-single,register-width = <16>;
 680                                 pinctrl-single,function-mask = <0x7fff>;
 681                         };
 682
 683                         omap4_padconf_global: omap4_padconf_global@5a0 {
 684                                 compatible = "syscon",
 685                                              "simple-bus";
 686                                 reg = <0x5a0 0x170>;
 687                                 #address-cells = <1>;
 688                                 #size-cells = <1>;
 689                                 ranges = <0 0x5a0 0x170>;
 690
 691                                 pbias_regulator: pbias_regulator@60 {
 692                                         compatible = "ti,pbias-omap4", "ti,pbias-omap";
 693                                         reg = <0x60 0x4>;
 694                                         syscon = <&omap4_padconf_global>;
 695                                         pbias_mmc_reg: pbias_mmc_omap4 {
 696                                                 regulator-name = "pbias_mmc_omap4";
 697                                                 regulator-min-microvolt = <1800000>;
 698                                                 regulator-max-microvolt = <3000000>;
 699                                         };
 700                                 };
 701                         };
 702                 };
 703
 704                 target-module@2000 {                    /* 0x4a102000, ap 61 3c.0 */
 705                         compatible = "ti,sysc";
 706                         status = "disabled";
 707                         #address-cells = <1>;
 708                         #size-cells = <1>;
 709                         ranges = <0x0 0x2000 0x1000>;
 710                 };
 711
 712                 target-module@8000 {                    /* 0x4a108000, ap 63 62.0 */
 713                         compatible = "ti,sysc";
 714                         status = "disabled";
 715                         #address-cells = <1>;
 716                         #size-cells = <1>;
 717                         ranges = <0x0 0x8000 0x1000>;
 718                 };
 719
 720                 target-module@a000 {                    /* 0x4a10a000, ap 65 50.0 */
 721                         compatible = "ti,sysc-omap4", "ti,sysc";
 722                         reg = <0xa000 0x4>,
 723                               <0xa010 0x4>;
 724                         reg-names = "rev", "sysc";
 725                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 726                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 727                                         <SYSC_IDLE_NO>,
 728                                         <SYSC_IDLE_SMART>;
 729                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 730                                         <SYSC_IDLE_NO>,
 731                                         <SYSC_IDLE_SMART>;
 732                         ti,sysc-delay-us = <2>;
 733                         /* Domains (V, P, C): core, cam_pwrdm, iss_clkdm */
 734                         clocks = <&iss_clkctrl OMAP4_FDIF_CLKCTRL 0>;
 735                         clock-names = "fck";
 736                         #address-cells = <1>;
 737                         #size-cells = <1>;
 738                         ranges = <0x0 0xa000 0x1000>;
 739
 740                         /* No child device binding or driver in mainline */
 741                 };
 742         };
 743
 744         segment@180000 {                                        /* 0x4a180000 */
 745                 compatible = "simple-pm-bus";
 746                 #address-cells = <1>;
 747                 #size-cells = <1>;
 748         };
 749
 750         segment@200000 {                                        /* 0x4a200000 */
 751                 compatible = "simple-pm-bus";
 752                 #address-cells = <1>;
 753                 #size-cells = <1>;
 754                 ranges = <0x0001e000 0x0021e000 0x001000>,      /* ap 31 */
 755                          <0x0001f000 0x0021f000 0x001000>,      /* ap 32 */
 756                          <0x0000a000 0x0020a000 0x001000>,      /* ap 33 */
 757                          <0x0000b000 0x0020b000 0x001000>,      /* ap 34 */
 758                          <0x00004000 0x00204000 0x001000>,      /* ap 35 */
 759                          <0x00005000 0x00205000 0x001000>,      /* ap 36 */
 760                          <0x00006000 0x00206000 0x001000>,      /* ap 37 */
 761                          <0x00007000 0x00207000 0x001000>,      /* ap 38 */
 762                          <0x00012000 0x00212000 0x001000>,      /* ap 39 */
 763                          <0x00013000 0x00213000 0x001000>,      /* ap 40 */
 764                          <0x0000c000 0x0020c000 0x001000>,      /* ap 41 */
 765                          <0x0000d000 0x0020d000 0x001000>,      /* ap 42 */
 766                          <0x00010000 0x00210000 0x001000>,      /* ap 43 */
 767                          <0x00011000 0x00211000 0x001000>,      /* ap 44 */
 768                          <0x00016000 0x00216000 0x001000>,      /* ap 45 */
 769                          <0x00017000 0x00217000 0x001000>,      /* ap 46 */
 770                          <0x00014000 0x00214000 0x001000>,      /* ap 47 */
 771                          <0x00015000 0x00215000 0x001000>,      /* ap 48 */
 772                          <0x00018000 0x00218000 0x001000>,      /* ap 49 */
 773                          <0x00019000 0x00219000 0x001000>,      /* ap 50 */
 774                          <0x00020000 0x00220000 0x001000>,      /* ap 51 */
 775                          <0x00021000 0x00221000 0x001000>,      /* ap 52 */
 776                          <0x00026000 0x00226000 0x001000>,      /* ap 53 */
 777                          <0x00027000 0x00227000 0x001000>,      /* ap 54 */
 778                          <0x00028000 0x00228000 0x001000>,      /* ap 55 */
 779                          <0x00029000 0x00229000 0x001000>,      /* ap 56 */
 780                          <0x0002a000 0x0022a000 0x001000>,      /* ap 57 */
 781                          <0x0002b000 0x0022b000 0x001000>,      /* ap 58 */
 782                          <0x0001c000 0x0021c000 0x001000>,      /* ap 59 */
 783                          <0x0001d000 0x0021d000 0x001000>;      /* ap 60 */
 784
 785                 target-module@4000 {                    /* 0x4a204000, ap 35 42.0 */
 786                         compatible = "ti,sysc";
 787                         status = "disabled";
 788                         #address-cells = <1>;
 789                         #size-cells = <1>;
 790                         ranges = <0x0 0x4000 0x1000>;
 791                 };
 792
 793                 target-module@6000 {                    /* 0x4a206000, ap 37 4a.0 */
 794                         compatible = "ti,sysc";
 795                         status = "disabled";
 796                         #address-cells = <1>;
 797                         #size-cells = <1>;
 798                         ranges = <0x0 0x6000 0x1000>;
 799                 };
 800
 801                 target-module@a000 {                    /* 0x4a20a000, ap 33 2c.0 */
 802                         compatible = "ti,sysc";
 803                         status = "disabled";
 804                         #address-cells = <1>;
 805                         #size-cells = <1>;
 806                         ranges = <0x0 0xa000 0x1000>;
 807                 };
 808
 809                 target-module@c000 {                    /* 0x4a20c000, ap 41 20.0 */
 810                         compatible = "ti,sysc";
 811                         status = "disabled";
 812                         #address-cells = <1>;
 813                         #size-cells = <1>;
 814                         ranges = <0x0 0xc000 0x1000>;
 815                 };
 816
 817                 target-module@10000 {                   /* 0x4a210000, ap 43 52.0 */
 818                         compatible = "ti,sysc";
 819                         status = "disabled";
 820                         #address-cells = <1>;
 821                         #size-cells = <1>;
 822                         ranges = <0x0 0x10000 0x1000>;
 823                 };
 824
 825                 target-module@12000 {                   /* 0x4a212000, ap 39 18.0 */
 826                         compatible = "ti,sysc";
 827                         status = "disabled";
 828                         #address-cells = <1>;
 829                         #size-cells = <1>;
 830                         ranges = <0x0 0x12000 0x1000>;
 831                 };
 832
 833                 target-module@14000 {                   /* 0x4a214000, ap 47 30.0 */
 834                         compatible = "ti,sysc";
 835                         status = "disabled";
 836                         #address-cells = <1>;
 837                         #size-cells = <1>;
 838                         ranges = <0x0 0x14000 0x1000>;
 839                 };
 840
 841                 target-module@16000 {                   /* 0x4a216000, ap 45 28.0 */
 842                         compatible = "ti,sysc";
 843                         status = "disabled";
 844                         #address-cells = <1>;
 845                         #size-cells = <1>;
 846                         ranges = <0x0 0x16000 0x1000>;
 847                 };
 848
 849                 target-module@18000 {                   /* 0x4a218000, ap 49 38.0 */
 850                         compatible = "ti,sysc";
 851                         status = "disabled";
 852                         #address-cells = <1>;
 853                         #size-cells = <1>;
 854                         ranges = <0x0 0x18000 0x1000>;
 855                 };
 856
 857                 target-module@1c000 {                   /* 0x4a21c000, ap 59 5a.0 */
 858                         compatible = "ti,sysc";
 859                         status = "disabled";
 860                         #address-cells = <1>;
 861                         #size-cells = <1>;
 862                         ranges = <0x0 0x1c000 0x1000>;
 863                 };
 864
 865                 target-module@1e000 {                   /* 0x4a21e000, ap 31 10.0 */
 866                         compatible = "ti,sysc";
 867                         status = "disabled";
 868                         #address-cells = <1>;
 869                         #size-cells = <1>;
 870                         ranges = <0x0 0x1e000 0x1000>;
 871                 };
 872
 873                 target-module@20000 {                   /* 0x4a220000, ap 51 40.0 */
 874                         compatible = "ti,sysc";
 875                         status = "disabled";
 876                         #address-cells = <1>;
 877                         #size-cells = <1>;
 878                         ranges = <0x0 0x20000 0x1000>;
 879                 };
 880
 881                 target-module@26000 {                   /* 0x4a226000, ap 53 34.0 */
 882                         compatible = "ti,sysc";
 883                         status = "disabled";
 884                         #address-cells = <1>;
 885                         #size-cells = <1>;
 886                         ranges = <0x0 0x26000 0x1000>;
 887                 };
 888
 889                 target-module@28000 {                   /* 0x4a228000, ap 55 2e.0 */
 890                         compatible = "ti,sysc";
 891                         status = "disabled";
 892                         #address-cells = <1>;
 893                         #size-cells = <1>;
 894                         ranges = <0x0 0x28000 0x1000>;
 895                 };
 896
 897                 target-module@2a000 {                   /* 0x4a22a000, ap 57 48.0 */
 898                         compatible = "ti,sysc";
 899                         status = "disabled";
 900                         #address-cells = <1>;
 901                         #size-cells = <1>;
 902                         ranges = <0x0 0x2a000 0x1000>;
 903                 };
 904         };
 905
 906         segment@280000 {                                        /* 0x4a280000 */
 907                 compatible = "simple-pm-bus";
 908                 #address-cells = <1>;
 909                 #size-cells = <1>;
 910         };
 911
 912         l4_cfg_segment_300000: segment@300000 {                 /* 0x4a300000 */
 913                 compatible = "simple-pm-bus";
 914                 #address-cells = <1>;
 915                 #size-cells = <1>;
 916                 ranges = <0x00000000 0x00300000 0x020000>,      /* ap 67 */
 917                          <0x00040000 0x00340000 0x001000>,      /* ap 68 */
 918                          <0x00020000 0x00320000 0x004000>,      /* ap 71 */
 919                          <0x00024000 0x00324000 0x002000>,      /* ap 72 */
 920                          <0x00026000 0x00326000 0x001000>,      /* ap 73 */
 921                          <0x00027000 0x00327000 0x001000>,      /* ap 74 */
 922                          <0x00028000 0x00328000 0x001000>,      /* ap 75 */
 923                          <0x00029000 0x00329000 0x001000>,      /* ap 76 */
 924                          <0x00030000 0x00330000 0x010000>,      /* ap 77 */
 925                          <0x0002a000 0x0032a000 0x002000>,      /* ap 90 */
 926                          <0x0002c000 0x0032c000 0x004000>;      /* ap 91 */
 927
 928                 l4_cfg_target_0: target-module@0 {      /* 0x4a300000, ap 67 14.0 */
 929                         compatible = "ti,sysc";
 930                         status = "disabled";
 931                         #address-cells = <1>;
 932                         #size-cells = <1>;
 933                         ranges = <0x00000000 0x00000000 0x00020000>,
 934                                  <0x00020000 0x00020000 0x00004000>,
 935                                  <0x00024000 0x00024000 0x00002000>,
 936                                  <0x00026000 0x00026000 0x00001000>,
 937                                  <0x00027000 0x00027000 0x00001000>,
 938                                  <0x00028000 0x00028000 0x00001000>,
 939                                  <0x00029000 0x00029000 0x00001000>,
 940                                  <0x0002a000 0x0002a000 0x00002000>,
 941                                  <0x0002c000 0x0002c000 0x00004000>,
 942                                  <0x00030000 0x00030000 0x00010000>;
 943                 };
 944         };
 945 };
 946
 947 &l4_wkup {                                              /* 0x4a300000 */
 948         compatible = "ti,omap4-l4-wkup", "simple-pm-bus";
 949         power-domains = <&prm_wkup>;
 950         clocks = <&l4_wkup_clkctrl OMAP4_L4_WKUP_CLKCTRL 0>;
 951         clock-names = "fck";
 952         reg = <0x4a300000 0x800>,
 953               <0x4a300800 0x800>,
 954               <0x4a301000 0x1000>;
 955         reg-names = "ap", "la", "ia0";
 956         #address-cells = <1>;
 957         #size-cells = <1>;
 958         ranges = <0x00000000 0x4a300000 0x010000>,      /* segment 0 */
 959                  <0x00010000 0x4a310000 0x010000>,      /* segment 1 */
 960                  <0x00020000 0x4a320000 0x010000>;      /* segment 2 */
 961
 962         segment@0 {                                     /* 0x4a300000 */
 963                 compatible = "simple-pm-bus";
 964                 #address-cells = <1>;
 965                 #size-cells = <1>;
 966                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 967                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
 968                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
 969                          <0x00006000 0x00006000 0x002000>,      /* ap 3 */
 970                          <0x00008000 0x00008000 0x001000>,      /* ap 4 */
 971                          <0x0000a000 0x0000a000 0x001000>,      /* ap 15 */
 972                          <0x0000b000 0x0000b000 0x001000>,      /* ap 16 */
 973                          <0x00004000 0x00004000 0x001000>,      /* ap 17 */
 974                          <0x00005000 0x00005000 0x001000>,      /* ap 18 */
 975                          <0x0000c000 0x0000c000 0x001000>,      /* ap 19 */
 976                          <0x0000d000 0x0000d000 0x001000>;      /* ap 20 */
 977
 978                 target-module@4000 {                    /* 0x4a304000, ap 17 24.0 */
 979                         compatible = "ti,sysc-omap2", "ti,sysc";
 980                         reg = <0x4000 0x4>,
 981                               <0x4004 0x4>;
 982                         reg-names = "rev", "sysc";
 983                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 984                                         <SYSC_IDLE_NO>;
 985                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
 986                         clocks = <&l4_wkup_clkctrl OMAP4_COUNTER_32K_CLKCTRL 0>;
 987                         clock-names = "fck";
 988                         #address-cells = <1>;
 989                         #size-cells = <1>;
 990                         ranges = <0x0 0x4000 0x1000>;
 991
 992                         counter32k: counter@0 {
 993                                 compatible = "ti,omap-counter32k";
 994                                 reg = <0x0 0x20>;
 995                         };
 996                 };
 997
 998                 target-module@6000 {                    /* 0x4a306000, ap 3 08.0 */
 999                         compatible = "ti,sysc-omap4", "ti,sysc";
1000                         reg = <0x6000 0x4>;
1001                         reg-names = "rev";
1002                         #address-cells = <1>;
1003                         #size-cells = <1>;
1004                         ranges = <0x0 0x6000 0x2000>;
1005
1006                         prm: prm@0 {
1007                                 compatible = "ti,omap4-prm", "simple-bus";
1008                                 reg = <0x0 0x2000>;
1009                                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
1010                                 #address-cells = <1>;
1011                                 #size-cells = <1>;
1012                                 ranges = <0 0 0x2000>;
1013
1014                                 prm_clocks: clocks {
1015                                         #address-cells = <1>;
1016                                         #size-cells = <0>;
1017                                 };
1018
1019                                 prm_clockdomains: clockdomains {
1020                                 };
1021                         };
1022                 };
1023
1024                 target-module@a000 {                    /* 0x4a30a000, ap 15 34.0 */
1025                         compatible = "ti,sysc-omap4", "ti,sysc";
1026                         reg = <0xa000 0x4>;
1027                         reg-names = "rev";
1028                         #address-cells = <1>;
1029                         #size-cells = <1>;
1030                         ranges = <0x0 0xa000 0x1000>;
1031
1032                         scrm: scrm@0 {
1033                                 compatible = "ti,omap4-scrm";
1034                                 reg = <0x0 0x2000>;
1035
1036                                 scrm_clocks: clocks {
1037                                         #address-cells = <1>;
1038                                         #size-cells = <0>;
1039                                 };
1040
1041                                 scrm_clockdomains: clockdomains {
1042                                 };
1043                         };
1044                 };
1045
1046                 target-module@c000 {                    /* 0x4a30c000, ap 19 2c.0 */
1047                         compatible = "ti,sysc-omap4", "ti,sysc";
1048                         reg = <0xc000 0x4>,
1049                               <0xc010 0x4>;
1050                         reg-names = "rev", "sysc";
1051                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1052                                         <SYSC_IDLE_NO>,
1053                                         <SYSC_IDLE_SMART>,
1054                                         <SYSC_IDLE_SMART_WKUP>;
1055                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1056                         #address-cells = <1>;
1057                         #size-cells = <1>;
1058                         ranges = <0x0 0xc000 0x1000>;
1059
1060                         omap4_scm_wkup: scm@c000 {
1061                                 compatible = "ti,omap4-scm-wkup";
1062                                 reg = <0xc000 0x1000>;
1063                         };
1064                 };
1065         };
1066
1067         segment@10000 {                                 /* 0x4a310000 */
1068                 compatible = "simple-pm-bus";
1069                 #address-cells = <1>;
1070                 #size-cells = <1>;
1071                 ranges = <0x00000000 0x00010000 0x001000>,      /* ap 5 */
1072                          <0x00001000 0x00011000 0x001000>,      /* ap 6 */
1073                          <0x00004000 0x00014000 0x001000>,      /* ap 7 */
1074                          <0x00005000 0x00015000 0x001000>,      /* ap 8 */
1075                          <0x00008000 0x00018000 0x001000>,      /* ap 9 */
1076                          <0x00009000 0x00019000 0x001000>,      /* ap 10 */
1077                          <0x0000c000 0x0001c000 0x001000>,      /* ap 11 */
1078                          <0x0000d000 0x0001d000 0x001000>,      /* ap 12 */
1079                          <0x0000e000 0x0001e000 0x001000>,      /* ap 21 */
1080                          <0x0000f000 0x0001f000 0x001000>;      /* ap 22 */
1081
1082                 gpio1_target: target-module@0 {                 /* 0x4a310000, ap 5 14.0 */
1083                         compatible = "ti,sysc-omap2", "ti,sysc";
1084                         reg = <0x0 0x4>,
1085                               <0x10 0x4>,
1086                               <0x114 0x4>;
1087                         reg-names = "rev", "sysc", "syss";
1088                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1089                                          SYSC_OMAP2_SOFTRESET |
1090                                          SYSC_OMAP2_AUTOIDLE)>;
1091                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1092                                         <SYSC_IDLE_NO>,
1093                                         <SYSC_IDLE_SMART>,
1094                                         <SYSC_IDLE_SMART_WKUP>;
1095                         ti,syss-mask = <1>;
1096                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1097                         clocks = <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 0>,
1098                                  <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 8>;
1099                         clock-names = "fck", "dbclk";
1100                         #address-cells = <1>;
1101                         #size-cells = <1>;
1102                         ranges = <0x0 0x0 0x1000>;
1103
1104                         gpio1: gpio@0 {
1105                                 compatible = "ti,omap4-gpio";
1106                                 reg = <0x0 0x200>;
1107                                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
1108                                 ti,gpio-always-on;
1109                                 gpio-controller;
1110                                 #gpio-cells = <2>;
1111                                 interrupt-controller;
1112                                 #interrupt-cells = <2>;
1113                         };
1114                 };
1115
1116                 target-module@4000 {                    /* 0x4a314000, ap 7 18.0 */
1117                         compatible = "ti,sysc-omap2", "ti,sysc";
1118                         reg = <0x4000 0x4>,
1119                               <0x4010 0x4>,
1120                               <0x4014 0x4>;
1121                         reg-names = "rev", "sysc", "syss";
1122                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
1123                                          SYSC_OMAP2_SOFTRESET)>;
1124                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1125                                         <SYSC_IDLE_NO>,
1126                                         <SYSC_IDLE_SMART>,
1127                                         <SYSC_IDLE_SMART_WKUP>;
1128                         ti,syss-mask = <1>;
1129                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1130                         clocks = <&l4_wkup_clkctrl OMAP4_WD_TIMER2_CLKCTRL 0>;
1131                         clock-names = "fck";
1132                         #address-cells = <1>;
1133                         #size-cells = <1>;
1134                         ranges = <0x0 0x4000 0x1000>;
1135
1136                         wdt2: wdt@0 {
1137                                 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
1138                                 reg = <0x0 0x80>;
1139                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
1140                         };
1141                 };
1142
1143                 timer1_target: target-module@8000 {     /* 0x4a318000, ap 9 1c.0 */
1144                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1145                         reg = <0x8000 0x4>,
1146                               <0x8010 0x4>,
1147                               <0x8014 0x4>;
1148                         reg-names = "rev", "sysc", "syss";
1149                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1150                                          SYSC_OMAP2_EMUFREE |
1151                                          SYSC_OMAP2_ENAWAKEUP |
1152                                          SYSC_OMAP2_SOFTRESET |
1153                                          SYSC_OMAP2_AUTOIDLE)>;
1154                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1155                                         <SYSC_IDLE_NO>,
1156                                         <SYSC_IDLE_SMART>;
1157                         ti,syss-mask = <1>;
1158                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1159                         clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 0>;
1160                         clock-names = "fck";
1161                         #address-cells = <1>;
1162                         #size-cells = <1>;
1163                         ranges = <0x0 0x8000 0x1000>;
1164
1165                         timer1: timer@0 {
1166                                 compatible = "ti,omap3430-timer";
1167                                 reg = <0x0 0x80>;
1168                                 clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>,
1169                                          <&sys_clkin_ck>;
1170                                 clock-names = "fck", "timer_sys_ck";
1171                                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
1172                                 ti,timer-alwon;
1173                         };
1174                 };
1175
1176                 target-module@c000 {                    /* 0x4a31c000, ap 11 20.0 */
1177                         compatible = "ti,sysc-omap2", "ti,sysc";
1178                         reg = <0xc000 0x4>,
1179                               <0xc010 0x4>,
1180                               <0xc014 0x4>;
1181                         reg-names = "rev", "sysc", "syss";
1182                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1183                                          SYSC_OMAP2_EMUFREE |
1184                                          SYSC_OMAP2_ENAWAKEUP |
1185                                          SYSC_OMAP2_SOFTRESET |
1186                                          SYSC_OMAP2_AUTOIDLE)>;
1187                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1188                                         <SYSC_IDLE_NO>,
1189                                         <SYSC_IDLE_SMART>;
1190                         ti,syss-mask = <1>;
1191                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1192                         clocks = <&l4_wkup_clkctrl OMAP4_KBD_CLKCTRL 0>;
1193                         clock-names = "fck";
1194                         #address-cells = <1>;
1195                         #size-cells = <1>;
1196                         ranges = <0x0 0xc000 0x1000>;
1197
1198                         keypad: keypad@0 {
1199                                 compatible = "ti,omap4-keypad";
1200                                 reg = <0x0 0x80>;
1201                                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
1202                                 reg-names = "mpu";
1203                         };
1204                 };
1205
1206                 target-module@e000 {                    /* 0x4a31e000, ap 21 30.0 */
1207                         compatible = "ti,sysc-omap4", "ti,sysc";
1208                         reg = <0xe000 0x4>,
1209                               <0xe010 0x4>;
1210                         reg-names = "rev", "sysc";
1211                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1212                                         <SYSC_IDLE_NO>,
1213                                         <SYSC_IDLE_SMART>,
1214                                         <SYSC_IDLE_SMART_WKUP>;
1215                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1216                         #address-cells = <1>;
1217                         #size-cells = <1>;
1218                         ranges = <0x0 0xe000 0x1000>;
1219
1220                         omap4_pmx_wkup: pinmux@40 {
1221                                 compatible = "ti,omap4-padconf",
1222                                              "pinctrl-single";
1223                                 reg = <0x40 0x0038>;
1224                                 #address-cells = <1>;
1225                                 #size-cells = <0>;
1226                                 #pinctrl-cells = <1>;
1227                                 #interrupt-cells = <1>;
1228                                 interrupt-controller;
1229                                 pinctrl-single,register-width = <16>;
1230                                 pinctrl-single,function-mask = <0x7fff>;
1231                         };
1232                 };
1233         };
1234
1235         segment@20000 {                                 /* 0x4a320000 */
1236                 compatible = "simple-pm-bus";
1237                 #address-cells = <1>;
1238                 #size-cells = <1>;
1239                 ranges = <0x00006000 0x00026000 0x001000>,      /* ap 13 */
1240                          <0x0000a000 0x0002a000 0x001000>,      /* ap 14 */
1241                          <0x00000000 0x00020000 0x001000>,      /* ap 23 */
1242                          <0x00001000 0x00021000 0x001000>,      /* ap 24 */
1243                          <0x00002000 0x00022000 0x001000>,      /* ap 25 */
1244                          <0x00003000 0x00023000 0x001000>,      /* ap 26 */
1245                          <0x00004000 0x00024000 0x001000>,      /* ap 27 */
1246                          <0x00005000 0x00025000 0x001000>,      /* ap 28 */
1247                          <0x00007000 0x00027000 0x000400>,      /* ap 29 */
1248                          <0x00008000 0x00028000 0x000800>,      /* ap 30 */
1249                          <0x00009000 0x00029000 0x000400>;      /* ap 31 */
1250
1251                 target-module@0 {                       /* 0x4a320000, ap 23 04.0 */
1252                         compatible = "ti,sysc";
1253                         status = "disabled";
1254                         #address-cells = <1>;
1255                         #size-cells = <1>;
1256                         ranges = <0x0 0x0 0x1000>;
1257                 };
1258
1259                 target-module@2000 {                    /* 0x4a322000, ap 25 0c.0 */
1260                         compatible = "ti,sysc";
1261                         status = "disabled";
1262                         #address-cells = <1>;
1263                         #size-cells = <1>;
1264                         ranges = <0x0 0x2000 0x1000>;
1265                 };
1266
1267                 target-module@4000 {                    /* 0x4a324000, ap 27 10.0 */
1268                         compatible = "ti,sysc";
1269                         status = "disabled";
1270                         #address-cells = <1>;
1271                         #size-cells = <1>;
1272                         ranges = <0x0 0x4000 0x1000>;
1273                 };
1274
1275                 target-module@6000 {                    /* 0x4a326000, ap 13 28.0 */
1276                         compatible = "ti,sysc";
1277                         status = "disabled";
1278                         #address-cells = <1>;
1279                         #size-cells = <1>;
1280                         ranges = <0x00000000 0x00006000 0x00001000>,
1281                                  <0x00001000 0x00007000 0x00000400>,
1282                                  <0x00002000 0x00008000 0x00000800>,
1283                                  <0x00003000 0x00009000 0x00000400>;
1284                 };
1285         };
1286 };
1287
1288 &l4_per {                                               /* 0x48000000 */
1289         compatible = "ti,omap4-l4-per", "simple-pm-bus";
1290         power-domains = <&prm_l4per>;
1291         clocks = <&l4_per_clkctrl OMAP4_L4_PER_CLKCTRL 0>;
1292         clock-names = "fck";
1293         reg = <0x48000000 0x800>,
1294               <0x48000800 0x800>,
1295               <0x48001000 0x400>,
1296               <0x48001400 0x400>,
1297               <0x48001800 0x400>,
1298               <0x48001c00 0x400>;
1299         reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
1300         #address-cells = <1>;
1301         #size-cells = <1>;
1302         ranges = <0x00000000 0x48000000 0x200000>,      /* segment 0 */
1303                  <0x00200000 0x48200000 0x200000>;      /* segment 1 */
1304
1305         segment@0 {                                     /* 0x48000000 */
1306                 compatible = "simple-pm-bus";
1307                 #address-cells = <1>;
1308                 #size-cells = <1>;
1309                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
1310                          <0x00001000 0x00001000 0x000400>,      /* ap 1 */
1311                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
1312                          <0x00020000 0x00020000 0x001000>,      /* ap 3 */
1313                          <0x00021000 0x00021000 0x001000>,      /* ap 4 */
1314                          <0x00032000 0x00032000 0x001000>,      /* ap 5 */
1315                          <0x00033000 0x00033000 0x001000>,      /* ap 6 */
1316                          <0x00034000 0x00034000 0x001000>,      /* ap 7 */
1317                          <0x00035000 0x00035000 0x001000>,      /* ap 8 */
1318                          <0x00036000 0x00036000 0x001000>,      /* ap 9 */
1319                          <0x00037000 0x00037000 0x001000>,      /* ap 10 */
1320                          <0x0003e000 0x0003e000 0x001000>,      /* ap 11 */
1321                          <0x0003f000 0x0003f000 0x001000>,      /* ap 12 */
1322                          <0x00040000 0x00040000 0x010000>,      /* ap 13 */
1323                          <0x00050000 0x00050000 0x001000>,      /* ap 14 */
1324                          <0x00055000 0x00055000 0x001000>,      /* ap 15 */
1325                          <0x00056000 0x00056000 0x001000>,      /* ap 16 */
1326                          <0x00057000 0x00057000 0x001000>,      /* ap 17 */
1327                          <0x00058000 0x00058000 0x001000>,      /* ap 18 */
1328                          <0x00059000 0x00059000 0x001000>,      /* ap 19 */
1329                          <0x0005a000 0x0005a000 0x001000>,      /* ap 20 */
1330                          <0x0005b000 0x0005b000 0x001000>,      /* ap 21 */
1331                          <0x0005c000 0x0005c000 0x001000>,      /* ap 22 */
1332                          <0x0005d000 0x0005d000 0x001000>,      /* ap 23 */
1333                          <0x0005e000 0x0005e000 0x001000>,      /* ap 24 */
1334                          <0x00060000 0x00060000 0x001000>,      /* ap 25 */
1335                          <0x0006a000 0x0006a000 0x001000>,      /* ap 26 */
1336                          <0x0006b000 0x0006b000 0x001000>,      /* ap 27 */
1337                          <0x0006c000 0x0006c000 0x001000>,      /* ap 28 */
1338                          <0x0006d000 0x0006d000 0x001000>,      /* ap 29 */
1339                          <0x0006e000 0x0006e000 0x001000>,      /* ap 30 */
1340                          <0x0006f000 0x0006f000 0x001000>,      /* ap 31 */
1341                          <0x00070000 0x00070000 0x001000>,      /* ap 32 */
1342                          <0x00071000 0x00071000 0x001000>,      /* ap 33 */
1343                          <0x00072000 0x00072000 0x001000>,      /* ap 34 */
1344                          <0x00073000 0x00073000 0x001000>,      /* ap 35 */
1345                          <0x00061000 0x00061000 0x001000>,      /* ap 36 */
1346                          <0x00096000 0x00096000 0x001000>,      /* ap 37 */
1347                          <0x00097000 0x00097000 0x001000>,      /* ap 38 */
1348                          <0x00076000 0x00076000 0x001000>,      /* ap 39 */
1349                          <0x00077000 0x00077000 0x001000>,      /* ap 40 */
1350                          <0x00078000 0x00078000 0x001000>,      /* ap 41 */
1351                          <0x00079000 0x00079000 0x001000>,      /* ap 42 */
1352                          <0x00086000 0x00086000 0x001000>,      /* ap 43 */
1353                          <0x00087000 0x00087000 0x001000>,      /* ap 44 */
1354                          <0x00088000 0x00088000 0x001000>,      /* ap 45 */
1355                          <0x00089000 0x00089000 0x001000>,      /* ap 46 */
1356                          <0x000b0000 0x000b0000 0x001000>,      /* ap 47 */
1357                          <0x000b1000 0x000b1000 0x001000>,      /* ap 48 */
1358                          <0x00098000 0x00098000 0x001000>,      /* ap 49 */
1359                          <0x00099000 0x00099000 0x001000>,      /* ap 50 */
1360                          <0x0009a000 0x0009a000 0x001000>,      /* ap 51 */
1361                          <0x0009b000 0x0009b000 0x001000>,      /* ap 52 */
1362                          <0x0009c000 0x0009c000 0x001000>,      /* ap 53 */
1363                          <0x0009d000 0x0009d000 0x001000>,      /* ap 54 */
1364                          <0x0009e000 0x0009e000 0x001000>,      /* ap 55 */
1365                          <0x0009f000 0x0009f000 0x001000>,      /* ap 56 */
1366                          <0x00090000 0x00090000 0x002000>,      /* ap 57 */
1367                          <0x00092000 0x00092000 0x001000>,      /* ap 58 */
1368                          <0x000a4000 0x000a4000 0x001000>,      /* ap 59 */
1369                          <0x000a6000 0x000a6000 0x001000>,      /* ap 60 */
1370                          <0x000a8000 0x000a8000 0x004000>,      /* ap 61 */
1371                          <0x000ac000 0x000ac000 0x001000>,      /* ap 62 */
1372                          <0x000ad000 0x000ad000 0x001000>,      /* ap 63 */
1373                          <0x000ae000 0x000ae000 0x001000>,      /* ap 64 */
1374                          <0x000b2000 0x000b2000 0x001000>,      /* ap 65 */
1375                          <0x000b3000 0x000b3000 0x001000>,      /* ap 66 */
1376                          <0x000b4000 0x000b4000 0x001000>,      /* ap 67 */
1377                          <0x000b5000 0x000b5000 0x001000>,      /* ap 68 */
1378                          <0x000b8000 0x000b8000 0x001000>,      /* ap 69 */
1379                          <0x000b9000 0x000b9000 0x001000>,      /* ap 70 */
1380                          <0x000ba000 0x000ba000 0x001000>,      /* ap 71 */
1381                          <0x000bb000 0x000bb000 0x001000>,      /* ap 72 */
1382                          <0x000d1000 0x000d1000 0x001000>,      /* ap 73 */
1383                          <0x000d2000 0x000d2000 0x001000>,      /* ap 74 */
1384                          <0x000d5000 0x000d5000 0x001000>,      /* ap 75 */
1385                          <0x000d6000 0x000d6000 0x001000>,      /* ap 76 */
1386                          <0x000a2000 0x000a2000 0x001000>,      /* ap 79 */
1387                          <0x000a3000 0x000a3000 0x001000>,      /* ap 80 */
1388                          <0x00001400 0x00001400 0x000400>,      /* ap 81 */
1389                          <0x00001800 0x00001800 0x000400>,      /* ap 82 */
1390                          <0x00001c00 0x00001c00 0x000400>,      /* ap 83 */
1391                          <0x000a5000 0x000a5000 0x001000>;      /* ap 84 */
1392
1393                 target-module@20000 {                   /* 0x48020000, ap 3 06.0 */
1394                         compatible = "ti,sysc-omap2", "ti,sysc";
1395                         reg = <0x20050 0x4>,
1396                               <0x20054 0x4>,
1397                               <0x20058 0x4>;
1398                         reg-names = "rev", "sysc", "syss";
1399                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1400                                          SYSC_OMAP2_SOFTRESET |
1401                                          SYSC_OMAP2_AUTOIDLE)>;
1402                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1403                                         <SYSC_IDLE_NO>,
1404                                         <SYSC_IDLE_SMART>,
1405                                         <SYSC_IDLE_SMART_WKUP>;
1406                         ti,syss-mask = <1>;
1407                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1408                         clocks = <&l4_per_clkctrl OMAP4_UART3_CLKCTRL 0>;
1409                         clock-names = "fck";
1410                         #address-cells = <1>;
1411                         #size-cells = <1>;
1412                         ranges = <0x0 0x20000 0x1000>;
1413
1414                         uart3: serial@0 {
1415                                 compatible = "ti,omap4-uart";
1416                                 reg = <0x0 0x100>;
1417                                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1418                                 clock-frequency = <48000000>;
1419                         };
1420                 };
1421
1422                 target-module@32000 {                   /* 0x48032000, ap 5 02.0 */
1423                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1424                         reg = <0x32000 0x4>,
1425                               <0x32010 0x4>,
1426                               <0x32014 0x4>;
1427                         reg-names = "rev", "sysc", "syss";
1428                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1429                                          SYSC_OMAP2_EMUFREE |
1430                                          SYSC_OMAP2_ENAWAKEUP |
1431                                          SYSC_OMAP2_SOFTRESET |
1432                                          SYSC_OMAP2_AUTOIDLE)>;
1433                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1434                                         <SYSC_IDLE_NO>,
1435                                         <SYSC_IDLE_SMART>;
1436                         ti,syss-mask = <1>;
1437                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1438                         clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 0>;
1439                         clock-names = "fck";
1440                         #address-cells = <1>;
1441                         #size-cells = <1>;
1442                         ranges = <0x0 0x32000 0x1000>;
1443
1444                         timer2: timer@0 {
1445                                 compatible = "ti,omap3430-timer";
1446                                 reg = <0x0 0x80>;
1447                                 clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 24>,
1448                                          <&sys_clkin_ck>;
1449                                 clock-names = "fck", "timer_sys_ck";
1450                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1451                         };
1452                 };
1453
1454                 target-module@34000 {                   /* 0x48034000, ap 7 04.0 */
1455                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1456                         reg = <0x34000 0x4>,
1457                               <0x34010 0x4>;
1458                         reg-names = "rev", "sysc";
1459                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1460                                          SYSC_OMAP4_SOFTRESET)>;
1461                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1462                                         <SYSC_IDLE_NO>,
1463                                         <SYSC_IDLE_SMART>,
1464                                         <SYSC_IDLE_SMART_WKUP>;
1465                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1466                         clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 0>;
1467                         clock-names = "fck";
1468                         #address-cells = <1>;
1469                         #size-cells = <1>;
1470                         ranges = <0x0 0x34000 0x1000>;
1471
1472                         timer3: timer@0 {
1473                                 compatible = "ti,omap4430-timer";
1474                                 reg = <0x0 0x80>;
1475                                 clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 24>,
1476                                          <&sys_clkin_ck>;
1477                                 clock-names = "fck", "timer_sys_ck";
1478                                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
1479                         };
1480                 };
1481
1482                 target-module@36000 {                   /* 0x48036000, ap 9 0e.0 */
1483                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1484                         reg = <0x36000 0x4>,
1485                               <0x36010 0x4>;
1486                         reg-names = "rev", "sysc";
1487                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1488                                          SYSC_OMAP4_SOFTRESET)>;
1489                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1490                                         <SYSC_IDLE_NO>,
1491                                         <SYSC_IDLE_SMART>,
1492                                         <SYSC_IDLE_SMART_WKUP>;
1493                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1494                         clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 0>;
1495                         clock-names = "fck";
1496                         #address-cells = <1>;
1497                         #size-cells = <1>;
1498                         ranges = <0x0 0x36000 0x1000>;
1499
1500                         timer4: timer@0 {
1501                                 compatible = "ti,omap4430-timer";
1502                                 reg = <0x0 0x80>;
1503                                 clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 24>,
1504                                          <&sys_clkin_ck>;
1505                                 clock-names = "fck", "timer_sys_ck";
1506                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1507                         };
1508                 };
1509
1510                 target-module@3e000 {                   /* 0x4803e000, ap 11 08.0 */
1511                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1512                         reg = <0x3e000 0x4>,
1513                               <0x3e010 0x4>;
1514                         reg-names = "rev", "sysc";
1515                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1516                                          SYSC_OMAP4_SOFTRESET)>;
1517                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1518                                         <SYSC_IDLE_NO>,
1519                                         <SYSC_IDLE_SMART>,
1520                                         <SYSC_IDLE_SMART_WKUP>;
1521                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1522                         clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 0>;
1523                         clock-names = "fck";
1524                         #address-cells = <1>;
1525                         #size-cells = <1>;
1526                         ranges = <0x0 0x3e000 0x1000>;
1527
1528                         timer9: timer@0 {
1529                                 compatible = "ti,omap4430-timer";
1530                                 reg = <0x0 0x80>;
1531                                 clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>,
1532                                          <&sys_clkin_ck>;
1533                                 clock-names = "fck", "timer_sys_ck";
1534                                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1535                                 ti,timer-pwm;
1536                         };
1537                 };
1538
1539                 /* Unused DSS L4 access, see L3 instead */
1540                 target-module@40000 {                   /* 0x48040000, ap 13 0a.0 */
1541                         compatible = "ti,sysc";
1542                         status = "disabled";
1543                         #address-cells = <1>;
1544                         #size-cells = <1>;
1545                         ranges = <0x0 0x40000 0x10000>;
1546                 };
1547
1548                 target-module@55000 {                   /* 0x48055000, ap 15 0c.0 */
1549                         compatible = "ti,sysc-omap2", "ti,sysc";
1550                         reg = <0x55000 0x4>,
1551                               <0x55010 0x4>,
1552                               <0x55114 0x4>;
1553                         reg-names = "rev", "sysc", "syss";
1554                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1555                                          SYSC_OMAP2_SOFTRESET |
1556                                          SYSC_OMAP2_AUTOIDLE)>;
1557                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1558                                         <SYSC_IDLE_NO>,
1559                                         <SYSC_IDLE_SMART>,
1560                                         <SYSC_IDLE_SMART_WKUP>;
1561                         ti,syss-mask = <1>;
1562                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1563                         clocks = <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 0>,
1564                                  <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 8>;
1565                         clock-names = "fck", "dbclk";
1566                         #address-cells = <1>;
1567                         #size-cells = <1>;
1568                         ranges = <0x0 0x55000 0x1000>;
1569
1570                         gpio2: gpio@0 {
1571                                 compatible = "ti,omap4-gpio";
1572                                 reg = <0x0 0x200>;
1573                                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1574                                 gpio-controller;
1575                                 #gpio-cells = <2>;
1576                                 interrupt-controller;
1577                                 #interrupt-cells = <2>;
1578                         };
1579                 };
1580
1581                 target-module@57000 {                   /* 0x48057000, ap 17 16.0 */
1582                         compatible = "ti,sysc-omap2", "ti,sysc";
1583                         reg = <0x57000 0x4>,
1584                               <0x57010 0x4>,
1585                               <0x57114 0x4>;
1586                         reg-names = "rev", "sysc", "syss";
1587                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1588                                          SYSC_OMAP2_SOFTRESET |
1589                                          SYSC_OMAP2_AUTOIDLE)>;
1590                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1591                                         <SYSC_IDLE_NO>,
1592                                         <SYSC_IDLE_SMART>,
1593                                         <SYSC_IDLE_SMART_WKUP>;
1594                         ti,syss-mask = <1>;
1595                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1596                         clocks = <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 0>,
1597                                  <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 8>;
1598                         clock-names = "fck", "dbclk";
1599                         #address-cells = <1>;
1600                         #size-cells = <1>;
1601                         ranges = <0x0 0x57000 0x1000>;
1602
1603                         gpio3: gpio@0 {
1604                                 compatible = "ti,omap4-gpio";
1605                                 reg = <0x0 0x200>;
1606                                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
1607                                 gpio-controller;
1608                                 #gpio-cells = <2>;
1609                                 interrupt-controller;
1610                                 #interrupt-cells = <2>;
1611                         };
1612                 };
1613
1614                 target-module@59000 {                   /* 0x48059000, ap 19 10.0 */
1615                         compatible = "ti,sysc-omap2", "ti,sysc";
1616                         reg = <0x59000 0x4>,
1617                               <0x59010 0x4>,
1618                               <0x59114 0x4>;
1619                         reg-names = "rev", "sysc", "syss";
1620                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1621                                          SYSC_OMAP2_SOFTRESET |
1622                                          SYSC_OMAP2_AUTOIDLE)>;
1623                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1624                                         <SYSC_IDLE_NO>,
1625                                         <SYSC_IDLE_SMART>,
1626                                         <SYSC_IDLE_SMART_WKUP>;
1627                         ti,syss-mask = <1>;
1628                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1629                         clocks = <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 0>,
1630                                  <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 8>;
1631                         clock-names = "fck", "dbclk";
1632                         #address-cells = <1>;
1633                         #size-cells = <1>;
1634                         ranges = <0x0 0x59000 0x1000>;
1635
1636                         gpio4: gpio@0 {
1637                                 compatible = "ti,omap4-gpio";
1638                                 reg = <0x0 0x200>;
1639                                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1640                                 gpio-controller;
1641                                 #gpio-cells = <2>;
1642                                 interrupt-controller;
1643                                 #interrupt-cells = <2>;
1644                         };
1645                 };
1646
1647                 target-module@5b000 {                   /* 0x4805b000, ap 21 12.0 */
1648                         compatible = "ti,sysc-omap2", "ti,sysc";
1649                         reg = <0x5b000 0x4>,
1650                               <0x5b010 0x4>,
1651                               <0x5b114 0x4>;
1652                         reg-names = "rev", "sysc", "syss";
1653                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1654                                          SYSC_OMAP2_SOFTRESET |
1655                                          SYSC_OMAP2_AUTOIDLE)>;
1656                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1657                                         <SYSC_IDLE_NO>,
1658                                         <SYSC_IDLE_SMART>,
1659                                         <SYSC_IDLE_SMART_WKUP>;
1660                         ti,syss-mask = <1>;
1661                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1662                         clocks = <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 0>,
1663                                  <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 8>;
1664                         clock-names = "fck", "dbclk";
1665                         #address-cells = <1>;
1666                         #size-cells = <1>;
1667                         ranges = <0x0 0x5b000 0x1000>;
1668
1669                         gpio5: gpio@0 {
1670                                 compatible = "ti,omap4-gpio";
1671                                 reg = <0x0 0x200>;
1672                                 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
1673                                 gpio-controller;
1674                                 #gpio-cells = <2>;
1675                                 interrupt-controller;
1676                                 #interrupt-cells = <2>;
1677                         };
1678                 };
1679
1680                 target-module@5d000 {                   /* 0x4805d000, ap 23 14.0 */
1681                         compatible = "ti,sysc-omap2", "ti,sysc";
1682                         reg = <0x5d000 0x4>,
1683                               <0x5d010 0x4>,
1684                               <0x5d114 0x4>;
1685                         reg-names = "rev", "sysc", "syss";
1686                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1687                                          SYSC_OMAP2_SOFTRESET |
1688                                          SYSC_OMAP2_AUTOIDLE)>;
1689                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1690                                         <SYSC_IDLE_NO>,
1691                                         <SYSC_IDLE_SMART>,
1692                                         <SYSC_IDLE_SMART_WKUP>;
1693                         ti,syss-mask = <1>;
1694                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1695                         clocks = <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 0>,
1696                                  <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 8>;
1697                         clock-names = "fck", "dbclk";
1698                         #address-cells = <1>;
1699                         #size-cells = <1>;
1700                         ranges = <0x0 0x5d000 0x1000>;
1701
1702                         gpio6: gpio@0 {
1703                                 compatible = "ti,omap4-gpio";
1704                                 reg = <0x0 0x200>;
1705                                 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1706                                 gpio-controller;
1707                                 #gpio-cells = <2>;
1708                                 interrupt-controller;
1709                                 #interrupt-cells = <2>;
1710                         };
1711                 };
1712
1713                 target-module@60000 {                   /* 0x48060000, ap 25 1e.0 */
1714                         compatible = "ti,sysc-omap2", "ti,sysc";
1715                         reg = <0x60000 0x8>,
1716                               <0x60010 0x8>,
1717                               <0x60090 0x8>;
1718                         reg-names = "rev", "sysc", "syss";
1719                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1720                                          SYSC_OMAP2_ENAWAKEUP |
1721                                          SYSC_OMAP2_SOFTRESET |
1722                                          SYSC_OMAP2_AUTOIDLE)>;
1723                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1724                                         <SYSC_IDLE_NO>,
1725                                         <SYSC_IDLE_SMART>,
1726                                         <SYSC_IDLE_SMART_WKUP>;
1727                         ti,syss-mask = <1>;
1728                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1729                         clocks = <&l4_per_clkctrl OMAP4_I2C3_CLKCTRL 0>;
1730                         clock-names = "fck";
1731                         #address-cells = <1>;
1732                         #size-cells = <1>;
1733                         ranges = <0x0 0x60000 0x1000>;
1734
1735                         i2c3: i2c@0 {
1736                                 compatible = "ti,omap4-i2c";
1737                                 reg = <0x0 0x100>;
1738                                 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1739                                 #address-cells = <1>;
1740                                 #size-cells = <0>;
1741                         };
1742                 };
1743
1744                 target-module@6a000 {                   /* 0x4806a000, ap 26 18.0 */
1745                         compatible = "ti,sysc-omap2", "ti,sysc";
1746                         reg = <0x6a050 0x4>,
1747                               <0x6a054 0x4>,
1748                               <0x6a058 0x4>;
1749                         reg-names = "rev", "sysc", "syss";
1750                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1751                                          SYSC_OMAP2_SOFTRESET |
1752                                          SYSC_OMAP2_AUTOIDLE)>;
1753                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1754                                         <SYSC_IDLE_NO>,
1755                                         <SYSC_IDLE_SMART>,
1756                                         <SYSC_IDLE_SMART_WKUP>;
1757                         ti,syss-mask = <1>;
1758                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1759                         clocks = <&l4_per_clkctrl OMAP4_UART1_CLKCTRL 0>;
1760                         clock-names = "fck";
1761                         #address-cells = <1>;
1762                         #size-cells = <1>;
1763                         ranges = <0x0 0x6a000 0x1000>;
1764
1765                         uart1: serial@0 {
1766                                 compatible = "ti,omap4-uart";
1767                                 reg = <0x0 0x100>;
1768                                 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1769                                 clock-frequency = <48000000>;
1770                         };
1771                 };
1772
1773                 target-module@6c000 {                   /* 0x4806c000, ap 28 20.0 */
1774                         compatible = "ti,sysc-omap2", "ti,sysc";
1775                         reg = <0x6c050 0x4>,
1776                               <0x6c054 0x4>,
1777                               <0x6c058 0x4>;
1778                         reg-names = "rev", "sysc", "syss";
1779                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1780                                          SYSC_OMAP2_SOFTRESET |
1781                                          SYSC_OMAP2_AUTOIDLE)>;
1782                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1783                                         <SYSC_IDLE_NO>,
1784                                         <SYSC_IDLE_SMART>,
1785                                         <SYSC_IDLE_SMART_WKUP>;
1786                         ti,syss-mask = <1>;
1787                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1788                         clocks = <&l4_per_clkctrl OMAP4_UART2_CLKCTRL 0>;
1789                         clock-names = "fck";
1790                         #address-cells = <1>;
1791                         #size-cells = <1>;
1792                         ranges = <0x0 0x6c000 0x1000>;
1793
1794                         uart2: serial@0 {
1795                                 compatible = "ti,omap4-uart";
1796                                 reg = <0x0 0x100>;
1797                                 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1798                                 clock-frequency = <48000000>;
1799                         };
1800                 };
1801
1802                 target-module@6e000 {                   /* 0x4806e000, ap 30 1c.1 */
1803                         compatible = "ti,sysc-omap2", "ti,sysc";
1804                         reg = <0x6e050 0x4>,
1805                               <0x6e054 0x4>,
1806                               <0x6e058 0x4>;
1807                         reg-names = "rev", "sysc", "syss";
1808                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1809                                          SYSC_OMAP2_SOFTRESET |
1810                                          SYSC_OMAP2_AUTOIDLE)>;
1811                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1812                                         <SYSC_IDLE_NO>,
1813                                         <SYSC_IDLE_SMART>,
1814                                         <SYSC_IDLE_SMART_WKUP>;
1815                         ti,syss-mask = <1>;
1816                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1817                         clocks = <&l4_per_clkctrl OMAP4_UART4_CLKCTRL 0>;
1818                         clock-names = "fck";
1819                         #address-cells = <1>;
1820                         #size-cells = <1>;
1821                         ranges = <0x0 0x6e000 0x1000>;
1822
1823                         uart4: serial@0 {
1824                                 compatible = "ti,omap4-uart";
1825                                 reg = <0x0 0x100>;
1826                                 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
1827                                 clock-frequency = <48000000>;
1828                         };
1829                 };
1830
1831                 target-module@70000 {                   /* 0x48070000, ap 32 28.0 */
1832                         compatible = "ti,sysc-omap2", "ti,sysc";
1833                         reg = <0x70000 0x8>,
1834                               <0x70010 0x8>,
1835                               <0x70090 0x8>;
1836                         reg-names = "rev", "sysc", "syss";
1837                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1838                                          SYSC_OMAP2_ENAWAKEUP |
1839                                          SYSC_OMAP2_SOFTRESET |
1840                                          SYSC_OMAP2_AUTOIDLE)>;
1841                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1842                                         <SYSC_IDLE_NO>,
1843                                         <SYSC_IDLE_SMART>,
1844                                         <SYSC_IDLE_SMART_WKUP>;
1845                         ti,syss-mask = <1>;
1846                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1847                         clocks = <&l4_per_clkctrl OMAP4_I2C1_CLKCTRL 0>;
1848                         clock-names = "fck";
1849                         #address-cells = <1>;
1850                         #size-cells = <1>;
1851                         ranges = <0x0 0x70000 0x1000>;
1852
1853                         i2c1: i2c@0 {
1854                                 compatible = "ti,omap4-i2c";
1855                                 reg = <0x0 0x100>;
1856                                 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
1857                                 #address-cells = <1>;
1858                                 #size-cells = <0>;
1859                         };
1860                 };
1861
1862                 target-module@72000 {                   /* 0x48072000, ap 34 30.0 */
1863                         compatible = "ti,sysc-omap2", "ti,sysc";
1864                         reg = <0x72000 0x8>,
1865                               <0x72010 0x8>,
1866                               <0x72090 0x8>;
1867                         reg-names = "rev", "sysc", "syss";
1868                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1869                                          SYSC_OMAP2_ENAWAKEUP |
1870                                          SYSC_OMAP2_SOFTRESET |
1871                                          SYSC_OMAP2_AUTOIDLE)>;
1872                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1873                                         <SYSC_IDLE_NO>,
1874                                         <SYSC_IDLE_SMART>,
1875                                         <SYSC_IDLE_SMART_WKUP>;
1876                         ti,syss-mask = <1>;
1877                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1878                         clocks = <&l4_per_clkctrl OMAP4_I2C2_CLKCTRL 0>;
1879                         clock-names = "fck";
1880                         #address-cells = <1>;
1881                         #size-cells = <1>;
1882                         ranges = <0x0 0x72000 0x1000>;
1883
1884                         i2c2: i2c@0 {
1885                                 compatible = "ti,omap4-i2c";
1886                                 reg = <0x0 0x100>;
1887                                 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
1888                                 #address-cells = <1>;
1889                                 #size-cells = <0>;
1890                         };
1891                 };
1892
1893                 target-module@76000 {                   /* 0x48076000, ap 39 38.0 */
1894                         compatible = "ti,sysc-omap4", "ti,sysc";
1895                         reg = <0x76000 0x4>,
1896                               <0x76010 0x4>;
1897                         reg-names = "rev", "sysc";
1898                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1899                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1900                                         <SYSC_IDLE_NO>,
1901                                         <SYSC_IDLE_SMART>,
1902                                         <SYSC_IDLE_SMART_WKUP>;
1903                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1904                         clocks = <&l4_per_clkctrl OMAP4_SLIMBUS2_CLKCTRL 0>;
1905                         clock-names = "fck";
1906                         #address-cells = <1>;
1907                         #size-cells = <1>;
1908                         ranges = <0x0 0x76000 0x1000>;
1909
1910                         /* No child device binding or driver in mainline */
1911                 };
1912
1913                 target-module@78000 {                   /* 0x48078000, ap 41 1a.0 */
1914                         compatible = "ti,sysc-omap2", "ti,sysc";
1915                         reg = <0x78000 0x4>,
1916                               <0x78010 0x4>,
1917                               <0x78014 0x4>;
1918                         reg-names = "rev", "sysc", "syss";
1919                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1920                                          SYSC_OMAP2_SOFTRESET |
1921                                          SYSC_OMAP2_AUTOIDLE)>;
1922                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1923                                         <SYSC_IDLE_NO>,
1924                                         <SYSC_IDLE_SMART>;
1925                         ti,syss-mask = <1>;
1926                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1927                         clocks = <&l4_per_clkctrl OMAP4_ELM_CLKCTRL 0>;
1928                         clock-names = "fck";
1929                         #address-cells = <1>;
1930                         #size-cells = <1>;
1931                         ranges = <0x0 0x78000 0x1000>;
1932
1933                         elm: elm@0 {
1934                                 compatible = "ti,am3352-elm";
1935                                 reg = <0x0 0x2000>;
1936                                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
1937                                 status = "disabled";
1938                         };
1939                 };
1940
1941                 target-module@86000 {                   /* 0x48086000, ap 43 24.0 */
1942                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1943                         reg = <0x86000 0x4>,
1944                               <0x86010 0x4>,
1945                               <0x86014 0x4>;
1946                         reg-names = "rev", "sysc", "syss";
1947                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1948                                          SYSC_OMAP2_EMUFREE |
1949                                          SYSC_OMAP2_ENAWAKEUP |
1950                                          SYSC_OMAP2_SOFTRESET |
1951                                          SYSC_OMAP2_AUTOIDLE)>;
1952                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1953                                         <SYSC_IDLE_NO>,
1954                                         <SYSC_IDLE_SMART>;
1955                         ti,syss-mask = <1>;
1956                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1957                         clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 0>;
1958                         clock-names = "fck";
1959                         #address-cells = <1>;
1960                         #size-cells = <1>;
1961                         ranges = <0x0 0x86000 0x1000>;
1962
1963                         timer10: timer@0 {
1964                                 compatible = "ti,omap3430-timer";
1965                                 reg = <0x0 0x80>;
1966                                 clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 24>,
1967                                          <&sys_clkin_ck>;
1968                                 clock-names = "fck", "timer_sys_ck";
1969                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1970                                 ti,timer-pwm;
1971                         };
1972                 };
1973
1974                 target-module@88000 {                   /* 0x48088000, ap 45 2e.0 */
1975                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1976                         reg = <0x88000 0x4>,
1977                               <0x88010 0x4>;
1978                         reg-names = "rev", "sysc";
1979                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1980                                          SYSC_OMAP4_SOFTRESET)>;
1981                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1982                                         <SYSC_IDLE_NO>,
1983                                         <SYSC_IDLE_SMART>,
1984                                         <SYSC_IDLE_SMART_WKUP>;
1985                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1986                         clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 0>;
1987                         clock-names = "fck";
1988                         #address-cells = <1>;
1989                         #size-cells = <1>;
1990                         ranges = <0x0 0x88000 0x1000>;
1991
1992                         timer11: timer@0 {
1993                                 compatible = "ti,omap4430-timer";
1994                                 reg = <0x0 0x80>;
1995                                 clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 24>,
1996                                          <&sys_clkin_ck>;
1997                                 clock-names = "fck", "timer_sys_ck";
1998                                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
1999                                 ti,timer-pwm;
2000                         };
2001                 };
2002
2003                 rng_target: target-module@90000 {       /* 0x48090000, ap 57 2a.0 */
2004                         compatible = "ti,sysc-omap2", "ti,sysc";
2005                         reg = <0x91fe0 0x4>,
2006                               <0x91fe4 0x4>;
2007                         reg-names = "rev", "sysc";
2008                         ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
2009                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2010                                         <SYSC_IDLE_NO>;
2011                         /* Domains (P, C): l4per_pwrdm, l4_secure_clkdm */
2012                         clocks = <&l4_secure_clkctrl OMAP4_RNG_CLKCTRL 0>;
2013                         clock-names = "fck";
2014                         #address-cells = <1>;
2015                         #size-cells = <1>;
2016                         ranges = <0x0 0x90000 0x2000>;
2017
2018                         rng: rng@0 {
2019                                 compatible = "ti,omap4-rng";
2020                                 reg = <0x0 0x2000>;
2021                                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
2022                         };
2023                 };
2024
2025                 target-module@96000 {                   /* 0x48096000, ap 37 26.0 */
2026                         compatible = "ti,sysc-omap2", "ti,sysc";
2027                         reg = <0x9608c 0x4>;
2028                         reg-names = "sysc";
2029                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2030                                          SYSC_OMAP2_ENAWAKEUP |
2031                                          SYSC_OMAP2_SOFTRESET)>;
2032                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2033                                         <SYSC_IDLE_NO>,
2034                                         <SYSC_IDLE_SMART>;
2035                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2036                         clocks = <&l4_per_clkctrl OMAP4_MCBSP4_CLKCTRL 0>;
2037                         clock-names = "fck";
2038                         #address-cells = <1>;
2039                         #size-cells = <1>;
2040                         ranges = <0x0 0x96000 0x1000>;
2041
2042                         mcbsp4: mcbsp@0 {
2043                                 compatible = "ti,omap4-mcbsp";
2044                                 reg = <0x0 0xff>; /* L4 Interconnect */
2045                                 reg-names = "mpu";
2046                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
2047                                 interrupt-names = "common";
2048                                 ti,buffer-size = <128>;
2049                                 dmas = <&sdma 31>,
2050                                        <&sdma 32>;
2051                                 dma-names = "tx", "rx";
2052                                 status = "disabled";
2053                         };
2054                 };
2055
2056                 target-module@98000 {                   /* 0x48098000, ap 49 22.0 */
2057                         compatible = "ti,sysc-omap4", "ti,sysc";
2058                         reg = <0x98000 0x4>,
2059                               <0x98010 0x4>;
2060                         reg-names = "rev", "sysc";
2061                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2062                                          SYSC_OMAP4_SOFTRESET)>;
2063                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2064                                         <SYSC_IDLE_NO>,
2065                                         <SYSC_IDLE_SMART>,
2066                                         <SYSC_IDLE_SMART_WKUP>;
2067                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2068                         clocks = <&l4_per_clkctrl OMAP4_MCSPI1_CLKCTRL 0>;
2069                         clock-names = "fck";
2070                         #address-cells = <1>;
2071                         #size-cells = <1>;
2072                         ranges = <0x0 0x98000 0x1000>;
2073
2074                         mcspi1: spi@0 {
2075                                 compatible = "ti,omap4-mcspi";
2076                                 reg = <0x0 0x200>;
2077                                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
2078                                 #address-cells = <1>;
2079                                 #size-cells = <0>;
2080                                 ti,spi-num-cs = <4>;
2081                                 dmas = <&sdma 35>,
2082                                        <&sdma 36>,
2083                                        <&sdma 37>,
2084                                        <&sdma 38>,
2085                                        <&sdma 39>,
2086                                        <&sdma 40>,
2087                                        <&sdma 41>,
2088                                        <&sdma 42>;
2089                                 dma-names = "tx0", "rx0", "tx1", "rx1",
2090                                             "tx2", "rx2", "tx3", "rx3";
2091                         };
2092                 };
2093
2094                 target-module@9a000 {                   /* 0x4809a000, ap 51 2c.0 */
2095                         compatible = "ti,sysc-omap4", "ti,sysc";
2096                         reg = <0x9a000 0x4>,
2097                               <0x9a010 0x4>;
2098                         reg-names = "rev", "sysc";
2099                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2100                                          SYSC_OMAP4_SOFTRESET)>;
2101                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2102                                         <SYSC_IDLE_NO>,
2103                                         <SYSC_IDLE_SMART>,
2104                                         <SYSC_IDLE_SMART_WKUP>;
2105                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2106                         clocks = <&l4_per_clkctrl OMAP4_MCSPI2_CLKCTRL 0>;
2107                         clock-names = "fck";
2108                         #address-cells = <1>;
2109                         #size-cells = <1>;
2110                         ranges = <0x0 0x9a000 0x1000>;
2111
2112                         mcspi2: spi@0 {
2113                                 compatible = "ti,omap4-mcspi";
2114                                 reg = <0x0 0x200>;
2115                                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
2116                                 #address-cells = <1>;
2117                                 #size-cells = <0>;
2118                                 ti,spi-num-cs = <2>;
2119                                 dmas = <&sdma 43>,
2120                                        <&sdma 44>,
2121                                        <&sdma 45>,
2122                                        <&sdma 46>;
2123                                 dma-names = "tx0", "rx0", "tx1", "rx1";
2124                         };
2125                 };
2126
2127                 target-module@9c000 {                   /* 0x4809c000, ap 53 36.0 */
2128                         compatible = "ti,sysc-omap4", "ti,sysc";
2129                         reg = <0x9c000 0x4>,
2130                               <0x9c010 0x4>;
2131                         reg-names = "rev", "sysc";
2132                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2133                                          SYSC_OMAP4_SOFTRESET)>;
2134                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2135                                         <SYSC_IDLE_NO>,
2136                                         <SYSC_IDLE_SMART>,
2137                                         <SYSC_IDLE_SMART_WKUP>;
2138                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2139                                         <SYSC_IDLE_NO>,
2140                                         <SYSC_IDLE_SMART>,
2141                                         <SYSC_IDLE_SMART_WKUP>;
2142                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
2143                         clocks = <&l3_init_clkctrl OMAP4_MMC1_CLKCTRL 0>;
2144                         clock-names = "fck";
2145                         #address-cells = <1>;
2146                         #size-cells = <1>;
2147                         ranges = <0x0 0x9c000 0x1000>;
2148
2149                         mmc1: mmc@0 {
2150                                 compatible = "ti,omap4-hsmmc";
2151                                 reg = <0x0 0x400>;
2152                                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
2153                                 ti,dual-volt;
2154                                 ti,needs-special-reset;
2155                                 dmas = <&sdma 61>, <&sdma 62>;
2156                                 dma-names = "tx", "rx";
2157                                 pbias-supply = <&pbias_mmc_reg>;
2158                         };
2159                 };
2160
2161                 target-module@9e000 {                   /* 0x4809e000, ap 55 48.0 */
2162                         compatible = "ti,sysc";
2163                         status = "disabled";
2164                         #address-cells = <1>;
2165                         #size-cells = <1>;
2166                         ranges = <0x0 0x9e000 0x1000>;
2167                 };
2168
2169                 target-module@a2000 {                   /* 0x480a2000, ap 79 3a.0 */
2170                         compatible = "ti,sysc";
2171                         status = "disabled";
2172                         #address-cells = <1>;
2173                         #size-cells = <1>;
2174                         ranges = <0x0 0xa2000 0x1000>;
2175                 };
2176
2177                 target-module@a4000 {                   /* 0x480a4000, ap 59 34.0 */
2178                         compatible = "ti,sysc";
2179                         status = "disabled";
2180                         #address-cells = <1>;
2181                         #size-cells = <1>;
2182                         ranges = <0x00000000 0x000a4000 0x00001000>,
2183                                  <0x00001000 0x000a5000 0x00001000>;
2184                 };
2185
2186                 des_target: target-module@a5000 {       /* 0x480a5000 */
2187                         compatible = "ti,sysc-omap2", "ti,sysc";
2188                         reg = <0xa5030 0x4>,
2189                               <0xa5034 0x4>,
2190                               <0xa5038 0x4>;
2191                         reg-names = "rev", "sysc", "syss";
2192                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2193                                          SYSC_OMAP2_AUTOIDLE)>;
2194                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2195                                         <SYSC_IDLE_NO>,
2196                                         <SYSC_IDLE_SMART>,
2197                                         <SYSC_IDLE_SMART_WKUP>;
2198                         ti,syss-mask = <1>;
2199                         /* Domains (P, C): l4per_pwrdm, l4_secure_clkdm */
2200                         clocks = <&l4_secure_clkctrl OMAP4_DES3DES_CLKCTRL 0>;
2201                         clock-names = "fck";
2202                         #address-cells = <1>;
2203                         #size-cells = <1>;
2204                         ranges = <0 0xa5000 0x00001000>;
2205
2206                         des: des@0 {
2207                                 compatible = "ti,omap4-des";
2208                                 reg = <0 0xa0>;
2209                                 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
2210                                 dmas = <&sdma 117>, <&sdma 116>;
2211                                 dma-names = "tx", "rx";
2212                         };
2213                 };
2214
2215                 target-module@a8000 {                   /* 0x480a8000, ap 61 3e.0 */
2216                         compatible = "ti,sysc";
2217                         status = "disabled";
2218                         #address-cells = <1>;
2219                         #size-cells = <1>;
2220                         ranges = <0x0 0xa8000 0x4000>;
2221                 };
2222
2223                 target-module@ad000 {                   /* 0x480ad000, ap 63 50.0 */
2224                         compatible = "ti,sysc-omap4", "ti,sysc";
2225                         reg = <0xad000 0x4>,
2226                               <0xad010 0x4>;
2227                         reg-names = "rev", "sysc";
2228                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2229                                          SYSC_OMAP4_SOFTRESET)>;
2230                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2231                                         <SYSC_IDLE_NO>,
2232                                         <SYSC_IDLE_SMART>,
2233                                         <SYSC_IDLE_SMART_WKUP>;
2234                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2235                                         <SYSC_IDLE_NO>,
2236                                         <SYSC_IDLE_SMART>,
2237                                         <SYSC_IDLE_SMART_WKUP>;
2238                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2239                         clocks = <&l4_per_clkctrl OMAP4_MMC3_CLKCTRL 0>;
2240                         clock-names = "fck";
2241                         #address-cells = <1>;
2242                         #size-cells = <1>;
2243                         ranges = <0x0 0xad000 0x1000>;
2244
2245                         mmc3: mmc@0 {
2246                                 compatible = "ti,omap4-hsmmc";
2247                                 reg = <0x0 0x400>;
2248                                 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
2249                                 ti,needs-special-reset;
2250                                 dmas = <&sdma 77>, <&sdma 78>;
2251                                 dma-names = "tx", "rx";
2252                         };
2253                 };
2254
2255                 target-module@b0000 {                   /* 0x480b0000, ap 47 40.0 */
2256                         compatible = "ti,sysc";
2257                         status = "disabled";
2258                         #address-cells = <1>;
2259                         #size-cells = <1>;
2260                         ranges = <0x0 0xb0000 0x1000>;
2261                 };
2262
2263                 target-module@b2000 {                   /* 0x480b2000, ap 65 3c.0 */
2264                         compatible = "ti,sysc-omap2", "ti,sysc";
2265                         reg = <0xb2000 0x4>,
2266                               <0xb2014 0x4>,
2267                               <0xb2018 0x4>;
2268                         reg-names = "rev", "sysc", "syss";
2269                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2270                                          SYSC_OMAP2_AUTOIDLE)>;
2271                         ti,syss-mask = <1>;
2272                         ti,no-reset-on-init;
2273                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2274                         clocks = <&l4_per_clkctrl OMAP4_HDQ1W_CLKCTRL 0>;
2275                         clock-names = "fck";
2276                         #address-cells = <1>;
2277                         #size-cells = <1>;
2278                         ranges = <0x0 0xb2000 0x1000>;
2279
2280                         hdqw1w: 1w@0 {
2281                                 compatible = "ti,omap3-1w";
2282                                 reg = <0x0 0x1000>;
2283                                 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
2284                         };
2285                 };
2286
2287                 target-module@b4000 {                   /* 0x480b4000, ap 67 46.0 */
2288                         compatible = "ti,sysc-omap4", "ti,sysc";
2289                         reg = <0xb4000 0x4>,
2290                               <0xb4010 0x4>;
2291                         reg-names = "rev", "sysc";
2292                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2293                                          SYSC_OMAP4_SOFTRESET)>;
2294                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2295                                         <SYSC_IDLE_NO>,
2296                                         <SYSC_IDLE_SMART>,
2297                                         <SYSC_IDLE_SMART_WKUP>;
2298                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2299                                         <SYSC_IDLE_NO>,
2300                                         <SYSC_IDLE_SMART>,
2301                                         <SYSC_IDLE_SMART_WKUP>;
2302                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
2303                         clocks = <&l3_init_clkctrl OMAP4_MMC2_CLKCTRL 0>;
2304                         clock-names = "fck";
2305                         #address-cells = <1>;
2306                         #size-cells = <1>;
2307                         ranges = <0x0 0xb4000 0x1000>;
2308
2309                         mmc2: mmc@0 {
2310                                 compatible = "ti,omap4-hsmmc";
2311                                 reg = <0x0 0x400>;
2312                                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
2313                                 ti,needs-special-reset;
2314                                 dmas = <&sdma 47>, <&sdma 48>;
2315                                 dma-names = "tx", "rx";
2316                         };
2317                 };
2318
2319                 target-module@b8000 {                   /* 0x480b8000, ap 69 58.0 */
2320                         compatible = "ti,sysc-omap4", "ti,sysc";
2321                         reg = <0xb8000 0x4>,
2322                               <0xb8010 0x4>;
2323                         reg-names = "rev", "sysc";
2324                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2325                                          SYSC_OMAP4_SOFTRESET)>;
2326                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2327                                         <SYSC_IDLE_NO>,
2328                                         <SYSC_IDLE_SMART>,
2329                                         <SYSC_IDLE_SMART_WKUP>;
2330                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2331                         clocks = <&l4_per_clkctrl OMAP4_MCSPI3_CLKCTRL 0>;
2332                         clock-names = "fck";
2333                         #address-cells = <1>;
2334                         #size-cells = <1>;
2335                         ranges = <0x0 0xb8000 0x1000>;
2336
2337                         mcspi3: spi@0 {
2338                                 compatible = "ti,omap4-mcspi";
2339                                 reg = <0x0 0x200>;
2340                                 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
2341                                 #address-cells = <1>;
2342                                 #size-cells = <0>;
2343                                 ti,spi-num-cs = <2>;
2344                                 dmas = <&sdma 15>, <&sdma 16>;
2345                                 dma-names = "tx0", "rx0";
2346                         };
2347                 };
2348
2349                 target-module@ba000 {                   /* 0x480ba000, ap 71 32.0 */
2350                         compatible = "ti,sysc-omap4", "ti,sysc";
2351                         reg = <0xba000 0x4>,
2352                               <0xba010 0x4>;
2353                         reg-names = "rev", "sysc";
2354                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2355                                          SYSC_OMAP4_SOFTRESET)>;
2356                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2357                                         <SYSC_IDLE_NO>,
2358                                         <SYSC_IDLE_SMART>,
2359                                         <SYSC_IDLE_SMART_WKUP>;
2360                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2361                         clocks = <&l4_per_clkctrl OMAP4_MCSPI4_CLKCTRL 0>;
2362                         clock-names = "fck";
2363                         #address-cells = <1>;
2364                         #size-cells = <1>;
2365                         ranges = <0x0 0xba000 0x1000>;
2366
2367                         mcspi4: spi@0 {
2368                                 compatible = "ti,omap4-mcspi";
2369                                 reg = <0x0 0x200>;
2370                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2371                                 #address-cells = <1>;
2372                                 #size-cells = <0>;
2373                                 ti,spi-num-cs = <1>;
2374                                 dmas = <&sdma 70>, <&sdma 71>;
2375                                 dma-names = "tx0", "rx0";
2376                         };
2377                 };
2378
2379                 target-module@d1000 {                   /* 0x480d1000, ap 73 44.0 */
2380                         compatible = "ti,sysc-omap4", "ti,sysc";
2381                         reg = <0xd1000 0x4>,
2382                               <0xd1010 0x4>;
2383                         reg-names = "rev", "sysc";
2384                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2385                                          SYSC_OMAP4_SOFTRESET)>;
2386                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2387                                         <SYSC_IDLE_NO>,
2388                                         <SYSC_IDLE_SMART>,
2389                                         <SYSC_IDLE_SMART_WKUP>;
2390                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2391                                         <SYSC_IDLE_NO>,
2392                                         <SYSC_IDLE_SMART>,
2393                                         <SYSC_IDLE_SMART_WKUP>;
2394                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2395                         clocks = <&l4_per_clkctrl OMAP4_MMC4_CLKCTRL 0>;
2396                         clock-names = "fck";
2397                         #address-cells = <1>;
2398                         #size-cells = <1>;
2399                         ranges = <0x0 0xd1000 0x1000>;
2400
2401                         mmc4: mmc@0 {
2402                                 compatible = "ti,omap4-hsmmc";
2403                                 reg = <0x0 0x400>;
2404                                 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
2405                                 ti,needs-special-reset;
2406                                 dmas = <&sdma 57>, <&sdma 58>;
2407                                 dma-names = "tx", "rx";
2408                         };
2409                 };
2410
2411                 target-module@d5000 {                   /* 0x480d5000, ap 75 4e.0 */
2412                         compatible = "ti,sysc-omap4", "ti,sysc";
2413                         reg = <0xd5000 0x4>,
2414                               <0xd5010 0x4>;
2415                         reg-names = "rev", "sysc";
2416                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2417                                          SYSC_OMAP4_SOFTRESET)>;
2418                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2419                                         <SYSC_IDLE_NO>,
2420                                         <SYSC_IDLE_SMART>,
2421                                         <SYSC_IDLE_SMART_WKUP>;
2422                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2423                                         <SYSC_IDLE_NO>,
2424                                         <SYSC_IDLE_SMART>,
2425                                         <SYSC_IDLE_SMART_WKUP>;
2426                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2427                         clocks = <&l4_per_clkctrl OMAP4_MMC5_CLKCTRL 0>;
2428                         clock-names = "fck";
2429                         #address-cells = <1>;
2430                         #size-cells = <1>;
2431                         ranges = <0x0 0xd5000 0x1000>;
2432
2433                         mmc5: mmc@0 {
2434                                 compatible = "ti,omap4-hsmmc";
2435                                 reg = <0x0 0x400>;
2436                                 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
2437                                 ti,needs-special-reset;
2438                                 dmas = <&sdma 59>, <&sdma 60>;
2439                                 dma-names = "tx", "rx";
2440                         };
2441                 };
2442         };
2443
2444         segment@200000 {                                        /* 0x48200000 */
2445                 compatible = "simple-pm-bus";
2446                 #address-cells = <1>;
2447                 #size-cells = <1>;
2448                 ranges = <0x00150000 0x00350000 0x001000>,      /* ap 77 */
2449                          <0x00151000 0x00351000 0x001000>;      /* ap 78 */
2450
2451                 target-module@150000 {                  /* 0x48350000, ap 77 4c.0 */
2452                         compatible = "ti,sysc-omap2", "ti,sysc";
2453                         reg = <0x150000 0x8>,
2454                               <0x150010 0x8>,
2455                               <0x150090 0x8>;
2456                         reg-names = "rev", "sysc", "syss";
2457                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2458                                          SYSC_OMAP2_ENAWAKEUP |
2459                                          SYSC_OMAP2_SOFTRESET |
2460                                          SYSC_OMAP2_AUTOIDLE)>;
2461                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2462                                         <SYSC_IDLE_NO>,
2463                                         <SYSC_IDLE_SMART>,
2464                                         <SYSC_IDLE_SMART_WKUP>;
2465                         ti,syss-mask = <1>;
2466                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2467                         clocks = <&l4_per_clkctrl OMAP4_I2C4_CLKCTRL 0>;
2468                         clock-names = "fck";
2469                         #address-cells = <1>;
2470                         #size-cells = <1>;
2471                         ranges = <0x0 0x150000 0x1000>;
2472
2473                         i2c4: i2c@0 {
2474                                 compatible = "ti,omap4-i2c";
2475                                 reg = <0x0 0x100>;
2476                                 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
2477                                 #address-cells = <1>;
2478                                 #size-cells = <0>;
2479                         };
2480                 };
2481         };
2482 };
2483