1 /include/ "skeleton.dtsi"
4 compatible = "nvidia,tegra30";
5 interrupt-parent = <&intc>;
8 compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";
9 reg = <0x7000e400 0x400>;
12 intc: interrupt-controller@50041000 {
13 compatible = "arm,cortex-a9-gic";
15 #interrupt-cells = <3>;
16 reg = < 0x50041000 0x1000 >,
17 < 0x50040100 0x0100 >;
21 compatible = "arm,cortex-a9-pmu";
22 interrupts = <0 144 0x04
28 apbdma: dma@6000a000 {
29 compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
30 reg = <0x6000a000 0x1400>;
31 interrupts = < 0 104 0x04
68 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
69 reg = <0x7000C000 0x100>;
70 interrupts = < 0 38 0x04 >;
76 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
77 reg = <0x7000C400 0x100>;
78 interrupts = < 0 84 0x04 >;
84 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
85 reg = <0x7000C500 0x100>;
86 interrupts = < 0 92 0x04 >;
92 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
93 reg = <0x7000c700 0x100>;
94 interrupts = < 0 120 0x04 >;
100 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
101 reg = <0x7000D000 0x100>;
102 interrupts = < 0 53 0x04 >;
105 gpio: gpio@6000d000 {
106 compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio";
107 reg = < 0x6000d000 0x1000 >;
108 interrupts = < 0 32 0x04
118 #interrupt-cells = <2>;
119 interrupt-controller;
123 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
124 reg = <0x70006000 0x40>;
126 interrupts = < 0 36 0x04 >;
130 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
131 reg = <0x70006040 0x40>;
133 interrupts = < 0 37 0x04 >;
137 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
138 reg = <0x70006200 0x100>;
140 interrupts = < 0 46 0x04 >;
144 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
145 reg = <0x70006300 0x100>;
147 interrupts = < 0 90 0x04 >;
151 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
152 reg = <0x70006400 0x100>;
154 interrupts = < 0 91 0x04 >;
158 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
159 reg = <0x78000000 0x200>;
160 interrupts = < 0 14 0x04 >;
164 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
165 reg = <0x78000200 0x200>;
166 interrupts = < 0 15 0x04 >;
170 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
171 reg = <0x78000400 0x200>;
172 interrupts = < 0 19 0x04 >;
176 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
177 reg = <0x78000600 0x200>;
178 interrupts = < 0 31 0x04 >;
181 pinmux: pinmux@70000000 {
182 compatible = "nvidia,tegra30-pinmux";
183 reg = < 0x70000868 0xd0 /* Pad control registers */
184 0x70003000 0x3e0 >; /* Mux registers */