1 /include/ "skeleton.dtsi"
4 compatible = "nvidia,tegra20";
5 interrupt-parent = <&intc>;
7 intc: interrupt-controller {
8 compatible = "arm,cortex-a9-gic";
9 reg = <0x50041000 0x1000
12 #interrupt-cells = <3>;
16 compatible = "nvidia,tegra20-apbdma";
17 reg = <0x6000a000 0x1200>;
18 interrupts = <0 104 0x04
37 compatible = "nvidia,tegra20-ahb";
38 reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */
42 compatible = "nvidia,tegra20-gpio";
43 reg = <0x6000d000 0x1000>;
44 interrupts = <0 32 0x04
53 #interrupt-cells = <2>;
58 compatible = "nvidia,tegra20-pinmux";
59 reg = <0x70000014 0x10 /* Tri-state registers */
60 0x70000080 0x20 /* Mux registers */
61 0x700000a0 0x14 /* Pull-up/down registers */
62 0x70000868 0xa8>; /* Pad control registers */
66 compatible = "nvidia,tegra20-das";
67 reg = <0x70000c00 0x80>;
70 tegra_i2s1: i2s@70002800 {
71 compatible = "nvidia,tegra20-i2s";
72 reg = <0x70002800 0x200>;
73 interrupts = <0 13 0x04>;
74 nvidia,dma-request-selector = <&apbdma 2>;
78 tegra_i2s2: i2s@70002a00 {
79 compatible = "nvidia,tegra20-i2s";
80 reg = <0x70002a00 0x200>;
81 interrupts = <0 3 0x04>;
82 nvidia,dma-request-selector = <&apbdma 1>;
87 compatible = "nvidia,tegra20-uart";
88 reg = <0x70006000 0x40>;
90 interrupts = <0 36 0x04>;
95 compatible = "nvidia,tegra20-uart";
96 reg = <0x70006040 0x40>;
98 interrupts = <0 37 0x04>;
103 compatible = "nvidia,tegra20-uart";
104 reg = <0x70006200 0x100>;
106 interrupts = <0 46 0x04>;
111 compatible = "nvidia,tegra20-uart";
112 reg = <0x70006300 0x100>;
114 interrupts = <0 90 0x04>;
119 compatible = "nvidia,tegra20-uart";
120 reg = <0x70006400 0x100>;
122 interrupts = <0 91 0x04>;
127 compatible = "nvidia,tegra20-pwm";
128 reg = <0x7000a000 0x100>;
133 compatible = "nvidia,tegra20-i2c";
134 reg = <0x7000c000 0x100>;
135 interrupts = <0 38 0x04>;
136 #address-cells = <1>;
142 compatible = "nvidia,tegra20-i2c";
143 reg = <0x7000c400 0x100>;
144 interrupts = <0 84 0x04>;
145 #address-cells = <1>;
151 compatible = "nvidia,tegra20-i2c";
152 reg = <0x7000c500 0x100>;
153 interrupts = <0 92 0x04>;
154 #address-cells = <1>;
160 compatible = "nvidia,tegra20-i2c-dvc";
161 reg = <0x7000d000 0x200>;
162 interrupts = <0 53 0x04>;
163 #address-cells = <1>;
169 compatible = "nvidia,tegra20-pmc";
170 reg = <0x7000e400 0x400>;
173 memory-controller@7000f000 {
174 compatible = "nvidia,tegra20-mc";
175 reg = <0x7000f000 0x024
177 interrupts = <0 77 0x04>;
181 compatible = "nvidia,tegra20-gart";
182 reg = <0x7000f024 0x00000018 /* controller registers */
183 0x58000000 0x02000000>; /* GART aperture */
186 memory-controller@7000f400 {
187 compatible = "nvidia,tegra20-emc";
188 reg = <0x7000f400 0x200>;
189 #address-cells = <1>;
194 compatible = "nvidia,tegra20-ehci", "usb-ehci";
195 reg = <0xc5000000 0x4000>;
196 interrupts = <0 20 0x04>;
198 nvidia,has-legacy-mode;
203 compatible = "nvidia,tegra20-ehci", "usb-ehci";
204 reg = <0xc5004000 0x4000>;
205 interrupts = <0 21 0x04>;
211 compatible = "nvidia,tegra20-ehci", "usb-ehci";
212 reg = <0xc5008000 0x4000>;
213 interrupts = <0 97 0x04>;
219 compatible = "nvidia,tegra20-sdhci";
220 reg = <0xc8000000 0x200>;
221 interrupts = <0 14 0x04>;
226 compatible = "nvidia,tegra20-sdhci";
227 reg = <0xc8000200 0x200>;
228 interrupts = <0 15 0x04>;
233 compatible = "nvidia,tegra20-sdhci";
234 reg = <0xc8000400 0x200>;
235 interrupts = <0 19 0x04>;
240 compatible = "nvidia,tegra20-sdhci";
241 reg = <0xc8000600 0x200>;
242 interrupts = <0 31 0x04>;
247 compatible = "arm,cortex-a9-pmu";
248 interrupts = <0 56 0x04