Merge branch 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab...
[platform/adaptation/renesas_rcar/renesas_kernel.git] / arch / arm / boot / dts / tegra-ventana.dts
1 /dts-v1/;
2
3 /include/ "tegra20.dtsi"
4
5 / {
6         model = "NVIDIA Tegra2 Ventana evaluation board";
7         compatible = "nvidia,ventana", "nvidia,tegra20";
8
9         memory {
10                 reg = < 0x00000000 0x40000000 >;
11         };
12
13         pinmux@70000000 {
14                 pinctrl-names = "default";
15                 pinctrl-0 = <&state_default>;
16
17                 state_default: pinmux {
18                         ata {
19                                 nvidia,pins = "ata";
20                                 nvidia,function = "ide";
21                         };
22                         atb {
23                                 nvidia,pins = "atb", "gma", "gme";
24                                 nvidia,function = "sdio4";
25                         };
26                         atc {
27                                 nvidia,pins = "atc";
28                                 nvidia,function = "nand";
29                         };
30                         atd {
31                                 nvidia,pins = "atd", "ate", "gmb", "spia",
32                                         "spib", "spic";
33                                 nvidia,function = "gmi";
34                         };
35                         cdev1 {
36                                 nvidia,pins = "cdev1";
37                                 nvidia,function = "plla_out";
38                         };
39                         cdev2 {
40                                 nvidia,pins = "cdev2";
41                                 nvidia,function = "pllp_out4";
42                         };
43                         crtp {
44                                 nvidia,pins = "crtp", "lm1";
45                                 nvidia,function = "crt";
46                         };
47                         csus {
48                                 nvidia,pins = "csus";
49                                 nvidia,function = "vi_sensor_clk";
50                         };
51                         dap1 {
52                                 nvidia,pins = "dap1";
53                                 nvidia,function = "dap1";
54                         };
55                         dap2 {
56                                 nvidia,pins = "dap2";
57                                 nvidia,function = "dap2";
58                         };
59                         dap3 {
60                                 nvidia,pins = "dap3";
61                                 nvidia,function = "dap3";
62                         };
63                         dap4 {
64                                 nvidia,pins = "dap4";
65                                 nvidia,function = "dap4";
66                         };
67                         ddc {
68                                 nvidia,pins = "ddc", "owc", "spdi", "spdo",
69                                         "uac";
70                                 nvidia,function = "rsvd2";
71                         };
72                         dta {
73                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
74                                 nvidia,function = "vi";
75                         };
76                         dtf {
77                                 nvidia,pins = "dtf";
78                                 nvidia,function = "i2c3";
79                         };
80                         gmc {
81                                 nvidia,pins = "gmc";
82                                 nvidia,function = "uartd";
83                         };
84                         gmd {
85                                 nvidia,pins = "gmd";
86                                 nvidia,function = "sflash";
87                         };
88                         gpu {
89                                 nvidia,pins = "gpu";
90                                 nvidia,function = "pwm";
91                         };
92                         gpu7 {
93                                 nvidia,pins = "gpu7";
94                                 nvidia,function = "rtck";
95                         };
96                         gpv {
97                                 nvidia,pins = "gpv", "slxa", "slxk";
98                                 nvidia,function = "pcie";
99                         };
100                         hdint {
101                                 nvidia,pins = "hdint", "pta";
102                                 nvidia,function = "hdmi";
103                         };
104                         i2cp {
105                                 nvidia,pins = "i2cp";
106                                 nvidia,function = "i2cp";
107                         };
108                         irrx {
109                                 nvidia,pins = "irrx", "irtx";
110                                 nvidia,function = "uartb";
111                         };
112                         kbca {
113                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
114                                         "kbce", "kbcf";
115                                 nvidia,function = "kbc";
116                         };
117                         lcsn {
118                                 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
119                                         "lsdi", "lvp0";
120                                 nvidia,function = "rsvd4";
121                         };
122                         ld0 {
123                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
124                                         "ld5", "ld6", "ld7", "ld8", "ld9",
125                                         "ld10", "ld11", "ld12", "ld13", "ld14",
126                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
127                                         "lhp1", "lhp2", "lhs", "lpp", "lpw0",
128                                         "lpw2", "lsc0", "lsc1", "lsck", "lsda",
129                                         "lspi", "lvp1", "lvs";
130                                 nvidia,function = "displaya";
131                         };
132                         pmc {
133                                 nvidia,pins = "pmc";
134                                 nvidia,function = "pwr_on";
135                         };
136                         rm {
137                                 nvidia,pins = "rm";
138                                 nvidia,function = "i2c1";
139                         };
140                         sdb {
141                                 nvidia,pins = "sdb", "sdc", "sdd", "slxc";
142                                 nvidia,function = "sdio3";
143                         };
144                         sdio1 {
145                                 nvidia,pins = "sdio1";
146                                 nvidia,function = "sdio1";
147                         };
148                         slxd {
149                                 nvidia,pins = "slxd";
150                                 nvidia,function = "spdif";
151                         };
152                         spid {
153                                 nvidia,pins = "spid", "spie", "spif";
154                                 nvidia,function = "spi1";
155                         };
156                         spig {
157                                 nvidia,pins = "spig", "spih";
158                                 nvidia,function = "spi2_alt";
159                         };
160                         uaa {
161                                 nvidia,pins = "uaa", "uab", "uda";
162                                 nvidia,function = "ulpi";
163                         };
164                         uad {
165                                 nvidia,pins = "uad";
166                                 nvidia,function = "irda";
167                         };
168                         uca {
169                                 nvidia,pins = "uca", "ucb";
170                                 nvidia,function = "uartc";
171                         };
172                         conf_ata {
173                                 nvidia,pins = "ata", "atb", "atc", "atd",
174                                         "cdev1", "cdev2", "dap1", "dap2",
175                                         "dap4", "ddc", "dtf", "gma", "gmc",
176                                         "gme", "gpu", "gpu7", "i2cp", "irrx",
177                                         "irtx", "pta", "rm", "sdc", "sdd",
178                                         "slxc", "slxd", "slxk", "spdi", "spdo",
179                                         "uac", "uad", "uca", "ucb", "uda";
180                                 nvidia,pull = <0>;
181                                 nvidia,tristate = <0>;
182                         };
183                         conf_ate {
184                                 nvidia,pins = "ate", "csus", "dap3", "gmd",
185                                         "gpv", "owc", "spia", "spib", "spic",
186                                         "spid", "spie", "spig";
187                                 nvidia,pull = <0>;
188                                 nvidia,tristate = <1>;
189                         };
190                         conf_ck32 {
191                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
192                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
193                                 nvidia,pull = <0>;
194                         };
195                         conf_crtp {
196                                 nvidia,pins = "crtp", "gmb", "slxa", "spih";
197                                 nvidia,pull = <2>;
198                                 nvidia,tristate = <1>;
199                         };
200                         conf_dta {
201                                 nvidia,pins = "dta", "dtb", "dtc", "dtd";
202                                 nvidia,pull = <1>;
203                                 nvidia,tristate = <0>;
204                         };
205                         conf_dte {
206                                 nvidia,pins = "dte", "spif";
207                                 nvidia,pull = <1>;
208                                 nvidia,tristate = <1>;
209                         };
210                         conf_hdint {
211                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
212                                         "lpw1", "lsck", "lsda", "lsdi", "lvp0";
213                                 nvidia,tristate = <1>;
214                         };
215                         conf_kbca {
216                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
217                                         "kbce", "kbcf", "sdio1", "uaa", "uab";
218                                 nvidia,pull = <2>;
219                                 nvidia,tristate = <0>;
220                         };
221                         conf_lc {
222                                 nvidia,pins = "lc", "ls";
223                                 nvidia,pull = <2>;
224                         };
225                         conf_ld0 {
226                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
227                                         "ld5", "ld6", "ld7", "ld8", "ld9",
228                                         "ld10", "ld11", "ld12", "ld13", "ld14",
229                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
230                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
231                                         "lpw0", "lpw2", "lsc0", "lsc1", "lspi",
232                                         "lvp1", "lvs", "pmc", "sdb";
233                                 nvidia,tristate = <0>;
234                         };
235                         conf_ld17_0 {
236                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
237                                         "ld23_22";
238                                 nvidia,pull = <1>;
239                         };
240                 };
241         };
242
243         i2c@7000c000 {
244                 clock-frequency = <400000>;
245
246                 wm8903: wm8903@1a {
247                         compatible = "wlf,wm8903";
248                         reg = <0x1a>;
249                         interrupt-parent = <&gpio>;
250                         interrupts = < 187 0x04 >;
251
252                         gpio-controller;
253                         #gpio-cells = <2>;
254
255                         micdet-cfg = <0>;
256                         micdet-delay = <100>;
257                         gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >;
258                 };
259         };
260
261         i2c@7000c400 {
262                 clock-frequency = <400000>;
263         };
264
265         i2c@7000c500 {
266                 clock-frequency = <400000>;
267         };
268
269         i2c@7000d000 {
270                 clock-frequency = <400000>;
271         };
272
273         i2s@70002a00 {
274                 status = "disable";
275         };
276
277         sound {
278                 compatible = "nvidia,tegra-audio-wm8903-ventana",
279                              "nvidia,tegra-audio-wm8903";
280                 nvidia,model = "NVIDIA Tegra Ventana";
281
282                 nvidia,audio-routing =
283                         "Headphone Jack", "HPOUTR",
284                         "Headphone Jack", "HPOUTL",
285                         "Int Spk", "ROP",
286                         "Int Spk", "RON",
287                         "Int Spk", "LOP",
288                         "Int Spk", "LON",
289                         "Mic Jack", "MICBIAS",
290                         "IN1L", "Mic Jack";
291
292                 nvidia,i2s-controller = <&tegra_i2s1>;
293                 nvidia,audio-codec = <&wm8903>;
294
295                 nvidia,spkr-en-gpios = <&wm8903 2 0>;
296                 nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
297                 nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
298                 nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
299         };
300
301         serial@70006000 {
302                 status = "disable";
303         };
304
305         serial@70006040 {
306                 status = "disable";
307         };
308
309         serial@70006200 {
310                 status = "disable";
311         };
312
313         serial@70006300 {
314                 clock-frequency = < 216000000 >;
315         };
316
317         serial@70006400 {
318                 status = "disable";
319         };
320
321         sdhci@c8000000 {
322                 status = "disable";
323         };
324
325         sdhci@c8000200 {
326                 status = "disable";
327         };
328
329         sdhci@c8000400 {
330                 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
331                 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
332                 power-gpios = <&gpio 70 0>; /* gpio PI6 */
333         };
334
335         sdhci@c8000600 {
336                 support-8bit;
337         };
338 };