1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) Protonic Holland
4 * Author: David Jander <david@protonic.nl>
8 #include "stm32mp151.dtsi"
9 #include "stm32mp15-pinctrl.dtsi"
10 #include "stm32mp15xxad-pinctrl.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/leds/common.h>
17 ethernet0 = ðernet0;
23 compatible = "gpio-leds";
26 color = <LED_COLOR_ID_RED>;
27 function = LED_FUNCTION_INDICATOR;
28 gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
32 color = <LED_COLOR_ID_GREEN>;
33 function = LED_FUNCTION_INDICATOR;
34 gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
35 linux,default-trigger = "heartbeat";
40 /* DP83TD510E PHYs have max MDC rate of 1.75MHz. Since we can't reduce
41 * stmmac MDC clock without reducing system bus rate, we need to use
42 * gpio based MDIO bus.
45 compatible = "virtual,mdio-gpio";
48 gpios = <&gpioc 1 GPIO_ACTIVE_HIGH
49 &gpioa 2 GPIO_ACTIVE_HIGH>;
52 reg_3v3: regulator-3v3 {
53 compatible = "regulator-fixed";
54 regulator-name = "3v3";
55 regulator-min-microvolt = <3300000>;
56 regulator-max-microvolt = <3300000>;
65 pinctrl-0 = <ðernet0_rmii_pins_a>;
66 pinctrl-1 = <ðernet0_rmii_sleep_pins_a>;
67 pinctrl-names = "default", "sleep";
72 ðernet0_rmii_pins_a {
74 pinmux = <STM32_PINMUX('B', 12, AF11)>, /* ETH1_RMII_TXD0 */
75 <STM32_PINMUX('B', 13, AF11)>, /* ETH1_RMII_TXD1 */
76 <STM32_PINMUX('B', 11, AF11)>; /* ETH1_RMII_TX_EN */
79 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
80 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
81 <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK input */
82 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
86 ðernet0_rmii_sleep_pins_a {
88 pinmux = <STM32_PINMUX('B', 12, ANALOG)>, /* ETH1_RMII_TXD0 */
89 <STM32_PINMUX('B', 13, ANALOG)>, /* ETH1_RMII_TXD1 */
90 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
91 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */
92 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
93 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
94 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
103 pinctrl-names = "default", "sleep";
104 pinctrl-0 = <&qspi_clk_pins_a
107 pinctrl-1 = <&qspi_clk_sleep_pins_a
108 &qspi_bk1_sleep_pins_a
109 &qspi_cs1_sleep_pins_a>;
110 reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
111 #address-cells = <1>;
116 compatible = "spi-nand";
118 spi-rx-bus-width = <4>;
119 spi-max-frequency = <104000000>;
120 #address-cells = <1>;
138 pinctrl-names = "default", "opendrain", "sleep";
139 pinctrl-0 = <&sdmmc1_b4_pins_a>;
140 pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
141 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
145 vmmc-supply = <®_3v3>;
146 vqmmc-supply = <®_3v3>;
150 &sdmmc1_b4_od_pins_a {
169 pinctrl-names = "default", "sleep", "idle";
170 pinctrl-0 = <&uart4_pins_a>;
171 pinctrl-1 = <&uart4_sleep_pins_a>;
172 pinctrl-2 = <&uart4_idle_pins_a>;
173 /delete-property/dmas;
174 /delete-property/dma-names;
180 pinmux = <STM32_PINMUX('B', 9, ANALOG)>; /* UART4_TX */
183 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
190 pinmux = <STM32_PINMUX('B', 9, AF8)>; /* UART4_TX */
196 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
201 &uart4_sleep_pins_a {
203 pinmux = <STM32_PINMUX('B', 9, ANALOG)>, /* UART4_TX */
204 <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
209 phys = <&usbphyc_port0>;
216 pinctrl-0 = <&usbotg_hs_pins_a>;
217 pinctrl-names = "default";
218 phys = <&usbphyc_port1 0>;
219 phy-names = "usb2-phy";
228 phy-supply = <®_3v3>;
232 phy-supply = <®_3v3>;