3 * Copyright (C) 2013 STMicroelectronics Limited.
4 * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * publishhed by the Free Software Foundation.
10 #include "st-pincfg.h"
50 compatible = "st,stih416-sbc-pinctrl";
51 st,syscfg = <&syscfg_sbc>;
52 ranges = <0 0xfe610000 0x6000>;
58 st,bank-name = "PIO0";
64 st,bank-name = "PIO1";
70 st,bank-name = "PIO2";
76 st,bank-name = "PIO3";
82 st,bank-name = "PIO4";
84 PIO40: gpio@fe615000 {
88 st,bank-name = "PIO40";
89 st,retime-pin-mask = <0x7f>;
93 pinctrl_sbc_serial1: sbc_serial1 {
95 tx = <&PIO2 6 ALT3 OUT>;
96 rx = <&PIO2 7 ALT3 IN>;
102 pin-controller-front {
103 #address-cells = <1>;
105 compatible = "st,stih416-front-pinctrl";
106 st,syscfg = <&syscfg_front>;
107 ranges = <0 0xfee00000 0x10000>;
109 PIO5: gpio@fee00000 {
113 st,bank-name = "PIO5";
115 PIO6: gpio@fee01000 {
118 reg = <0x1000 0x100>;
119 st,bank-name = "PIO6";
121 PIO7: gpio@fee02000 {
124 reg = <0x2000 0x100>;
125 st,bank-name = "PIO7";
127 PIO8: gpio@fee03000 {
130 reg = <0x3000 0x100>;
131 st,bank-name = "PIO8";
133 PIO9: gpio@fee04000 {
136 reg = <0x4000 0x100>;
137 st,bank-name = "PIO9";
139 PIO10: gpio@fee05000 {
142 reg = <0x5000 0x100>;
143 st,bank-name = "PIO10";
145 PIO11: gpio@fee06000 {
148 reg = <0x6000 0x100>;
149 st,bank-name = "PIO11";
151 PIO12: gpio@fee07000 {
154 reg = <0x7000 0x100>;
155 st,bank-name = "PIO12";
157 PIO30: gpio@fee08000 {
160 reg = <0x8000 0x100>;
161 st,bank-name = "PIO30";
163 PIO31: gpio@fee09000 {
166 reg = <0x9000 0x100>;
167 st,bank-name = "PIO31";
171 pin-controller-rear {
172 #address-cells = <1>;
174 compatible = "st,stih416-rear-pinctrl";
175 st,syscfg = <&syscfg_rear>;
176 ranges = <0 0xfe820000 0x6000>;
178 PIO13: gpio@fe820000 {
182 st,bank-name = "PIO13";
184 PIO14: gpio@fe821000 {
187 reg = <0x1000 0x100>;
188 st,bank-name = "PIO14";
190 PIO15: gpio@fe822000 {
193 reg = <0x2000 0x100>;
194 st,bank-name = "PIO15";
196 PIO16: gpio@fe823000 {
199 reg = <0x3000 0x100>;
200 st,bank-name = "PIO16";
202 PIO17: gpio@fe824000 {
205 reg = <0x4000 0x100>;
206 st,bank-name = "PIO17";
208 PIO18: gpio@fe825000 {
211 reg = <0x5000 0x100>;
212 st,bank-name = "PIO18";
213 st,retime-pin-mask = <0xf>;
217 pinctrl_serial2: serial2-0 {
219 tx = <&PIO17 4 ALT2 OUT>;
220 rx = <&PIO17 5 ALT2 IN>;
221 output-enable = <&PIO11 3 ALT2 OUT>;
227 pin-controller-fvdp-fe {
228 #address-cells = <1>;
230 compatible = "st,stih416-fvdp-fe-pinctrl";
231 st,syscfg = <&syscfg_fvdp_fe>;
232 ranges = <0 0xfd6b0000 0x3000>;
234 PIO100: gpio@fd6b0000 {
238 st,bank-name = "PIO100";
240 PIO101: gpio@fd6b1000 {
243 reg = <0x1000 0x100>;
244 st,bank-name = "PIO101";
246 PIO102: gpio@fd6b2000 {
249 reg = <0x2000 0x100>;
250 st,bank-name = "PIO102";
254 pin-controller-fvdp-lite {
255 #address-cells = <1>;
257 compatible = "st,stih416-fvdp-lite-pinctrl";
258 st,syscfg = <&syscfg_fvdp_lite>;
259 ranges = <0 0xfd330000 0x5000>;
261 PIO103: gpio@fd330000 {
265 st,bank-name = "PIO103";
267 PIO104: gpio@fd331000 {
270 reg = <0x1000 0x100>;
271 st,bank-name = "PIO104";
273 PIO105: gpio@fd332000 {
276 reg = <0x2000 0x100>;
277 st,bank-name = "PIO105";
279 PIO106: gpio@fd333000 {
282 reg = <0x3000 0x100>;
283 st,bank-name = "PIO106";
286 PIO107: gpio@fd334000 {
289 reg = <0x4000 0x100>;
290 st,bank-name = "PIO107";
291 st,retime-pin-mask = <0xf>;