arch/arm/boot/dts/ste-hrefprev60.dtsi

   1 /*
   2  * Copyright 2012 ST-Ericsson AB
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  *
  11  * Device Tree for the HREF+ prior to the v60 variant.
  12  */
  13
  14 #include "ste-dbx5x0.dtsi"
  15 #include "ste-href.dtsi"
  16
  17 / {
  18         gpio_keys {
  19                 button@1 {
  20                         gpios = <&tc3589x_gpio 7 0x4>;
  21                 };
  22         };
  23
  24         soc {
  25                 i2c@80004000 {
  26                         tps61052@33 {
  27                                 compatible = "tps61052";
  28                                 reg = <0x33>;
  29                         };
  30
  31                         tc35892@42 {
  32                                 compatible = "toshiba,tc35892";
  33                                 reg = <0x42>;
  34                                 interrupt-parent = <&gpio6>;
  35                                 interrupts = <25 IRQ_TYPE_EDGE_RISING>;
  36                                 pinctrl-names = "default";
  37                                 pinctrl-0 = <&tc35892_hrefprev60_mode>;
  38
  39                                 interrupt-controller;
  40                                 #interrupt-cells = <1>;
  41
  42                                 tc3589x_gpio: tc3589x_gpio {
  43                                         compatible = "tc3589x-gpio";
  44                                         interrupts = <0>;
  45
  46                                         interrupt-controller;
  47                                         #interrupt-cells = <2>;
  48                                         gpio-controller;
  49                                         #gpio-cells = <2>;
  50                                 };
  51                         };
  52                 };
  53
  54                 ssp@80002000 {
  55                         /*
  56                          * On the first generation boards, this SSP/SPI port was connected
  57                          * to the AB8500.
  58                          */
  59                         pinctrl-names = "default";
  60                         pinctrl-0 = <&ssp0_hrefprev60_mode>;
  61                 };
  62
  63                 vmmci: regulator-gpio {
  64                         gpios = <&tc3589x_gpio 18 0x4>;
  65                         enable-gpio = <&tc3589x_gpio 17 0x4>;
  66
  67                         status = "okay";
  68                 };
  69
  70                 pinctrl {
  71                         /* Set this up using hogs */
  72                         pinctrl-names = "default";
  73                         pinctrl-0 = <&ipgpio_hrefprev60_mode>;
  74
  75                         ssp0 {
  76                                 ssp0_hrefprev60_mode: ssp0_hrefprev60_default {
  77                                         hrefprev60_mux {
  78                                                 ste,function = "ssp0";
  79                                                 ste,pins = "ssp0_a_1";
  80                                         };
  81                                         hrefprev60_cfg1 {
  82                                                 ste,pins = "GPIO145_C13"; /* RXD */
  83                                                 ste,config = <&in_pd>;
  84                                         };
  85
  86                                 };
  87                         };
  88                         sdi0 {
  89                                 /* This additional pin needed on early MOP500 and HREFs previous to v60 */
  90                                 sdi0_default_mode: sdi0_default {
  91                                         hrefprev60_mux {
  92                                                 ste,function = "mc0";
  93                                                 ste,pins = "mc0dat31dir_a_1";
  94                                         };
  95                                         hrefprev60_cfg1 {
  96                                                 ste,pins = "GPIO21_AB3"; /* DAT31DIR */
  97                                                 ste,config = <&out_hi>;
  98                                         };
  99
 100                                 };
 101                         };
 102                         tc35892 {
 103                                 tc35892_hrefprev60_mode: tc35892_hrefprev60 {
 104                                         hrefprev60_cfg {
 105                                                 ste,pins = "GPIO217_AH12";
 106                                                 ste,config = <&gpio_in_pu>;
 107                                         };
 108                                 };
 109                         };
 110                         ipgpio {
 111                                  ipgpio_hrefprev60_mode: ipgpio_hrefprev60 {
 112                                         hrefprev60_mux {
 113                                                 ste,function = "ipgpio";
 114                                                 ste,pins = "ipgpio0_c_1", "ipgpio1_c_1";
 115                                         };
 116                                         hrefprev60_cfg1 {
 117                                                 ste,pins = "GPIO6_AF6", "GPIO7_AG5";
 118                                                 ste,config = <&in_pu>;
 119                                         };
 120                                  };
 121                         };
 122                 };
 123         };
 124 };