arch/arm/boot/dts/sama7g5.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  *  sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC
   4  *
   5  *  Copyright (C) 2020 Microchip Technology, Inc. and its subsidiaries
   6  *
   7  *  Author: Eugen Hristev <eugen.hristev@microchip.com>
   8  *  Author: Claudiu Beznea <claudiu.beznea@microchip.com>
   9  *
  10  */
  11
  12 #include <dt-bindings/interrupt-controller/irq.h>
  13 #include <dt-bindings/interrupt-controller/arm-gic.h>
  14 #include <dt-bindings/clock/at91.h>
  15 #include <dt-bindings/dma/at91.h>
  16 #include <dt-bindings/gpio/gpio.h>
  17
  18 / {
  19         model = "Microchip SAMA7G5 family SoC";
  20         compatible = "microchip,sama7g5";
  21         #address-cells = <1>;
  22         #size-cells = <1>;
  23         interrupt-parent = <&gic>;
  24
  25         cpus {
  26                 #address-cells = <1>;
  27                 #size-cells = <0>;
  28
  29                 cpu0: cpu@0 {
  30                         device_type = "cpu";
  31                         compatible = "arm,cortex-a7";
  32                         reg = <0x0>;
  33                 };
  34         };
  35
  36         clocks {
  37                 slow_xtal: slow_xtal {
  38                         compatible = "fixed-clock";
  39                         #clock-cells = <0>;
  40                 };
  41
  42                 main_xtal: main_xtal {
  43                         compatible = "fixed-clock";
  44                         #clock-cells = <0>;
  45                 };
  46
  47                 usb_clk: usb_clk {
  48                         compatible = "fixed-clock";
  49                         #clock-cells = <0>;
  50                         clock-frequency = <48000000>;
  51                 };
  52         };
  53
  54         vddout25: fixed-regulator-vddout25 {
  55                 compatible = "regulator-fixed";
  56
  57                 regulator-name = "VDDOUT25";
  58                 regulator-min-microvolt = <2500000>;
  59                 regulator-max-microvolt = <2500000>;
  60                 regulator-boot-on;
  61                 status = "disabled";
  62         };
  63
  64         ns_sram: sram@100000 {
  65                 compatible = "mmio-sram";
  66                 #address-cells = <1>;
  67                 #size-cells = <1>;
  68                 reg = <0x100000 0x20000>;
  69                 ranges;
  70         };
  71
  72         soc {
  73                 compatible = "simple-bus";
  74                 #address-cells = <1>;
  75                 #size-cells = <1>;
  76                 ranges;
  77
  78                 securam: securam@e0000000 {
  79                         compatible = "microchip,sama7g5-securam", "atmel,sama5d2-securam", "mmio-sram";
  80                         reg = <0xe0000000 0x4000>;
  81                         clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
  82                         #address-cells = <1>;
  83                         #size-cells = <1>;
  84                         ranges = <0 0xe0000000 0x4000>;
  85                         no-memory-wc;
  86                         status = "okay";
  87                 };
  88
  89                 secumod: secumod@e0004000 {
  90                         compatible = "microchip,sama7g5-secumod", "atmel,sama5d2-secumod", "syscon";
  91                         reg = <0xe0004000 0x4000>;
  92                         gpio-controller;
  93                         #gpio-cells = <2>;
  94                 };
  95
  96                 sfrbu: sfr@e0008000 {
  97                         compatible = "microchip,sama7g5-sfrbu", "atmel,sama5d2-sfrbu", "syscon";
  98                         reg = <0xe0008000 0x20>;
  99                 };
 100
 101                 pioA: pinctrl@e0014000 {
 102                         compatible = "microchip,sama7g5-pinctrl";
 103                         reg = <0xe0014000 0x800>;
 104                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
 105                                 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 106                                 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 107                                 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 108                                 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 109                         interrupt-controller;
 110                         #interrupt-cells = <2>;
 111                         gpio-controller;
 112                         #gpio-cells = <2>;
 113                         clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
 114                 };
 115
 116                 pmc: pmc@e0018000 {
 117                         compatible = "microchip,sama7g5-pmc", "syscon";
 118                         reg = <0xe0018000 0x200>;
 119                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 120                         #clock-cells = <2>;
 121                         clocks = <&clk32k 1>, <&clk32k 0>, <&main_xtal>;
 122                         clock-names = "td_slck", "md_slck", "main_xtal";
 123                 };
 124
 125                 shdwc: shdwc@e001d010 {
 126                         compatible = "microchip,sama7g5-shdwc", "syscon";
 127                         reg = <0xe001d010 0x10>;
 128                         clocks = <&clk32k 0>;
 129                         #address-cells = <1>;
 130                         #size-cells = <0>;
 131                         atmel,wakeup-rtc-timer;
 132                         atmel,wakeup-rtt-timer;
 133                         status = "disabled";
 134                 };
 135
 136                 rtt: rtt@e001d020 {
 137                         compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
 138                         reg = <0xe001d020 0x30>;
 139                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 140                         clocks = <&clk32k 0>;
 141                 };
 142
 143                 clk32k: clock-controller@e001d050 {
 144                         compatible = "microchip,sama7g5-sckc", "microchip,sam9x60-sckc";
 145                         reg = <0xe001d050 0x4>;
 146                         clocks = <&slow_xtal>;
 147                         #clock-cells = <1>;
 148                 };
 149
 150                 gpbr: gpbr@e001d060 {
 151                         compatible = "microchip,sama7g5-gpbr", "syscon";
 152                         reg = <0xe001d060 0x48>;
 153                 };
 154
 155                 rtc: rtc@e001d0a8 {
 156                         compatible = "microchip,sama7g5-rtc", "microchip,sam9x60-rtc";
 157                         reg = <0xe001d0a8 0x30>;
 158                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 159                         clocks = <&clk32k 1>;
 160                 };
 161
 162                 ps_wdt: watchdog@e001d180 {
 163                         compatible = "microchip,sama7g5-wdt";
 164                         reg = <0xe001d180 0x24>;
 165                         interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 166                         clocks = <&clk32k 0>;
 167                 };
 168
 169                 chipid@e0020000 {
 170                         compatible = "microchip,sama7g5-chipid";
 171                         reg = <0xe0020000 0x8>;
 172                 };
 173
 174                 tcb1: timer@e0800000 {
 175                         compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
 176                         #address-cells = <1>;
 177                         #size-cells = <0>;
 178                         reg = <0xe0800000 0x100>;
 179                         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 180                         clocks = <&pmc PMC_TYPE_PERIPHERAL 91>, <&pmc PMC_TYPE_PERIPHERAL 92>, <&pmc PMC_TYPE_PERIPHERAL 93>, <&clk32k 1>;
 181                         clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
 182                 };
 183
 184                 adc: adc@e1000000 {
 185                         compatible = "microchip,sama7g5-adc";
 186                         reg = <0xe1000000 0x200>;
 187                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 188                         clocks = <&pmc PMC_TYPE_GCK 26>;
 189                         assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
 190                         assigned-clock-rates = <100000000>;
 191                         clock-names = "adc_clk";
 192                         dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>;
 193                         dma-names = "rx";
 194                         atmel,min-sample-rate-hz = <200000>;
 195                         atmel,max-sample-rate-hz = <20000000>;
 196                         atmel,startup-time-ms = <4>;
 197                         status = "disabled";
 198                 };
 199
 200                 sdmmc0: mmc@e1204000 {
 201                         compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
 202                         reg = <0xe1204000 0x4000>;
 203                         interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 204                         clocks = <&pmc PMC_TYPE_PERIPHERAL 80>, <&pmc PMC_TYPE_GCK 80>;
 205                         clock-names = "hclock", "multclk";
 206                         assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
 207                         assigned-clocks = <&pmc PMC_TYPE_GCK 80>;
 208                         assigned-clock-rates = <200000000>;
 209                         microchip,sdcal-inverted;
 210                         status = "disabled";
 211                 };
 212
 213                 sdmmc1: mmc@e1208000 {
 214                         compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
 215                         reg = <0xe1208000 0x4000>;
 216                         interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 217                         clocks = <&pmc PMC_TYPE_PERIPHERAL 81>, <&pmc PMC_TYPE_GCK 81>;
 218                         clock-names = "hclock", "multclk";
 219                         assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
 220                         assigned-clocks = <&pmc PMC_TYPE_GCK 81>;
 221                         assigned-clock-rates = <200000000>;
 222                         microchip,sdcal-inverted;
 223                         status = "disabled";
 224                 };
 225
 226                 sdmmc2: mmc@e120c000 {
 227                         compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
 228                         reg = <0xe120c000 0x4000>;
 229                         interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 230                         clocks = <&pmc PMC_TYPE_PERIPHERAL 82>, <&pmc PMC_TYPE_GCK 82>;
 231                         clock-names = "hclock", "multclk";
 232                         assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
 233                         assigned-clocks = <&pmc PMC_TYPE_GCK 82>;
 234                         assigned-clock-rates = <200000000>;
 235                         microchip,sdcal-inverted;
 236                         status = "disabled";
 237                 };
 238
 239                 pwm: pwm@e1604000 {
 240                         compatible = "microchip,sama7g5-pwm", "atmel,sama5d2-pwm";
 241                         reg = <0xe1604000 0x4000>;
 242                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 243                         #pwm-cells = <3>;
 244                         clocks = <&pmc PMC_TYPE_PERIPHERAL 77>;
 245                         status = "disabled";
 246                 };
 247
 248                 spdifrx: spdifrx@e1614000 {
 249                         #sound-dai-cells = <0>;
 250                         compatible = "microchip,sama7g5-spdifrx";
 251                         reg = <0xe1614000 0x4000>;
 252                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 253                         dmas = <&dma0 AT91_XDMAC_DT_PERID(49)>;
 254                         dma-names = "rx";
 255                         clocks = <&pmc PMC_TYPE_PERIPHERAL 84>, <&pmc PMC_TYPE_GCK 84>;
 256                         clock-names = "pclk", "gclk";
 257                         status = "disabled";
 258                 };
 259
 260                 spdiftx: spdiftx@e1618000 {
 261                         #sound-dai-cells = <0>;
 262                         compatible = "microchip,sama7g5-spdiftx";
 263                         reg = <0xe1618000 0x4000>;
 264                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 265                         dmas = <&dma0 AT91_XDMAC_DT_PERID(50)>;
 266                         dma-names = "tx";
 267                         clocks = <&pmc PMC_TYPE_PERIPHERAL 85>, <&pmc PMC_TYPE_GCK 85>;
 268                         clock-names = "pclk", "gclk";
 269                 };
 270
 271                 i2s0: i2s@e161c000 {
 272                         compatible = "microchip,sama7g5-i2smcc";
 273                         #sound-dai-cells = <0>;
 274                         reg = <0xe161c000 0x4000>;
 275                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 276                         dmas = <&dma0 AT91_XDMAC_DT_PERID(34)>, <&dma0 AT91_XDMAC_DT_PERID(33)>;
 277                         dma-names = "tx", "rx";
 278                         clocks = <&pmc PMC_TYPE_PERIPHERAL 57>, <&pmc PMC_TYPE_GCK 57>;
 279                         clock-names = "pclk", "gclk";
 280                         status = "disabled";
 281                 };
 282
 283                 i2s1: i2s@e1620000 {
 284                         compatible = "microchip,sama7g5-i2smcc";
 285                         #sound-dai-cells = <0>;
 286                         reg = <0xe1620000 0x4000>;
 287                         interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
 288                         dmas = <&dma0 AT91_XDMAC_DT_PERID(36)>, <&dma0 AT91_XDMAC_DT_PERID(35)>;
 289                         dma-names = "tx", "rx";
 290                         clocks = <&pmc PMC_TYPE_PERIPHERAL 58>, <&pmc PMC_TYPE_GCK 58>;
 291                         clock-names = "pclk", "gclk";
 292                         status = "disabled";
 293                 };
 294
 295                 pit64b0: timer@e1800000 {
 296                         compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b";
 297                         reg = <0xe1800000 0x4000>;
 298                         interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 299                         clocks = <&pmc PMC_TYPE_PERIPHERAL 70>, <&pmc PMC_TYPE_GCK 70>;
 300                         clock-names = "pclk", "gclk";
 301                 };
 302
 303                 pit64b1: timer@e1804000 {
 304                         compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b";
 305                         reg = <0xe1804000 0x4000>;
 306                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 307                         clocks = <&pmc PMC_TYPE_PERIPHERAL 71>, <&pmc PMC_TYPE_GCK 71>;
 308                         clock-names = "pclk", "gclk";
 309                 };
 310
 311                 flx0: flexcom@e1818000 {
 312                         compatible = "atmel,sama5d2-flexcom";
 313                         reg = <0xe1818000 0x200>;
 314                         clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
 315                         #address-cells = <1>;
 316                         #size-cells = <1>;
 317                         ranges = <0x0 0xe1818000 0x800>;
 318                         status = "disabled";
 319
 320                         uart0: serial@200 {
 321                                 compatible = "atmel,at91sam9260-usart";
 322                                 reg = <0x200 0x200>;
 323                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
 324                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
 325                                 clock-names = "usart";
 326                                 dmas = <&dma1 AT91_XDMAC_DT_PERID(6)>,
 327                                         <&dma1 AT91_XDMAC_DT_PERID(5)>;
 328                                 dma-names = "tx", "rx";
 329                                 atmel,use-dma-rx;
 330                                 atmel,use-dma-tx;
 331                                 status = "disabled";
 332                         };
 333                 };
 334
 335                 flx1: flexcom@e181c000 {
 336                         compatible = "atmel,sama5d2-flexcom";
 337                         reg = <0xe181c000 0x200>;
 338                         clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
 339                         #address-cells = <1>;
 340                         #size-cells = <1>;
 341                         ranges = <0x0 0xe181c000 0x800>;
 342                         status = "disabled";
 343
 344                         i2c1: i2c@600 {
 345                                 compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
 346                                 reg = <0x600 0x200>;
 347                                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
 348                                 #address-cells = <1>;
 349                                 #size-cells = <0>;
 350                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
 351                                 atmel,fifo-size = <32>;
 352                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
 353                                         <&dma0 AT91_XDMAC_DT_PERID(8)>;
 354                                 dma-names = "rx", "tx";
 355                                 atmel,use-dma-rx;
 356                                 atmel,use-dma-tx;
 357                                 status = "disabled";
 358                         };
 359                 };
 360
 361                 flx3: flexcom@e1824000 {
 362                         compatible = "atmel,sama5d2-flexcom";
 363                         reg = <0xe1824000 0x200>;
 364                         clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
 365                         #address-cells = <1>;
 366                         #size-cells = <1>;
 367                         ranges = <0x0 0xe1824000 0x800>;
 368                         status = "disabled";
 369
 370                         uart3: serial@200 {
 371                                 compatible = "atmel,at91sam9260-usart";
 372                                 reg = <0x200 0x200>;
 373                                 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 374                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
 375                                 clock-names = "usart";
 376                                 dmas = <&dma1 AT91_XDMAC_DT_PERID(12)>,
 377                                         <&dma1 AT91_XDMAC_DT_PERID(11)>;
 378                                 dma-names = "tx", "rx";
 379                                 atmel,use-dma-rx;
 380                                 atmel,use-dma-tx;
 381                                 status = "disabled";
 382                         };
 383                 };
 384
 385                 trng: rng@e2010000 {
 386                         compatible = "microchip,sama7g5-trng", "atmel,at91sam9g45-trng";
 387                         reg = <0xe2010000 0x100>;
 388                         interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
 389                         clocks = <&pmc PMC_TYPE_PERIPHERAL 97>;
 390                         status = "disabled";
 391                 };
 392
 393                 flx4: flexcom@e2018000 {
 394                         compatible = "atmel,sama5d2-flexcom";
 395                         reg = <0xe2018000 0x200>;
 396                         clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
 397                         #address-cells = <1>;
 398                         #size-cells = <1>;
 399                         ranges = <0x0 0xe2018000 0x800>;
 400                         status = "disabled";
 401
 402                         uart4: serial@200 {
 403                                 compatible = "atmel,at91sam9260-usart";
 404                                 reg = <0x200 0x200>;
 405                                 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 406                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
 407                                 clock-names = "usart";
 408                                 dmas = <&dma1 AT91_XDMAC_DT_PERID(14)>,
 409                                         <&dma1 AT91_XDMAC_DT_PERID(13)>;
 410                                 dma-names = "tx", "rx";
 411                                 atmel,use-dma-rx;
 412                                 atmel,use-dma-tx;
 413                                 atmel,fifo-size = <16>;
 414                                 status = "disabled";
 415                         };
 416                 };
 417
 418                 flx7: flexcom@e2024000 {
 419                         compatible = "atmel,sama5d2-flexcom";
 420                         reg = <0xe2024000 0x200>;
 421                         clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
 422                         #address-cells = <1>;
 423                         #size-cells = <1>;
 424                         ranges = <0x0 0xe2024000 0x800>;
 425                         status = "disabled";
 426
 427                         uart7: serial@200 {
 428                                 compatible = "atmel,at91sam9260-usart";
 429                                 reg = <0x200 0x200>;
 430                                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 431                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
 432                                 clock-names = "usart";
 433                                 dmas = <&dma1 AT91_XDMAC_DT_PERID(20)>,
 434                                         <&dma1 AT91_XDMAC_DT_PERID(19)>;
 435                                 dma-names = "tx", "rx";
 436                                 atmel,use-dma-rx;
 437                                 atmel,use-dma-tx;
 438                                 atmel,fifo-size = <16>;
 439                                 status = "disabled";
 440                         };
 441                 };
 442
 443                 gmac0: ethernet@e2800000 {
 444                         compatible = "microchip,sama7g5-gem";
 445                         reg = <0xe2800000 0x1000>;
 446                         interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH
 447                                       GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH
 448                                       GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH
 449                                       GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH
 450                                       GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH
 451                                       GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 452                         clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_GCK 51>, <&pmc PMC_TYPE_GCK 53>;
 453                         clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";
 454                         assigned-clocks = <&pmc PMC_TYPE_GCK 51>;
 455                         assigned-clock-rates = <125000000>;
 456                         status = "disabled";
 457                 };
 458
 459                 gmac1: ethernet@e2804000 {
 460                         compatible = "microchip,sama7g5-emac";
 461                         reg = <0xe2804000 0x1000>;
 462                         interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH
 463                                       GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 464                         clocks = <&pmc PMC_TYPE_PERIPHERAL 52>, <&pmc PMC_TYPE_PERIPHERAL 52>;
 465                         clock-names = "pclk", "hclk";
 466                         status = "disabled";
 467                 };
 468
 469                 dma0: dma-controller@e2808000 {
 470                         compatible = "microchip,sama7g5-dma";
 471                         reg = <0xe2808000 0x1000>;
 472                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 473                         #dma-cells = <1>;
 474                         clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
 475                         clock-names = "dma_clk";
 476                         status = "disabled";
 477                 };
 478
 479                 dma1: dma-controller@e280c000 {
 480                         compatible = "microchip,sama7g5-dma";
 481                         reg = <0xe280c000 0x1000>;
 482                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 483                         #dma-cells = <1>;
 484                         clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
 485                         clock-names = "dma_clk";
 486                         status = "disabled";
 487                 };
 488
 489                 /* Place dma2 here despite it's address */
 490                 dma2: dma-controller@e1200000 {
 491                         compatible = "microchip,sama7g5-dma";
 492                         reg = <0xe1200000 0x1000>;
 493                         interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
 494                         #dma-cells = <1>;
 495                         clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
 496                         clock-names = "dma_clk";
 497                         dma-requests = <0>;
 498                         status = "disabled";
 499                 };
 500
 501                 tcb0: timer@e2814000 {
 502                         compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
 503                         #address-cells = <1>;
 504                         #size-cells = <0>;
 505                         reg = <0xe2814000 0x100>;
 506                         interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
 507                         clocks = <&pmc PMC_TYPE_PERIPHERAL 88>, <&pmc PMC_TYPE_PERIPHERAL 89>, <&pmc PMC_TYPE_PERIPHERAL 90>, <&clk32k 1>;
 508                         clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
 509                 };
 510
 511                 flx8: flexcom@e2818000 {
 512                         compatible = "atmel,sama5d2-flexcom";
 513                         reg = <0xe2818000 0x200>;
 514                         clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
 515                         #address-cells = <1>;
 516                         #size-cells = <1>;
 517                         ranges = <0x0 0xe2818000 0x800>;
 518                         status = "disabled";
 519
 520                         i2c8: i2c@600 {
 521                                 compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
 522                                 reg = <0x600 0x200>;
 523                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 524                                 #address-cells = <1>;
 525                                 #size-cells = <0>;
 526                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
 527                                 atmel,fifo-size = <32>;
 528                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(21)>,
 529                                         <&dma0 AT91_XDMAC_DT_PERID(22)>;
 530                                 dma-names = "rx", "tx";
 531                                 atmel,use-dma-rx;
 532                                 atmel,use-dma-tx;
 533                                 status = "disabled";
 534                         };
 535                 };
 536
 537                 flx9: flexcom@e281c000 {
 538                         compatible = "atmel,sama5d2-flexcom";
 539                         reg = <0xe281c000 0x200>;
 540                         clocks = <&pmc PMC_TYPE_PERIPHERAL 47>;
 541                         #address-cells = <1>;
 542                         #size-cells = <1>;
 543                         ranges = <0x0 0xe281c000 0x800>;
 544                         status = "disabled";
 545
 546                         i2c9: i2c@600 {
 547                                 compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
 548                                 reg = <0x600 0x200>;
 549                                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 550                                 #address-cells = <1>;
 551                                 #size-cells = <0>;
 552                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 47>;
 553                                 atmel,fifo-size = <32>;
 554                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(23)>,
 555                                         <&dma0 AT91_XDMAC_DT_PERID(24)>;
 556                                 dma-names = "rx", "tx";
 557                                 atmel,use-dma-rx;
 558                                 atmel,use-dma-tx;
 559                                 status = "disabled";
 560                         };
 561                 };
 562
 563                 flx11: flexcom@e2824000 {
 564                         compatible = "atmel,sama5d2-flexcom";
 565                         reg = <0xe2824000 0x200>;
 566                         clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
 567                         #address-cells = <1>;
 568                         #size-cells = <1>;
 569                         ranges = <0x0 0xe2824000 0x800>;
 570                         status = "disabled";
 571
 572                         spi11: spi@400 {
 573                                 compatible = "atmel,at91rm9200-spi";
 574                                 reg = <0x400 0x200>;
 575                                 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
 576                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
 577                                 clock-names = "spi_clk";
 578                                 #address-cells = <1>;
 579                                 #size-cells = <0>;
 580                                 atmel,fifo-size = <32>;
 581                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(27)>,
 582                                             <&dma0 AT91_XDMAC_DT_PERID(28)>;
 583                                 dma-names = "rx", "tx";
 584                                 status = "disabled";
 585                         };
 586                 };
 587
 588                 uddrc: uddrc@e3800000 {
 589                         compatible = "microchip,sama7g5-uddrc";
 590                         reg = <0xe3800000 0x4000>;
 591                         status = "okay";
 592                 };
 593
 594                 ddr3phy: ddr3phy@e3804000 {
 595                         compatible = "microchip,sama7g5-ddr3phy";
 596                         reg = <0xe3804000 0x1000>;
 597                         status = "okay";
 598                 };
 599
 600                 gic: interrupt-controller@e8c11000 {
 601                         compatible = "arm,cortex-a7-gic";
 602                         #interrupt-cells = <3>;
 603                         #address-cells = <0>;
 604                         interrupt-controller;
 605                         interrupt-parent;
 606                         reg = <0xe8c11000 0x1000>,
 607                                 <0xe8c12000 0x2000>;
 608                 };
 609         };
 610 };