arch/arm/boot/dts/sama5d2.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * sama5d2.dtsi - Device Tree Include file for SAMA5D2 family SoC
   4  *
   5  *  Copyright (C) 2015 Atmel,
   6  *                2015 Ludovic Desroches <ludovic.desroches@atmel.com>
   7  */
   8
   9 #include <dt-bindings/dma/at91.h>
  10 #include <dt-bindings/interrupt-controller/irq.h>
  11 #include <dt-bindings/clock/at91.h>
  12 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
  13
  14 / {
  15         #address-cells = <1>;
  16         #size-cells = <1>;
  17         model = "Atmel SAMA5D2 family SoC";
  18         compatible = "atmel,sama5d2";
  19         interrupt-parent = <&aic>;
  20
  21         aliases {
  22                 serial0 = &uart1;
  23                 serial1 = &uart3;
  24                 tcb0 = &tcb0;
  25                 tcb1 = &tcb1;
  26                 i2s0 = &i2s0;
  27                 i2s1 = &i2s1;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 cpu@0 {
  35                         device_type = "cpu";
  36                         compatible = "arm,cortex-a5";
  37                         reg = <0>;
  38                         next-level-cache = <&L2>;
  39                 };
  40         };
  41
  42         pmu {
  43                 compatible = "arm,cortex-a5-pmu";
  44                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>;
  45         };
  46
  47         etb {
  48                 compatible = "arm,coresight-etb10", "arm,primecell";
  49                 reg = <0x740000 0x1000>;
  50
  51                 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
  52                 clock-names = "apb_pclk";
  53
  54                 in-ports {
  55                         port {
  56                                 etb_in: endpoint {
  57                                         remote-endpoint = <&etm_out>;
  58                                 };
  59                         };
  60                 };
  61         };
  62
  63         etm {
  64                 compatible = "arm,coresight-etm3x", "arm,primecell";
  65                 reg = <0x73C000 0x1000>;
  66
  67                 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
  68                 clock-names = "apb_pclk";
  69
  70                 out-ports {
  71                         port {
  72                                 etm_out: endpoint {
  73                                         remote-endpoint = <&etb_in>;
  74                                 };
  75                         };
  76                 };
  77         };
  78
  79         memory {
  80                 device_type = "memory";
  81                 reg = <0x20000000 0x20000000>;
  82         };
  83
  84         clocks {
  85                 slow_xtal: slow_xtal {
  86                         compatible = "fixed-clock";
  87                         #clock-cells = <0>;
  88                         clock-frequency = <0>;
  89                 };
  90
  91                 main_xtal: main_xtal {
  92                         compatible = "fixed-clock";
  93                         #clock-cells = <0>;
  94                         clock-frequency = <0>;
  95                 };
  96         };
  97
  98         ns_sram: sram@200000 {
  99                 compatible = "mmio-sram";
 100                 reg = <0x00200000 0x20000>;
 101         };
 102
 103         ahb {
 104                 compatible = "simple-bus";
 105                 #address-cells = <1>;
 106                 #size-cells = <1>;
 107                 ranges;
 108
 109                 nfc_sram: sram@100000 {
 110                         compatible = "mmio-sram";
 111                         no-memory-wc;
 112                         reg = <0x00100000 0x2400>;
 113                 };
 114
 115                 usb0: gadget@300000 {
 116                         compatible = "atmel,sama5d3-udc";
 117                         reg = <0x00300000 0x100000
 118                                0xfc02c000 0x400>;
 119                         interrupts = <42 IRQ_TYPE_LEVEL_HIGH 2>;
 120                         clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
 121                         clock-names = "pclk", "hclk";
 122                         status = "disabled";
 123                 };
 124
 125                 usb1: ohci@400000 {
 126                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
 127                         reg = <0x00400000 0x100000>;
 128                         interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>;
 129                         clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&pmc PMC_TYPE_PERIPHERAL 41>, <&pmc PMC_TYPE_SYSTEM 6>;
 130                         clock-names = "ohci_clk", "hclk", "uhpck";
 131                         status = "disabled";
 132                 };
 133
 134                 usb2: ehci@500000 {
 135                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
 136                         reg = <0x00500000 0x100000>;
 137                         interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>;
 138                         clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 41>;
 139                         clock-names = "usb_clk", "ehci_clk";
 140                         status = "disabled";
 141                 };
 142
 143                 L2: cache-controller@a00000 {
 144                         compatible = "arm,pl310-cache";
 145                         reg = <0x00a00000 0x1000>;
 146                         interrupts = <63 IRQ_TYPE_LEVEL_HIGH 4>;
 147                         cache-unified;
 148                         cache-level = <2>;
 149                 };
 150
 151                 ebi: ebi@10000000 {
 152                         compatible = "atmel,sama5d3-ebi";
 153                         #address-cells = <2>;
 154                         #size-cells = <1>;
 155                         atmel,smc = <&hsmc>;
 156                         reg = <0x10000000 0x10000000
 157                                0x60000000 0x30000000>;
 158                         ranges = <0x0 0x0 0x10000000 0x10000000
 159                                   0x1 0x0 0x60000000 0x10000000
 160                                   0x2 0x0 0x70000000 0x10000000
 161                                   0x3 0x0 0x80000000 0x10000000>;
 162                         clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
 163                         status = "disabled";
 164
 165                         nand_controller: nand-controller {
 166                                 compatible = "atmel,sama5d3-nand-controller";
 167                                 atmel,nfc-sram = <&nfc_sram>;
 168                                 atmel,nfc-io = <&nfc_io>;
 169                                 ecc-engine = <&pmecc>;
 170                                 #address-cells = <2>;
 171                                 #size-cells = <1>;
 172                                 ranges;
 173                                 status = "disabled";
 174                         };
 175                 };
 176
 177                 sdmmc0: sdio-host@a0000000 {
 178                         compatible = "atmel,sama5d2-sdhci";
 179                         reg = <0xa0000000 0x300>;
 180                         interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
 181                         clocks = <&pmc PMC_TYPE_PERIPHERAL 31>, <&pmc PMC_TYPE_GCK 31>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
 182                         clock-names = "hclock", "multclk", "baseclk";
 183                         assigned-clocks = <&pmc PMC_TYPE_GCK 31>;
 184                         assigned-clock-rates = <480000000>;
 185                         status = "disabled";
 186                 };
 187
 188                 sdmmc1: sdio-host@b0000000 {
 189                         compatible = "atmel,sama5d2-sdhci";
 190                         reg = <0xb0000000 0x300>;
 191                         interrupts = <32 IRQ_TYPE_LEVEL_HIGH 0>;
 192                         clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_GCK 32>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
 193                         clock-names = "hclock", "multclk", "baseclk";
 194                         assigned-clocks = <&pmc PMC_TYPE_GCK 32>;
 195                         assigned-clock-rates = <480000000>;
 196                         status = "disabled";
 197                 };
 198
 199                 nfc_io: nfc-io@c0000000 {
 200                         compatible = "atmel,sama5d3-nfc-io", "syscon";
 201                         reg = <0xc0000000 0x8000000>;
 202                 };
 203
 204                 apb {
 205                         compatible = "simple-bus";
 206                         #address-cells = <1>;
 207                         #size-cells = <1>;
 208                         ranges;
 209
 210                         hlcdc: hlcdc@f0000000 {
 211                                 compatible = "atmel,sama5d2-hlcdc";
 212                                 reg = <0xf0000000 0x2000>;
 213                                 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>;
 214                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
 215                                 clock-names = "periph_clk","sys_clk", "slow_clk";
 216                                 status = "disabled";
 217
 218                                 hlcdc-display-controller {
 219                                         compatible = "atmel,hlcdc-display-controller";
 220                                         #address-cells = <1>;
 221                                         #size-cells = <0>;
 222
 223                                         port@0 {
 224                                                 #address-cells = <1>;
 225                                                 #size-cells = <0>;
 226                                                 reg = <0>;
 227                                         };
 228                                 };
 229
 230                                 hlcdc_pwm: hlcdc-pwm {
 231                                         compatible = "atmel,hlcdc-pwm";
 232                                         #pwm-cells = <3>;
 233                                 };
 234                         };
 235
 236                         isc: isc@f0008000 {
 237                                 compatible = "atmel,sama5d2-isc";
 238                                 reg = <0xf0008000 0x4000>;
 239                                 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 5>;
 240                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_SYSTEM 18>, <&pmc PMC_TYPE_GCK 46>;
 241                                 clock-names = "hclock", "iscck", "gck";
 242                                 #clock-cells = <0>;
 243                                 clock-output-names = "isc-mck";
 244                                 status = "disabled";
 245                         };
 246
 247                         ramc0: ramc@f000c000 {
 248                                 compatible = "atmel,sama5d3-ddramc";
 249                                 reg = <0xf000c000 0x200>;
 250                                 clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 13>;
 251                                 clock-names = "ddrck", "mpddr";
 252                         };
 253
 254                         dma0: dma-controller@f0010000 {
 255                                 compatible = "atmel,sama5d4-dma";
 256                                 reg = <0xf0010000 0x1000>;
 257                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
 258                                 #dma-cells = <1>;
 259                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
 260                                 clock-names = "dma_clk";
 261                         };
 262
 263                         /* Place dma1 here despite its address */
 264                         dma1: dma-controller@f0004000 {
 265                                 compatible = "atmel,sama5d4-dma";
 266                                 reg = <0xf0004000 0x1000>;
 267                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 0>;
 268                                 #dma-cells = <1>;
 269                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
 270                                 clock-names = "dma_clk";
 271                         };
 272
 273                         pmc: pmc@f0014000 {
 274                                 compatible = "atmel,sama5d2-pmc", "syscon";
 275                                 reg = <0xf0014000 0x160>;
 276                                 interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>;
 277                                 #clock-cells = <2>;
 278                                 clocks = <&clk32k>, <&main_xtal>;
 279                                 clock-names = "slow_clk", "main_xtal";
 280                         };
 281
 282                         qspi0: spi@f0020000 {
 283                                 compatible = "atmel,sama5d2-qspi";
 284                                 reg = <0xf0020000 0x100>, <0xd0000000 0x08000000>;
 285                                 reg-names = "qspi_base", "qspi_mmap";
 286                                 interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;
 287                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
 288                                 #address-cells = <1>;
 289                                 #size-cells = <0>;
 290                                 status = "disabled";
 291                         };
 292
 293                         qspi1: spi@f0024000 {
 294                                 compatible = "atmel,sama5d2-qspi";
 295                                 reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>;
 296                                 reg-names = "qspi_base", "qspi_mmap";
 297                                 interrupts = <53 IRQ_TYPE_LEVEL_HIGH 7>;
 298                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 53>;
 299                                 #address-cells = <1>;
 300                                 #size-cells = <0>;
 301                                 status = "disabled";
 302                         };
 303
 304                         sha@f0028000 {
 305                                 compatible = "atmel,at91sam9g46-sha";
 306                                 reg = <0xf0028000 0x100>;
 307                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
 308                                 dmas = <&dma0
 309                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 310                                          AT91_XDMAC_DT_PERID(30))>;
 311                                 dma-names = "tx";
 312                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
 313                                 clock-names = "sha_clk";
 314                                 status = "okay";
 315                         };
 316
 317                         aes@f002c000 {
 318                                 compatible = "atmel,at91sam9g46-aes";
 319                                 reg = <0xf002c000 0x100>;
 320                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
 321                                 dmas = <&dma0
 322                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 323                                          AT91_XDMAC_DT_PERID(26))>,
 324                                        <&dma0
 325                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 326                                          AT91_XDMAC_DT_PERID(27))>;
 327                                 dma-names = "tx", "rx";
 328                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
 329                                 clock-names = "aes_clk";
 330                                 status = "okay";
 331                         };
 332
 333                         spi0: spi@f8000000 {
 334                                 compatible = "atmel,at91rm9200-spi";
 335                                 reg = <0xf8000000 0x100>;
 336                                 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>;
 337                                 dmas = <&dma0
 338                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 339                                          AT91_XDMAC_DT_PERID(6))>,
 340                                        <&dma0
 341                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 342                                          AT91_XDMAC_DT_PERID(7))>;
 343                                 dma-names = "tx", "rx";
 344                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
 345                                 clock-names = "spi_clk";
 346                                 atmel,fifo-size = <16>;
 347                                 #address-cells = <1>;
 348                                 #size-cells = <0>;
 349                                 status = "disabled";
 350                         };
 351
 352                         ssc0: ssc@f8004000 {
 353                                 compatible = "atmel,at91sam9g45-ssc";
 354                                 reg = <0xf8004000 0x4000>;
 355                                 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 4>;
 356                                 dmas = <&dma0
 357                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 358                                         AT91_XDMAC_DT_PERID(21))>,
 359                                        <&dma0
 360                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 361                                         AT91_XDMAC_DT_PERID(22))>;
 362                                 dma-names = "tx", "rx";
 363                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
 364                                 clock-names = "pclk";
 365                                 status = "disabled";
 366                         };
 367
 368                         macb0: ethernet@f8008000 {
 369                                 compatible = "atmel,sama5d2-gem";
 370                                 reg = <0xf8008000 0x1000>;
 371                                 interrupts = <5  IRQ_TYPE_LEVEL_HIGH 3          /* Queue 0 */
 372                                               66 IRQ_TYPE_LEVEL_HIGH 3          /* Queue 1 */
 373                                               67 IRQ_TYPE_LEVEL_HIGH 3>;        /* Queue 2 */
 374                                 #address-cells = <1>;
 375                                 #size-cells = <0>;
 376                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>, <&pmc PMC_TYPE_PERIPHERAL 5>;
 377                                 clock-names = "hclk", "pclk";
 378                                 status = "disabled";
 379                         };
 380
 381                         tcb0: timer@f800c000 {
 382                                 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
 383                                 #address-cells = <1>;
 384                                 #size-cells = <0>;
 385                                 reg = <0xf800c000 0x100>;
 386                                 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
 387                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&clk32k>;
 388                                 clock-names = "t0_clk", "slow_clk";
 389                         };
 390
 391                         tcb1: timer@f8010000 {
 392                                 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
 393                                 #address-cells = <1>;
 394                                 #size-cells = <0>;
 395                                 reg = <0xf8010000 0x100>;
 396                                 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
 397                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&clk32k>;
 398                                 clock-names = "t0_clk", "slow_clk";
 399                         };
 400
 401                         hsmc: hsmc@f8014000 {
 402                                 compatible = "atmel,sama5d2-smc", "syscon", "simple-mfd";
 403                                 reg = <0xf8014000 0x1000>;
 404                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 6>;
 405                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
 406                                 #address-cells = <1>;
 407                                 #size-cells = <1>;
 408                                 ranges;
 409
 410                                 pmecc: ecc-engine@f8014070 {
 411                                         compatible = "atmel,sama5d2-pmecc";
 412                                         reg = <0xf8014070 0x490>,
 413                                               <0xf8014500 0x100>;
 414                                 };
 415                         };
 416
 417                         pdmic: pdmic@f8018000 {
 418                                 compatible = "atmel,sama5d2-pdmic";
 419                                 reg = <0xf8018000 0x124>;
 420                                 interrupts = <48 IRQ_TYPE_LEVEL_HIGH 7>;
 421                                 dmas = <&dma0
 422                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 423                                         | AT91_XDMAC_DT_PERID(50))>;
 424                                 dma-names = "rx";
 425                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 48>, <&pmc PMC_TYPE_GCK 48>;
 426                                 clock-names = "pclk", "gclk";
 427                                 status = "disabled";
 428                         };
 429
 430                         uart0: serial@f801c000 {
 431                                 compatible = "atmel,at91sam9260-usart";
 432                                 reg = <0xf801c000 0x100>;
 433                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 7>;
 434                                 dmas = <&dma0
 435                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 436                                          AT91_XDMAC_DT_PERID(35))>,
 437                                        <&dma0
 438                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 439                                          AT91_XDMAC_DT_PERID(36))>;
 440                                 dma-names = "tx", "rx";
 441                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
 442                                 clock-names = "usart";
 443                                 status = "disabled";
 444                         };
 445
 446                         uart1: serial@f8020000 {
 447                                 compatible = "atmel,at91sam9260-usart";
 448                                 reg = <0xf8020000 0x100>;
 449                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 7>;
 450                                 dmas = <&dma0
 451                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 452                                          AT91_XDMAC_DT_PERID(37))>,
 453                                        <&dma0
 454                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 455                                          AT91_XDMAC_DT_PERID(38))>;
 456                                 dma-names = "tx", "rx";
 457                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
 458                                 clock-names = "usart";
 459                                 status = "disabled";
 460                         };
 461
 462                         uart2: serial@f8024000 {
 463                                 compatible = "atmel,at91sam9260-usart";
 464                                 reg = <0xf8024000 0x100>;
 465                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 7>;
 466                                 dmas = <&dma0
 467                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 468                                          AT91_XDMAC_DT_PERID(39))>,
 469                                        <&dma0
 470                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 471                                          AT91_XDMAC_DT_PERID(40))>;
 472                                 dma-names = "tx", "rx";
 473                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
 474                                 clock-names = "usart";
 475                                 status = "disabled";
 476                         };
 477
 478                         i2c0: i2c@f8028000 {
 479                                 compatible = "atmel,sama5d2-i2c";
 480                                 reg = <0xf8028000 0x100>;
 481                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 7>;
 482                                 dmas = <&dma0
 483                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 484                                          AT91_XDMAC_DT_PERID(0))>,
 485                                        <&dma0
 486                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 487                                          AT91_XDMAC_DT_PERID(1))>;
 488                                 dma-names = "tx", "rx";
 489                                 #address-cells = <1>;
 490                                 #size-cells = <0>;
 491                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
 492                                 atmel,fifo-size = <16>;
 493                                 status = "disabled";
 494                         };
 495
 496                         pwm0: pwm@f802c000 {
 497                                 compatible = "atmel,sama5d2-pwm";
 498                                 reg = <0xf802c000 0x4000>;
 499                                 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 7>;
 500                                 #pwm-cells = <3>;
 501                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
 502                                 status = "disabled";
 503                         };
 504
 505                         sfr: sfr@f8030000 {
 506                                 compatible = "atmel,sama5d2-sfr", "syscon";
 507                                 reg = <0xf8030000 0x98>;
 508                         };
 509
 510                         flx0: flexcom@f8034000 {
 511                                 compatible = "atmel,sama5d2-flexcom";
 512                                 reg = <0xf8034000 0x200>;
 513                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
 514                                 #address-cells = <1>;
 515                                 #size-cells = <1>;
 516                                 ranges = <0x0 0xf8034000 0x800>;
 517                                 status = "disabled";
 518                         };
 519
 520                         flx1: flexcom@f8038000 {
 521                                 compatible = "atmel,sama5d2-flexcom";
 522                                 reg = <0xf8038000 0x200>;
 523                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
 524                                 #address-cells = <1>;
 525                                 #size-cells = <1>;
 526                                 ranges = <0x0 0xf8038000 0x800>;
 527                                 status = "disabled";
 528                         };
 529
 530                         securam: sram@f8044000 {
 531                                 compatible = "atmel,sama5d2-securam", "mmio-sram";
 532                                 reg = <0xf8044000 0x1420>;
 533                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 51>;
 534                                 #address-cells = <1>;
 535                                 #size-cells = <1>;
 536                                 ranges = <0 0xf8044000 0x1420>;
 537                         };
 538
 539                         reset_controller: rstc@f8048000 {
 540                                 compatible = "atmel,sama5d3-rstc";
 541                                 reg = <0xf8048000 0x10>;
 542                                 clocks = <&clk32k>;
 543                         };
 544
 545                         shutdown_controller: shdwc@f8048010 {
 546                                 compatible = "atmel,sama5d2-shdwc";
 547                                 reg = <0xf8048010 0x10>;
 548                                 clocks = <&clk32k>;
 549                                 #address-cells = <1>;
 550                                 #size-cells = <0>;
 551                                 atmel,wakeup-rtc-timer;
 552                         };
 553
 554                         pit: timer@f8048030 {
 555                                 compatible = "atmel,at91sam9260-pit";
 556                                 reg = <0xf8048030 0x10>;
 557                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
 558                                 clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
 559                         };
 560
 561                         watchdog: watchdog@f8048040 {
 562                                 compatible = "atmel,sama5d4-wdt";
 563                                 reg = <0xf8048040 0x10>;
 564                                 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
 565                                 clocks = <&clk32k>;
 566                                 status = "disabled";
 567                         };
 568
 569                         clk32k: sckc@f8048050 {
 570                                 compatible = "atmel,sama5d4-sckc";
 571                                 reg = <0xf8048050 0x4>;
 572
 573                                 clocks = <&slow_xtal>;
 574                                 #clock-cells = <0>;
 575                         };
 576
 577                         rtc: rtc@f80480b0 {
 578                                 compatible = "atmel,sama5d2-rtc";
 579                                 reg = <0xf80480b0 0x30>;
 580                                 interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>;
 581                                 clocks = <&clk32k>;
 582                         };
 583
 584                         i2s0: i2s@f8050000 {
 585                                 compatible = "atmel,sama5d2-i2s";
 586                                 reg = <0xf8050000 0x100>;
 587                                 interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>;
 588                                 dmas = <&dma0
 589                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 590                                          AT91_XDMAC_DT_PERID(31))>,
 591                                        <&dma0
 592                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 593                                          AT91_XDMAC_DT_PERID(32))>;
 594                                 dma-names = "tx", "rx";
 595                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 54>, <&pmc PMC_TYPE_GCK 54>;
 596                                 clock-names = "pclk", "gclk";
 597                                 assigned-clocks = <&pmc PMC_TYPE_CORE PMC_I2S0_MUX>;
 598                                 assigned-clock-parents = <&pmc PMC_TYPE_GCK 54>;
 599                                 status = "disabled";
 600                         };
 601
 602                         can0: can@f8054000 {
 603                                 compatible = "bosch,m_can";
 604                                 reg = <0xf8054000 0x4000>, <0x210000 0x4000>;
 605                                 reg-names = "m_can", "message_ram";
 606                                 interrupts = <56 IRQ_TYPE_LEVEL_HIGH 7>,
 607                                              <64 IRQ_TYPE_LEVEL_HIGH 7>;
 608                                 interrupt-names = "int0", "int1";
 609                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 56>, <&pmc PMC_TYPE_GCK 56>;
 610                                 clock-names = "hclk", "cclk";
 611                                 assigned-clocks = <&pmc PMC_TYPE_GCK 56>;
 612                                 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
 613                                 assigned-clock-rates = <40000000>;
 614                                 bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
 615                                 status = "disabled";
 616                         };
 617
 618                         spi1: spi@fc000000 {
 619                                 compatible = "atmel,at91rm9200-spi";
 620                                 reg = <0xfc000000 0x100>;
 621                                 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
 622                                 dmas = <&dma0
 623                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 624                                          AT91_XDMAC_DT_PERID(8))>,
 625                                        <&dma0
 626                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 627                                          AT91_XDMAC_DT_PERID(9))>;
 628                                 dma-names = "tx", "rx";
 629                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
 630                                 clock-names = "spi_clk";
 631                                 atmel,fifo-size = <16>;
 632                                 #address-cells = <1>;
 633                                 #size-cells = <0>;
 634                                 status = "disabled";
 635                         };
 636
 637                         uart3: serial@fc008000 {
 638                                 compatible = "atmel,at91sam9260-usart";
 639                                 reg = <0xfc008000 0x100>;
 640                                 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 7>;
 641                                 dmas = <&dma1
 642                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 643                                          AT91_XDMAC_DT_PERID(41))>,
 644                                        <&dma1
 645                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 646                                          AT91_XDMAC_DT_PERID(42))>;
 647                                 dma-names = "tx", "rx";
 648                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
 649                                 clock-names = "usart";
 650                                 status = "disabled";
 651                         };
 652
 653                         uart4: serial@fc00c000 {
 654                                 compatible = "atmel,at91sam9260-usart";
 655                                 reg = <0xfc00c000 0x100>;
 656                                 dmas = <&dma0
 657                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 658                                          AT91_XDMAC_DT_PERID(43))>,
 659                                        <&dma0
 660                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 661                                          AT91_XDMAC_DT_PERID(44))>;
 662                                 dma-names = "tx", "rx";
 663                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 7>;
 664                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
 665                                 clock-names = "usart";
 666                                 status = "disabled";
 667                         };
 668
 669                         flx2: flexcom@fc010000 {
 670                                 compatible = "atmel,sama5d2-flexcom";
 671                                 reg = <0xfc010000 0x200>;
 672                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
 673                                 #address-cells = <1>;
 674                                 #size-cells = <1>;
 675                                 ranges = <0x0 0xfc010000 0x800>;
 676                                 status = "disabled";
 677                         };
 678
 679                         flx3: flexcom@fc014000 {
 680                                 compatible = "atmel,sama5d2-flexcom";
 681                                 reg = <0xfc014000 0x200>;
 682                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
 683                                 #address-cells = <1>;
 684                                 #size-cells = <1>;
 685                                 ranges = <0x0 0xfc014000 0x800>;
 686                                 status = "disabled";
 687                         };
 688
 689                         flx4: flexcom@fc018000 {
 690                                 compatible = "atmel,sama5d2-flexcom";
 691                                 reg = <0xfc018000 0x200>;
 692                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
 693                                 #address-cells = <1>;
 694                                 #size-cells = <1>;
 695                                 ranges = <0x0 0xfc018000 0x800>;
 696                                 status = "disabled";
 697                         };
 698
 699                         trng@fc01c000 {
 700                                 compatible = "atmel,at91sam9g45-trng";
 701                                 reg = <0xfc01c000 0x100>;
 702                                 interrupts = <47 IRQ_TYPE_LEVEL_HIGH 0>;
 703                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 47>;
 704                         };
 705
 706                         aic: interrupt-controller@fc020000 {
 707                                 #interrupt-cells = <3>;
 708                                 compatible = "atmel,sama5d2-aic";
 709                                 interrupt-controller;
 710                                 reg = <0xfc020000 0x200>;
 711                                 atmel,external-irqs = <49>;
 712                         };
 713
 714                         i2c1: i2c@fc028000 {
 715                                 compatible = "atmel,sama5d2-i2c";
 716                                 reg = <0xfc028000 0x100>;
 717                                 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 7>;
 718                                 dmas = <&dma0
 719                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 720                                          AT91_XDMAC_DT_PERID(2))>,
 721                                        <&dma0
 722                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 723                                          AT91_XDMAC_DT_PERID(3))>;
 724                                 dma-names = "tx", "rx";
 725                                 #address-cells = <1>;
 726                                 #size-cells = <0>;
 727                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
 728                                 atmel,fifo-size = <16>;
 729                                 status = "disabled";
 730                         };
 731
 732                         adc: adc@fc030000 {
 733                                 compatible = "atmel,sama5d2-adc";
 734                                 reg = <0xfc030000 0x100>;
 735                                 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 7>;
 736                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 40>;
 737                                 clock-names = "adc_clk";
 738                                 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>;
 739                                 dma-names = "rx";
 740                                 atmel,min-sample-rate-hz = <200000>;
 741                                 atmel,max-sample-rate-hz = <20000000>;
 742                                 atmel,startup-time-ms = <4>;
 743                                 atmel,trigger-edge-type = <IRQ_TYPE_EDGE_RISING>;
 744                                 #io-channel-cells = <1>;
 745                                 status = "disabled";
 746                         };
 747
 748                         resistive_touch: resistive-touch {
 749                                 compatible = "resistive-adc-touch";
 750                                 io-channels = <&adc AT91_SAMA5D2_ADC_X_CHANNEL>,
 751                                               <&adc AT91_SAMA5D2_ADC_Y_CHANNEL>,
 752                                               <&adc AT91_SAMA5D2_ADC_P_CHANNEL>;
 753                                 io-channel-names = "x", "y", "pressure";
 754                                 touchscreen-min-pressure = <50000>;
 755                                 status = "disabled";
 756                         };
 757
 758                         pioA: pinctrl@fc038000 {
 759                                 compatible = "atmel,sama5d2-pinctrl";
 760                                 reg = <0xfc038000 0x600>;
 761                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 7>,
 762                                              <68 IRQ_TYPE_LEVEL_HIGH 7>,
 763                                              <69 IRQ_TYPE_LEVEL_HIGH 7>,
 764                                              <70 IRQ_TYPE_LEVEL_HIGH 7>;
 765                                 interrupt-controller;
 766                                 #interrupt-cells = <2>;
 767                                 gpio-controller;
 768                                 #gpio-cells = <2>;
 769                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
 770                         };
 771
 772                         pioBU: secumod@fc040000 {
 773                                 compatible = "atmel,sama5d2-secumod", "syscon";
 774                                 reg = <0xfc040000 0x100>;
 775
 776                                 gpio-controller;
 777                                 #gpio-cells = <2>;
 778                         };
 779
 780                         tdes@fc044000 {
 781                                 compatible = "atmel,at91sam9g46-tdes";
 782                                 reg = <0xfc044000 0x100>;
 783                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
 784                                 dmas = <&dma0
 785                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 786                                          AT91_XDMAC_DT_PERID(28))>,
 787                                        <&dma0
 788                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 789                                          AT91_XDMAC_DT_PERID(29))>;
 790                                 dma-names = "tx", "rx";
 791                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
 792                                 clock-names = "tdes_clk";
 793                                 status = "okay";
 794                         };
 795
 796                         classd: classd@fc048000 {
 797                                 compatible = "atmel,sama5d2-classd";
 798                                 reg = <0xfc048000 0x100>;
 799                                 interrupts = <59 IRQ_TYPE_LEVEL_HIGH 7>;
 800                                 dmas = <&dma0
 801                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 802                                          AT91_XDMAC_DT_PERID(47))>;
 803                                 dma-names = "tx";
 804                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 59>, <&pmc PMC_TYPE_GCK 59>;
 805                                 clock-names = "pclk", "gclk";
 806                                 status = "disabled";
 807                         };
 808
 809                         i2s1: i2s@fc04c000 {
 810                                 compatible = "atmel,sama5d2-i2s";
 811                                 reg = <0xfc04c000 0x100>;
 812                                 interrupts = <55 IRQ_TYPE_LEVEL_HIGH 7>;
 813                                 dmas = <&dma0
 814                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 815                                          AT91_XDMAC_DT_PERID(33))>,
 816                                        <&dma0
 817                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 818                                          AT91_XDMAC_DT_PERID(34))>;
 819                                 dma-names = "tx", "rx";
 820                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 55>, <&pmc PMC_TYPE_GCK 55>;
 821                                 clock-names = "pclk", "gclk";
 822                                 assigned-clocks = <&pmc PMC_TYPE_CORE PMC_I2S1_MUX>;
 823                                 assigned-parrents = <&pmc PMC_TYPE_GCK 55>;
 824                                 status = "disabled";
 825                         };
 826
 827                         can1: can@fc050000 {
 828                                 compatible = "bosch,m_can";
 829                                 reg = <0xfc050000 0x4000>, <0x210000 0x4000>;
 830                                 reg-names = "m_can", "message_ram";
 831                                 interrupts = <57 IRQ_TYPE_LEVEL_HIGH 7>,
 832                                              <65 IRQ_TYPE_LEVEL_HIGH 7>;
 833                                 interrupt-names = "int0", "int1";
 834                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 57>, <&pmc PMC_TYPE_GCK 57>;
 835                                 clock-names = "hclk", "cclk";
 836                                 assigned-clocks = <&pmc PMC_TYPE_GCK 57>;
 837                                 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
 838                                 assigned-clock-rates = <40000000>;
 839                                 bosch,mram-cfg = <0x1100 0 0 64 0 0 32 32>;
 840                                 status = "disabled";
 841                         };
 842
 843                         sfrbu: sfr@fc05c000 {
 844                                 compatible = "atmel,sama5d2-sfrbu", "syscon";
 845                                 reg = <0xfc05c000 0x20>;
 846                         };
 847
 848                         chipid@fc069000 {
 849                                 compatible = "atmel,sama5d2-chipid";
 850                                 reg = <0xfc069000 0x8>;
 851                         };
 852                 };
 853         };
 854 };