2 * Device Tree Source for the Lager board
4 * Copyright (C) 2013-2014 Renesas Solutions Corp.
5 * Copyright (C) 2014 Cogent Embedded, Inc.
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
13 #include "r8a7790.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
18 compatible = "renesas,lager", "renesas,r8a7790";
21 bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
25 device_type = "memory";
26 reg = <0 0x40000000 0 0x80000000>;
30 device_type = "memory";
31 reg = <1 0x80000000 0 0x80000000>;
40 compatible = "gpio-leds";
42 gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
45 gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
48 gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
52 fixedregulator3v3: fixedregulator@0 {
53 compatible = "regulator-fixed";
54 regulator-name = "fixed-3.3V";
55 regulator-min-microvolt = <3300000>;
56 regulator-max-microvolt = <3300000>;
61 vcc_sdhi0: regulator@1 {
62 compatible = "regulator-fixed";
64 regulator-name = "SDHI0 Vcc";
65 regulator-min-microvolt = <3300000>;
66 regulator-max-microvolt = <3300000>;
68 gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
72 vccq_sdhi0: regulator@2 {
73 compatible = "regulator-gpio";
75 regulator-name = "SDHI0 VccQ";
76 regulator-min-microvolt = <1800000>;
77 regulator-max-microvolt = <3300000>;
79 gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
85 vcc_sdhi2: regulator@3 {
86 compatible = "regulator-fixed";
88 regulator-name = "SDHI2 Vcc";
89 regulator-min-microvolt = <3300000>;
90 regulator-max-microvolt = <3300000>;
92 gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>;
96 vccq_sdhi2: regulator@4 {
97 compatible = "regulator-gpio";
99 regulator-name = "SDHI2 VccQ";
100 regulator-min-microvolt = <1800000>;
101 regulator-max-microvolt = <3300000>;
103 gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
111 clock-frequency = <20000000>;
115 pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
116 pinctrl-names = "default";
119 renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
120 renesas,function = "du";
123 scif0_pins: serial0 {
124 renesas,groups = "scif0_data";
125 renesas,function = "scif0";
129 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
130 renesas,function = "eth";
134 renesas,groups = "intc_irq0";
135 renesas,function = "intc";
138 scif1_pins: serial1 {
139 renesas,groups = "scif1_data";
140 renesas,function = "scif1";
144 renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
145 renesas,function = "sdhi0";
149 renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
150 renesas,function = "sdhi2";
154 renesas,groups = "mmc1_data8", "mmc1_ctrl";
155 renesas,function = "mmc1";
159 renesas,groups = "qspi_ctrl", "qspi_data4";
160 renesas,function = "qspi";
165 pinctrl-0 = <ðer_pins &phy1_pins>;
166 pinctrl-names = "default";
168 phy-handle = <&phy1>;
169 renesas,ether-link-active-low;
172 phy1: ethernet-phy@1 {
174 interrupt-parent = <&irqc0>;
175 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
180 pinctrl-0 = <&mmc1_pins>;
181 pinctrl-names = "default";
183 vmmc-supply = <&fixedregulator3v3>;
194 pinctrl-0 = <&qspi_pins>;
195 pinctrl-names = "default";
200 #address-cells = <1>;
202 compatible = "spansion,s25fl512s";
204 spi-max-frequency = <30000000>;
209 reg = <0x00000000 0x00040000>;
214 reg = <0x00040000 0x00400000>;
219 reg = <0x00440000 0x03bc0000>;
225 pinctrl-0 = <&sdhi0_pins>;
226 pinctrl-names = "default";
228 vmmc-supply = <&vcc_sdhi0>;
229 vqmmc-supply = <&vccq_sdhi0>;
230 cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
235 pinctrl-0 = <&sdhi2_pins>;
236 pinctrl-names = "default";
238 vmmc-supply = <&vcc_sdhi2>;
239 vqmmc-supply = <&vccq_sdhi2>;
240 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;