arch/arm/boot/dts/r8a7778.dtsi

   1 /*
   2  * Device Tree Source for Renesas r8a7778
   3  *
   4  * Copyright (C) 2013  Renesas Solutions Corp.
   5  * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
   6  *
   7  * based on r8a7779
   8  *
   9  * Copyright (C) 2013 Renesas Solutions Corp.
  10  * Copyright (C) 2013 Simon Horman
  11  *
  12  * This file is licensed under the terms of the GNU General Public License
  13  * version 2.  This program is licensed "as is" without any warranty of any
  14  * kind, whether express or implied.
  15  */
  16
  17 /include/ "skeleton.dtsi"
  18
  19 #include <dt-bindings/interrupt-controller/irq.h>
  20
  21 / {
  22         compatible = "renesas,r8a7778";
  23
  24         cpus {
  25                 cpu@0 {
  26                         compatible = "arm,cortex-a9";
  27                 };
  28         };
  29
  30         aliases {
  31                 spi0 = &hspi0;
  32                 spi1 = &hspi1;
  33                 spi2 = &hspi2;
  34         };
  35
  36         gic: interrupt-controller@fe438000 {
  37                 compatible = "arm,cortex-a9-gic";
  38                 #interrupt-cells = <3>;
  39                 interrupt-controller;
  40                 reg = <0xfe438000 0x1000>,
  41                       <0xfe430000 0x100>;
  42         };
  43
  44         /* irqpin: IRQ0 - IRQ3 */
  45         irqpin: irqpin@fe78001c {
  46                 compatible = "renesas,intc-irqpin-r8a7778", "renesas,intc-irqpin";
  47                 #interrupt-cells = <2>;
  48                 interrupt-controller;
  49                 status = "disabled"; /* default off */
  50                 reg =   <0xfe78001c 4>,
  51                         <0xfe780010 4>,
  52                         <0xfe780024 4>,
  53                         <0xfe780044 4>,
  54                         <0xfe780064 4>;
  55                 interrupt-parent = <&gic>;
  56                 interrupts =   <0 27 IRQ_TYPE_LEVEL_HIGH
  57                                 0 28 IRQ_TYPE_LEVEL_HIGH
  58                                 0 29 IRQ_TYPE_LEVEL_HIGH
  59                                 0 30 IRQ_TYPE_LEVEL_HIGH>;
  60                 sense-bitfield-width = <2>;
  61         };
  62
  63         gpio0: gpio@ffc40000 {
  64                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  65                 reg = <0xffc40000 0x2c>;
  66                 interrupt-parent = <&gic>;
  67                 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
  68                 #gpio-cells = <2>;
  69                 gpio-controller;
  70                 gpio-ranges = <&pfc 0 0 32>;
  71                 #interrupt-cells = <2>;
  72                 interrupt-controller;
  73         };
  74
  75         gpio1: gpio@ffc41000 {
  76                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  77                 reg = <0xffc41000 0x2c>;
  78                 interrupt-parent = <&gic>;
  79                 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
  80                 #gpio-cells = <2>;
  81                 gpio-controller;
  82                 gpio-ranges = <&pfc 0 32 32>;
  83                 #interrupt-cells = <2>;
  84                 interrupt-controller;
  85         };
  86
  87         gpio2: gpio@ffc42000 {
  88                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  89                 reg = <0xffc42000 0x2c>;
  90                 interrupt-parent = <&gic>;
  91                 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
  92                 #gpio-cells = <2>;
  93                 gpio-controller;
  94                 gpio-ranges = <&pfc 0 64 32>;
  95                 #interrupt-cells = <2>;
  96                 interrupt-controller;
  97         };
  98
  99         gpio3: gpio@ffc43000 {
 100                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
 101                 reg = <0xffc43000 0x2c>;
 102                 interrupt-parent = <&gic>;
 103                 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
 104                 #gpio-cells = <2>;
 105                 gpio-controller;
 106                 gpio-ranges = <&pfc 0 96 32>;
 107                 #interrupt-cells = <2>;
 108                 interrupt-controller;
 109         };
 110
 111         gpio4: gpio@ffc44000 {
 112                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
 113                 reg = <0xffc44000 0x2c>;
 114                 interrupt-parent = <&gic>;
 115                 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
 116                 #gpio-cells = <2>;
 117                 gpio-controller;
 118                 gpio-ranges = <&pfc 0 128 27>;
 119                 #interrupt-cells = <2>;
 120                 interrupt-controller;
 121         };
 122
 123         pfc: pfc@fffc0000 {
 124                 compatible = "renesas,pfc-r8a7778";
 125                 reg = <0xfffc0000 0x118>;
 126         };
 127
 128         i2c0: i2c@ffc70000 {
 129                 #address-cells = <1>;
 130                 #size-cells = <0>;
 131                 compatible = "renesas,i2c-r8a7778";
 132                 reg = <0xffc70000 0x1000>;
 133                 interrupt-parent = <&gic>;
 134                 interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
 135                 status = "disabled";
 136         };
 137
 138         i2c1: i2c@ffc71000 {
 139                 #address-cells = <1>;
 140                 #size-cells = <0>;
 141                 compatible = "renesas,i2c-r8a7778";
 142                 reg = <0xffc71000 0x1000>;
 143                 interrupt-parent = <&gic>;
 144                 interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
 145                 status = "disabled";
 146         };
 147
 148         i2c2: i2c@ffc72000 {
 149                 #address-cells = <1>;
 150                 #size-cells = <0>;
 151                 compatible = "renesas,i2c-r8a7778";
 152                 reg = <0xffc72000 0x1000>;
 153                 interrupt-parent = <&gic>;
 154                 interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
 155                 status = "disabled";
 156         };
 157
 158         i2c3: i2c@ffc73000 {
 159                 #address-cells = <1>;
 160                 #size-cells = <0>;
 161                 compatible = "renesas,i2c-r8a7778";
 162                 reg = <0xffc73000 0x1000>;
 163                 interrupt-parent = <&gic>;
 164                 interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
 165                 status = "disabled";
 166         };
 167
 168         mmcif: mmc@ffe4e000 {
 169                 compatible = "renesas,sh-mmcif";
 170                 reg = <0xffe4e000 0x100>;
 171                 interrupt-parent = <&gic>;
 172                 interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
 173                 status = "disabled";
 174         };
 175
 176         sdhi0: sd@ffe4c000 {
 177                 compatible = "renesas,sdhi-r8a7778";
 178                 reg = <0xffe4c000 0x100>;
 179                 interrupt-parent = <&gic>;
 180                 interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>;
 181                 cap-sd-highspeed;
 182                 cap-sdio-irq;
 183                 status = "disabled";
 184         };
 185
 186         sdhi1: sd@ffe4d000 {
 187                 compatible = "renesas,sdhi-r8a7778";
 188                 reg = <0xffe4d000 0x100>;
 189                 interrupt-parent = <&gic>;
 190                 interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
 191                 cap-sd-highspeed;
 192                 cap-sdio-irq;
 193                 status = "disabled";
 194         };
 195
 196         sdhi2: sd@ffe4f000 {
 197                 compatible = "renesas,sdhi-r8a7778";
 198                 reg = <0xffe4f000 0x100>;
 199                 interrupt-parent = <&gic>;
 200                 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
 201                 cap-sd-highspeed;
 202                 cap-sdio-irq;
 203                 status = "disabled";
 204         };
 205
 206         i2c0: i2c@ffc70000 {
 207                 #address-cells = <1>;
 208                 #size-cells = <0>;
 209                 compatible = "renesas,i2c-r8a7778";
 210                 reg = <0xffc70000 0x1000>;
 211                 interrupt-parent = <&gic>;
 212                 interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
 213                 status = "disabled";
 214         };
 215
 216         i2c1: i2c@ffc71000 {
 217                 #address-cells = <1>;
 218                 #size-cells = <0>;
 219                 compatible = "renesas,i2c-r8a7778";
 220                 reg = <0xffc71000 0x1000>;
 221                 interrupt-parent = <&gic>;
 222                 interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
 223                 status = "disabled";
 224         };
 225
 226         i2c2: i2c@ffc72000 {
 227                 #address-cells = <1>;
 228                 #size-cells = <0>;
 229                 compatible = "renesas,i2c-r8a7778";
 230                 reg = <0xffc72000 0x1000>;
 231                 interrupt-parent = <&gic>;
 232                 interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
 233                 status = "disabled";
 234         };
 235
 236         i2c3: i2c@ffc73000 {
 237                 #address-cells = <1>;
 238                 #size-cells = <0>;
 239                 compatible = "renesas,i2c-r8a7778";
 240                 reg = <0xffc73000 0x1000>;
 241                 interrupt-parent = <&gic>;
 242                 interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
 243                 status = "disabled";
 244         };
 245
 246         hspi0: spi@fffc7000 {
 247                 compatible = "renesas,hspi";
 248                 reg = <0xfffc7000 0x18>;
 249                 interrupt-controller = <&gic>;
 250                 interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
 251                 status = "disabled";
 252         };
 253
 254         hspi1: spi@fffc8000 {
 255                 compatible = "renesas,hspi";
 256                 reg = <0xfffc8000 0x18>;
 257                 interrupt-controller = <&gic>;
 258                 interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
 259                 status = "disabled";
 260         };
 261
 262         hspi2: spi@fffc6000 {
 263                 compatible = "renesas,hspi";
 264                 reg = <0xfffc6000 0x18>;
 265                 interrupt-controller = <&gic>;
 266                 interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
 267                 status = "disabled";
 268         };
 269 };