arch/arm/boot/dts/r8a73a4.dtsi

   1 /*
   2  * Device Tree Source for the r8a73a4 SoC
   3  *
   4  * Copyright (C) 2013 Renesas Solutions Corp.
   5  * Copyright (C) 2013 Magnus Damm
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/interrupt-controller/irq.h>
  14
  15 / {
  16         compatible = "renesas,r8a73a4";
  17         interrupt-parent = <&gic>;
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20
  21         cpus {
  22                 #address-cells = <1>;
  23                 #size-cells = <0>;
  24
  25                 cpu0: cpu@0 {
  26                         device_type = "cpu";
  27                         compatible = "arm,cortex-a15";
  28                         reg = <0>;
  29                         clock-frequency = <1500000000>;
  30                 };
  31         };
  32
  33         gic: interrupt-controller@f1001000 {
  34                 compatible = "arm,cortex-a15-gic";
  35                 #interrupt-cells = <3>;
  36                 #address-cells = <0>;
  37                 interrupt-controller;
  38                 reg = <0 0xf1001000 0 0x1000>,
  39                         <0 0xf1002000 0 0x1000>,
  40                         <0 0xf1004000 0 0x2000>,
  41                         <0 0xf1006000 0 0x2000>;
  42                 interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
  43         };
  44
  45         timer {
  46                 compatible = "arm,armv7-timer";
  47                 interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  48                              <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  49                              <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  50                              <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
  51         };
  52
  53         irqc0: interrupt-controller@e61c0000 {
  54                 compatible = "renesas,irqc";
  55                 #interrupt-cells = <2>;
  56                 interrupt-controller;
  57                 reg = <0 0xe61c0000 0 0x200>;
  58                 interrupt-parent = <&gic>;
  59                 interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
  60                              <0 1 IRQ_TYPE_LEVEL_HIGH>,
  61                              <0 2 IRQ_TYPE_LEVEL_HIGH>,
  62                              <0 3 IRQ_TYPE_LEVEL_HIGH>,
  63                              <0 4 IRQ_TYPE_LEVEL_HIGH>,
  64                              <0 5 IRQ_TYPE_LEVEL_HIGH>,
  65                              <0 6 IRQ_TYPE_LEVEL_HIGH>,
  66                              <0 7 IRQ_TYPE_LEVEL_HIGH>,
  67                              <0 8 IRQ_TYPE_LEVEL_HIGH>,
  68                              <0 9 IRQ_TYPE_LEVEL_HIGH>,
  69                              <0 10 IRQ_TYPE_LEVEL_HIGH>,
  70                              <0 11 IRQ_TYPE_LEVEL_HIGH>,
  71                              <0 12 IRQ_TYPE_LEVEL_HIGH>,
  72                              <0 13 IRQ_TYPE_LEVEL_HIGH>,
  73                              <0 14 IRQ_TYPE_LEVEL_HIGH>,
  74                              <0 15 IRQ_TYPE_LEVEL_HIGH>,
  75                              <0 16 IRQ_TYPE_LEVEL_HIGH>,
  76                              <0 17 IRQ_TYPE_LEVEL_HIGH>,
  77                              <0 18 IRQ_TYPE_LEVEL_HIGH>,
  78                              <0 19 IRQ_TYPE_LEVEL_HIGH>,
  79                              <0 20 IRQ_TYPE_LEVEL_HIGH>,
  80                              <0 21 IRQ_TYPE_LEVEL_HIGH>,
  81                              <0 22 IRQ_TYPE_LEVEL_HIGH>,
  82                              <0 23 IRQ_TYPE_LEVEL_HIGH>,
  83                              <0 24 IRQ_TYPE_LEVEL_HIGH>,
  84                              <0 25 IRQ_TYPE_LEVEL_HIGH>,
  85                              <0 26 IRQ_TYPE_LEVEL_HIGH>,
  86                              <0 27 IRQ_TYPE_LEVEL_HIGH>,
  87                              <0 28 IRQ_TYPE_LEVEL_HIGH>,
  88                              <0 29 IRQ_TYPE_LEVEL_HIGH>,
  89                              <0 30 IRQ_TYPE_LEVEL_HIGH>,
  90                              <0 31 IRQ_TYPE_LEVEL_HIGH>;
  91         };
  92
  93         irqc1: interrupt-controller@e61c0200 {
  94                 compatible = "renesas,irqc";
  95                 #interrupt-cells = <2>;
  96                 interrupt-controller;
  97                 reg = <0 0xe61c0200 0 0x200>;
  98                 interrupt-parent = <&gic>;
  99                 interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
 100                              <0 33 IRQ_TYPE_LEVEL_HIGH>,
 101                              <0 34 IRQ_TYPE_LEVEL_HIGH>,
 102                              <0 35 IRQ_TYPE_LEVEL_HIGH>,
 103                              <0 36 IRQ_TYPE_LEVEL_HIGH>,
 104                              <0 37 IRQ_TYPE_LEVEL_HIGH>,
 105                              <0 38 IRQ_TYPE_LEVEL_HIGH>,
 106                              <0 39 IRQ_TYPE_LEVEL_HIGH>,
 107                              <0 40 IRQ_TYPE_LEVEL_HIGH>,
 108                              <0 41 IRQ_TYPE_LEVEL_HIGH>,
 109                              <0 42 IRQ_TYPE_LEVEL_HIGH>,
 110                              <0 43 IRQ_TYPE_LEVEL_HIGH>,
 111                              <0 44 IRQ_TYPE_LEVEL_HIGH>,
 112                              <0 45 IRQ_TYPE_LEVEL_HIGH>,
 113                              <0 46 IRQ_TYPE_LEVEL_HIGH>,
 114                              <0 47 IRQ_TYPE_LEVEL_HIGH>,
 115                              <0 48 IRQ_TYPE_LEVEL_HIGH>,
 116                              <0 49 IRQ_TYPE_LEVEL_HIGH>,
 117                              <0 50 IRQ_TYPE_LEVEL_HIGH>,
 118                              <0 51 IRQ_TYPE_LEVEL_HIGH>,
 119                              <0 52 IRQ_TYPE_LEVEL_HIGH>,
 120                              <0 53 IRQ_TYPE_LEVEL_HIGH>,
 121                              <0 54 IRQ_TYPE_LEVEL_HIGH>,
 122                              <0 55 IRQ_TYPE_LEVEL_HIGH>,
 123                              <0 56 IRQ_TYPE_LEVEL_HIGH>,
 124                              <0 57 IRQ_TYPE_LEVEL_HIGH>;
 125         };
 126
 127         dmac: dma-multiplexer@0 {
 128                 compatible = "renesas,shdma-mux";
 129                 #dma-cells = <1>;
 130                 dma-channels = <20>;
 131                 dma-requests = <256>;
 132                 #address-cells = <2>;
 133                 #size-cells = <2>;
 134                 ranges;
 135
 136                 dma0: dma-controller@e6700020 {
 137                         compatible = "renesas,shdma-r8a73a4";
 138                         reg = <0 0xe6700020 0 0x89e0>;
 139                         interrupt-parent = <&gic>;
 140                         interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
 141                                         0 200 IRQ_TYPE_LEVEL_HIGH
 142                                         0 201 IRQ_TYPE_LEVEL_HIGH
 143                                         0 202 IRQ_TYPE_LEVEL_HIGH
 144                                         0 203 IRQ_TYPE_LEVEL_HIGH
 145                                         0 204 IRQ_TYPE_LEVEL_HIGH
 146                                         0 205 IRQ_TYPE_LEVEL_HIGH
 147                                         0 206 IRQ_TYPE_LEVEL_HIGH
 148                                         0 207 IRQ_TYPE_LEVEL_HIGH
 149                                         0 208 IRQ_TYPE_LEVEL_HIGH
 150                                         0 209 IRQ_TYPE_LEVEL_HIGH
 151                                         0 210 IRQ_TYPE_LEVEL_HIGH
 152                                         0 211 IRQ_TYPE_LEVEL_HIGH
 153                                         0 212 IRQ_TYPE_LEVEL_HIGH
 154                                         0 213 IRQ_TYPE_LEVEL_HIGH
 155                                         0 214 IRQ_TYPE_LEVEL_HIGH
 156                                         0 215 IRQ_TYPE_LEVEL_HIGH
 157                                         0 216 IRQ_TYPE_LEVEL_HIGH
 158                                         0 217 IRQ_TYPE_LEVEL_HIGH
 159                                         0 218 IRQ_TYPE_LEVEL_HIGH
 160                                         0 219 IRQ_TYPE_LEVEL_HIGH>;
 161                         interrupt-names = "error",
 162                                         "ch0", "ch1", "ch2", "ch3",
 163                                         "ch4", "ch5", "ch6", "ch7",
 164                                         "ch8", "ch9", "ch10", "ch11",
 165                                         "ch12", "ch13", "ch14", "ch15",
 166                                         "ch16", "ch17", "ch18", "ch19";
 167                 };
 168         };
 169
 170         thermal@e61f0000 {
 171                 compatible = "renesas,rcar-thermal";
 172                 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
 173                          <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;
 174                 interrupt-parent = <&gic>;
 175                 interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
 176         };
 177
 178         i2c0: i2c@e6500000 {
 179                 #address-cells = <1>;
 180                 #size-cells = <0>;
 181                 compatible = "renesas,rmobile-iic";
 182                 reg = <0 0xe6500000 0 0x428>;
 183                 interrupt-parent = <&gic>;
 184                 interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
 185                 status = "disabled";
 186         };
 187
 188         i2c1: i2c@e6510000 {
 189                 #address-cells = <1>;
 190                 #size-cells = <0>;
 191                 compatible = "renesas,rmobile-iic";
 192                 reg = <0 0xe6510000 0 0x428>;
 193                 interrupt-parent = <&gic>;
 194                 interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
 195                 status = "disabled";
 196         };
 197
 198         i2c2: i2c@e6520000 {
 199                 #address-cells = <1>;
 200                 #size-cells = <0>;
 201                 compatible = "renesas,rmobile-iic";
 202                 reg = <0 0xe6520000 0 0x428>;
 203                 interrupt-parent = <&gic>;
 204                 interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
 205                 status = "disabled";
 206         };
 207
 208         i2c3: i2c@e6530000 {
 209                 #address-cells = <1>;
 210                 #size-cells = <0>;
 211                 compatible = "renesas,rmobile-iic";
 212                 reg = <0 0xe6530000 0 0x428>;
 213                 interrupt-parent = <&gic>;
 214                 interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>;
 215                 status = "disabled";
 216         };
 217
 218         i2c4: i2c@e6540000 {
 219                 #address-cells = <1>;
 220                 #size-cells = <0>;
 221                 compatible = "renesas,rmobile-iic";
 222                 reg = <0 0xe6540000 0 0x428>;
 223                 interrupt-parent = <&gic>;
 224                 interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>;
 225                 status = "disabled";
 226         };
 227
 228         i2c5: i2c@e60b0000 {
 229                 #address-cells = <1>;
 230                 #size-cells = <0>;
 231                 compatible = "renesas,rmobile-iic";
 232                 reg = <0 0xe60b0000 0 0x428>;
 233                 interrupt-parent = <&gic>;
 234                 interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>;
 235                 status = "disabled";
 236         };
 237
 238         i2c6: i2c@e6550000 {
 239                 #address-cells = <1>;
 240                 #size-cells = <0>;
 241                 compatible = "renesas,rmobile-iic";
 242                 reg = <0 0xe6550000 0 0x428>;
 243                 interrupt-parent = <&gic>;
 244                 interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
 245                 status = "disabled";
 246         };
 247
 248         i2c7: i2c@e6560000 {
 249                 #address-cells = <1>;
 250                 #size-cells = <0>;
 251                 compatible = "renesas,rmobile-iic";
 252                 reg = <0 0xe6560000 0 0x428>;
 253                 interrupt-parent = <&gic>;
 254                 interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>;
 255                 status = "disabled";
 256         };
 257
 258         i2c8: i2c@e6570000 {
 259                 #address-cells = <1>;
 260                 #size-cells = <0>;
 261                 compatible = "renesas,rmobile-iic";
 262                 reg = <0 0xe6570000 0 0x428>;
 263                 interrupt-parent = <&gic>;
 264                 interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
 265                 status = "disabled";
 266         };
 267
 268         mmcif0: mmc@ee200000 {
 269                 compatible = "renesas,sh-mmcif";
 270                 reg = <0 0xee200000 0 0x80>;
 271                 interrupt-parent = <&gic>;
 272                 interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
 273                 reg-io-width = <4>;
 274                 status = "disabled";
 275         };
 276
 277         mmcif1: mmc@ee220000 {
 278                 compatible = "renesas,sh-mmcif";
 279                 reg = <0 0xee220000 0 0x80>;
 280                 interrupt-parent = <&gic>;
 281                 interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
 282                 reg-io-width = <4>;
 283                 status = "disabled";
 284         };
 285
 286         pfc: pfc@e6050000 {
 287                 compatible = "renesas,pfc-r8a73a4";
 288                 reg = <0 0xe6050000 0 0x9000>;
 289                 gpio-controller;
 290                 #gpio-cells = <2>;
 291                 interrupts-extended =
 292                         <&irqc0  0 0>, <&irqc0  1 0>, <&irqc0  2 0>, <&irqc0  3 0>,
 293                         <&irqc0  4 0>, <&irqc0  5 0>, <&irqc0  6 0>, <&irqc0  7 0>,
 294                         <&irqc0  8 0>, <&irqc0  9 0>, <&irqc0 10 0>, <&irqc0 11 0>,
 295                         <&irqc0 12 0>, <&irqc0 13 0>, <&irqc0 14 0>, <&irqc0 15 0>,
 296                         <&irqc0 16 0>, <&irqc0 17 0>, <&irqc0 18 0>, <&irqc0 19 0>,
 297                         <&irqc0 20 0>, <&irqc0 21 0>, <&irqc0 22 0>, <&irqc0 23 0>,
 298                         <&irqc0 24 0>, <&irqc0 25 0>, <&irqc0 26 0>, <&irqc0 27 0>,
 299                         <&irqc0 28 0>, <&irqc0 29 0>, <&irqc0 30 0>, <&irqc0 31 0>,
 300                         <&irqc1  0 0>, <&irqc1  1 0>, <&irqc1  2 0>, <&irqc1  3 0>,
 301                         <&irqc1  4 0>, <&irqc1  5 0>, <&irqc1  6 0>, <&irqc1  7 0>,
 302                         <&irqc1  8 0>, <&irqc1  9 0>, <&irqc1 10 0>, <&irqc1 11 0>,
 303                         <&irqc1 12 0>, <&irqc1 13 0>, <&irqc1 14 0>, <&irqc1 15 0>,
 304                         <&irqc1 16 0>, <&irqc1 17 0>, <&irqc1 18 0>, <&irqc1 19 0>,
 305                         <&irqc1 20 0>, <&irqc1 21 0>, <&irqc1 22 0>, <&irqc1 23 0>,
 306                         <&irqc1 24 0>, <&irqc1 25 0>;
 307         };
 308
 309         sdhi0: sd@ee100000 {
 310                 compatible = "renesas,sdhi-r8a73a4";
 311                 reg = <0 0xee100000 0 0x100>;
 312                 interrupt-parent = <&gic>;
 313                 interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
 314                 cap-sd-highspeed;
 315                 status = "disabled";
 316         };
 317
 318         sdhi1: sd@ee120000 {
 319                 compatible = "renesas,sdhi-r8a73a4";
 320                 reg = <0 0xee120000 0 0x100>;
 321                 interrupt-parent = <&gic>;
 322                 interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
 323                 cap-sd-highspeed;
 324                 status = "disabled";
 325         };
 326
 327         sdhi2: sd@ee140000 {
 328                 compatible = "renesas,sdhi-r8a73a4";
 329                 reg = <0 0xee140000 0 0x100>;
 330                 interrupt-parent = <&gic>;
 331                 interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
 332                 cap-sd-highspeed;
 333                 status = "disabled";
 334         };
 335 };