arch/arm/boot/dts/r7s72100.dtsi

   1 /*
   2  * Device Tree Source for the r7s72100 SoC
   3  *
   4  * Copyright (C) 2013-14 Renesas Solutions Corp.
   5  * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 #include <dt-bindings/clock/r7s72100-clock.h>
  13 #include <dt-bindings/interrupt-controller/irq.h>
  14
  15 / {
  16         compatible = "renesas,r7s72100";
  17         interrupt-parent = <&gic>;
  18         #address-cells = <1>;
  19         #size-cells = <1>;
  20
  21         aliases {
  22                 i2c0 = &i2c0;
  23                 i2c1 = &i2c1;
  24                 i2c2 = &i2c2;
  25                 i2c3 = &i2c3;
  26                 spi0 = &spi0;
  27                 spi1 = &spi1;
  28                 spi2 = &spi2;
  29                 spi3 = &spi3;
  30                 spi4 = &spi4;
  31         };
  32
  33         clocks {
  34                 ranges;
  35                 #address-cells = <1>;
  36                 #size-cells = <1>;
  37
  38                 /* External clocks */
  39                 extal_clk: extal_clk {
  40                         #clock-cells = <0>;
  41                         compatible = "fixed-clock";
  42                         /* If clk present, value must be set by board */
  43                         clock-frequency = <0>;
  44                         clock-output-names = "extal";
  45                 };
  46
  47                 usb_x1_clk: usb_x1_clk {
  48                         #clock-cells = <0>;
  49                         compatible = "fixed-clock";
  50                         /* If clk present, value must be set by board */
  51                         clock-frequency = <0>;
  52                         clock-output-names = "usb_x1";
  53                 };
  54
  55                 /* Special CPG clocks */
  56                 cpg_clocks: cpg_clocks@fcfe0000 {
  57                         #clock-cells = <1>;
  58                         compatible = "renesas,r7s72100-cpg-clocks",
  59                                      "renesas,rz-cpg-clocks";
  60                         reg = <0xfcfe0000 0x18>;
  61                         clocks = <&extal_clk>, <&usb_x1_clk>;
  62                         clock-output-names = "pll", "i", "g";
  63                 };
  64
  65                 /* Fixed factor clocks */
  66                 b_clk: b_clk {
  67                         #clock-cells = <0>;
  68                         compatible = "fixed-factor-clock";
  69                         clocks = <&cpg_clocks R7S72100_CLK_PLL>;
  70                         clock-mult = <1>;
  71                         clock-div = <3>;
  72                         clock-output-names = "b";
  73                 };
  74                 p1_clk: p1_clk {
  75                         #clock-cells = <0>;
  76                         compatible = "fixed-factor-clock";
  77                         clocks = <&cpg_clocks R7S72100_CLK_PLL>;
  78                         clock-mult = <1>;
  79                         clock-div = <6>;
  80                         clock-output-names = "p1";
  81                 };
  82                 p0_clk: p0_clk {
  83                         #clock-cells = <0>;
  84                         compatible = "fixed-factor-clock";
  85                         clocks = <&cpg_clocks R7S72100_CLK_PLL>;
  86                         clock-mult = <1>;
  87                         clock-div = <12>;
  88                         clock-output-names = "p0";
  89                 };
  90
  91                 /* MSTP clocks */
  92                 mstp3_clks: mstp3_clks@fcfe0420 {
  93                         #clock-cells = <1>;
  94                         compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
  95                         reg = <0xfcfe0420 4>;
  96                         clocks = <&p0_clk>;
  97                         clock-indices = <R7S72100_CLK_MTU2>;
  98                         clock-output-names = "mtu2";
  99                 };
 100
 101                 mstp4_clks: mstp4_clks@fcfe0424 {
 102                         #clock-cells = <1>;
 103                         compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
 104                         reg = <0xfcfe0424 4>;
 105                         clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
 106                                  <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>;
 107                         clock-indices = <
 108                                 R7S72100_CLK_SCIF0 R7S72100_CLK_SCIF1 R7S72100_CLK_SCIF2 R7S72100_CLK_SCIF3
 109                                 R7S72100_CLK_SCIF4 R7S72100_CLK_SCIF5 R7S72100_CLK_SCIF6 R7S72100_CLK_SCIF7
 110                         >;
 111                         clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
 112                 };
 113         };
 114
 115         cpus {
 116                 #address-cells = <1>;
 117                 #size-cells = <0>;
 118
 119                 cpu@0 {
 120                         device_type = "cpu";
 121                         compatible = "arm,cortex-a9";
 122                         reg = <0>;
 123                 };
 124         };
 125
 126         gic: interrupt-controller@e8201000 {
 127                 compatible = "arm,cortex-a9-gic";
 128                 #interrupt-cells = <3>;
 129                 #address-cells = <0>;
 130                 interrupt-controller;
 131                 reg = <0xe8201000 0x1000>,
 132                         <0xe8202000 0x1000>;
 133         };
 134
 135         i2c0: i2c@fcfee000 {
 136                 #address-cells = <1>;
 137                 #size-cells = <0>;
 138                 compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
 139                 reg = <0xfcfee000 0x44>;
 140                 interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>,
 141                              <0 158 IRQ_TYPE_EDGE_RISING>,
 142                              <0 159 IRQ_TYPE_EDGE_RISING>,
 143                              <0 160 IRQ_TYPE_LEVEL_HIGH>,
 144                              <0 161 IRQ_TYPE_LEVEL_HIGH>,
 145                              <0 162 IRQ_TYPE_LEVEL_HIGH>,
 146                              <0 163 IRQ_TYPE_LEVEL_HIGH>,
 147                              <0 164 IRQ_TYPE_LEVEL_HIGH>;
 148                 clock-frequency = <100000>;
 149                 status = "disabled";
 150         };
 151
 152         i2c1: i2c@fcfee400 {
 153                 #address-cells = <1>;
 154                 #size-cells = <0>;
 155                 compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
 156                 reg = <0xfcfee400 0x44>;
 157                 interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>,
 158                              <0 166 IRQ_TYPE_EDGE_RISING>,
 159                              <0 167 IRQ_TYPE_EDGE_RISING>,
 160                              <0 168 IRQ_TYPE_LEVEL_HIGH>,
 161                              <0 169 IRQ_TYPE_LEVEL_HIGH>,
 162                              <0 170 IRQ_TYPE_LEVEL_HIGH>,
 163                              <0 171 IRQ_TYPE_LEVEL_HIGH>,
 164                              <0 172 IRQ_TYPE_LEVEL_HIGH>;
 165                 clock-frequency = <100000>;
 166                 status = "disabled";
 167         };
 168
 169         i2c2: i2c@fcfee800 {
 170                 #address-cells = <1>;
 171                 #size-cells = <0>;
 172                 compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
 173                 reg = <0xfcfee800 0x44>;
 174                 interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>,
 175                              <0 174 IRQ_TYPE_EDGE_RISING>,
 176                              <0 175 IRQ_TYPE_EDGE_RISING>,
 177                              <0 176 IRQ_TYPE_LEVEL_HIGH>,
 178                              <0 177 IRQ_TYPE_LEVEL_HIGH>,
 179                              <0 178 IRQ_TYPE_LEVEL_HIGH>,
 180                              <0 179 IRQ_TYPE_LEVEL_HIGH>,
 181                              <0 180 IRQ_TYPE_LEVEL_HIGH>;
 182                 clock-frequency = <100000>;
 183                 status = "disabled";
 184         };
 185
 186         i2c3: i2c@fcfeec00 {
 187                 #address-cells = <1>;
 188                 #size-cells = <0>;
 189                 compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
 190                 reg = <0xfcfeec00 0x44>;
 191                 interrupts = <0 181 IRQ_TYPE_LEVEL_HIGH>,
 192                              <0 182 IRQ_TYPE_EDGE_RISING>,
 193                              <0 183 IRQ_TYPE_EDGE_RISING>,
 194                              <0 184 IRQ_TYPE_LEVEL_HIGH>,
 195                              <0 185 IRQ_TYPE_LEVEL_HIGH>,
 196                              <0 186 IRQ_TYPE_LEVEL_HIGH>,
 197                              <0 187 IRQ_TYPE_LEVEL_HIGH>,
 198                              <0 188 IRQ_TYPE_LEVEL_HIGH>;
 199                 clock-frequency = <100000>;
 200                 status = "disabled";
 201         };
 202
 203         spi0: spi@e800c800 {
 204                 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
 205                 reg = <0xe800c800 0x24>;
 206                 interrupts = <0 238 IRQ_TYPE_LEVEL_HIGH>,
 207                              <0 239 IRQ_TYPE_LEVEL_HIGH>,
 208                              <0 240 IRQ_TYPE_LEVEL_HIGH>;
 209                 interrupt-names = "error", "rx", "tx";
 210                 num-cs = <1>;
 211                 #address-cells = <1>;
 212                 #size-cells = <0>;
 213                 status = "disabled";
 214         };
 215
 216         spi1: spi@e800d000 {
 217                 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
 218                 reg = <0xe800d000 0x24>;
 219                 interrupts = <0 241 IRQ_TYPE_LEVEL_HIGH>,
 220                              <0 242 IRQ_TYPE_LEVEL_HIGH>,
 221                              <0 243 IRQ_TYPE_LEVEL_HIGH>;
 222                 interrupt-names = "error", "rx", "tx";
 223                 num-cs = <1>;
 224                 #address-cells = <1>;
 225                 #size-cells = <0>;
 226                 status = "disabled";
 227         };
 228
 229         spi2: spi@e800d800 {
 230                 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
 231                 reg = <0xe800d800 0x24>;
 232                 interrupts = <0 244 IRQ_TYPE_LEVEL_HIGH>,
 233                              <0 245 IRQ_TYPE_LEVEL_HIGH>,
 234                              <0 246 IRQ_TYPE_LEVEL_HIGH>;
 235                 interrupt-names = "error", "rx", "tx";
 236                 num-cs = <1>;
 237                 #address-cells = <1>;
 238                 #size-cells = <0>;
 239                 status = "disabled";
 240         };
 241
 242         spi3: spi@e800e000 {
 243                 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
 244                 reg = <0xe800e000 0x24>;
 245                 interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>,
 246                              <0 248 IRQ_TYPE_LEVEL_HIGH>,
 247                              <0 249 IRQ_TYPE_LEVEL_HIGH>;
 248                 interrupt-names = "error", "rx", "tx";
 249                 num-cs = <1>;
 250                 #address-cells = <1>;
 251                 #size-cells = <0>;
 252                 status = "disabled";
 253         };
 254
 255         spi4: spi@e800e800 {
 256                 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
 257                 reg = <0xe800e800 0x24>;
 258                 interrupts = <0 250 IRQ_TYPE_LEVEL_HIGH>,
 259                              <0 251 IRQ_TYPE_LEVEL_HIGH>,
 260                              <0 252 IRQ_TYPE_LEVEL_HIGH>;
 261                 interrupt-names = "error", "rx", "tx";
 262                 num-cs = <1>;
 263                 #address-cells = <1>;
 264                 #size-cells = <0>;
 265                 status = "disabled";
 266         };
 267 };