2 * DTS file for CSR SiRFprimaII SoC
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
9 /include/ "skeleton.dtsi"
11 compatible = "sirf,prima2";
14 interrupt-parent = <&intc>;
21 compatible = "arm,cortex-a9";
24 d-cache-line-size = <32>;
25 i-cache-line-size = <32>;
26 d-cache-size = <32768>;
27 i-cache-size = <32768>;
29 timebase-frequency = <0>;
31 clock-frequency = <0>;
36 compatible = "simple-bus";
39 ranges = <0x40000000 0x40000000 0x80000000>;
41 l2-cache-controller@80040000 {
42 compatible = "arm,pl310-cache", "sirf,prima2-pl310-cache";
43 reg = <0x80040000 0x1000>;
45 arm,tag-latency = <1 1 1>;
46 arm,data-latency = <1 1 1>;
47 arm,filter-ranges = <0 0x40000000>;
50 intc: interrupt-controller@80020000 {
51 #interrupt-cells = <1>;
53 compatible = "sirf,prima2-intc";
54 reg = <0x80020000 0x1000>;
58 compatible = "simple-bus";
61 ranges = <0x88000000 0x88000000 0x40000>;
63 clks: clock-controller@88000000 {
64 compatible = "sirf,prima2-clkc";
65 reg = <0x88000000 0x1000>;
70 reset-controller@88010000 {
71 compatible = "sirf,prima2-rstc";
72 reg = <0x88010000 0x1000>;
75 rsc-controller@88020000 {
76 compatible = "sirf,prima2-rsc";
77 reg = <0x88020000 0x1000>;
82 compatible = "simple-bus";
85 ranges = <0x90000000 0x90000000 0x10000>;
87 memory-controller@90000000 {
88 compatible = "sirf,prima2-memc";
89 reg = <0x90000000 0x10000>;
96 compatible = "simple-bus";
99 ranges = <0x90010000 0x90010000 0x30000>;
102 compatible = "sirf,prima2-lcd";
103 reg = <0x90010000 0x20000>;
108 compatible = "sirf,prima2-vpp";
109 reg = <0x90020000 0x10000>;
116 compatible = "simple-bus";
117 #address-cells = <1>;
119 ranges = <0x98000000 0x98000000 0x8000000>;
122 compatible = "powervr,sgx531";
123 reg = <0x98000000 0x8000000>;
130 compatible = "simple-bus";
131 #address-cells = <1>;
133 ranges = <0xa0000000 0xa0000000 0x8000000>;
135 multimedia@a0000000 {
136 compatible = "sirf,prima2-video-codec";
137 reg = <0xa0000000 0x8000000>;
144 compatible = "simple-bus";
145 #address-cells = <1>;
147 ranges = <0xa8000000 0xa8000000 0x2000000>;
150 compatible = "sirf,prima2-dspif";
151 reg = <0xa8000000 0x10000>;
156 compatible = "sirf,prima2-gps";
157 reg = <0xa8010000 0x10000>;
163 compatible = "sirf,prima2-dsp";
164 reg = <0xa9000000 0x1000000>;
171 compatible = "simple-bus";
172 #address-cells = <1>;
174 ranges = <0xb0000000 0xb0000000 0x180000>,
175 <0x56000000 0x56000000 0x1b00000>;
178 compatible = "sirf,prima2-tick";
179 reg = <0xb0020000 0x1000>;
184 compatible = "sirf,prima2-nand";
185 reg = <0xb0030000 0x10000>;
191 compatible = "sirf,prima2-audio";
192 reg = <0xb0040000 0x10000>;
197 uart0: uart@b0050000 {
199 compatible = "sirf,prima2-uart";
200 reg = <0xb0050000 0x1000>;
204 sirf,uart-dma-rx-channel = <21>;
205 sirf,uart-dma-tx-channel = <2>;
208 uart1: uart@b0060000 {
210 compatible = "sirf,prima2-uart";
211 reg = <0xb0060000 0x1000>;
217 uart2: uart@b0070000 {
219 compatible = "sirf,prima2-uart";
220 reg = <0xb0070000 0x1000>;
224 sirf,uart-dma-rx-channel = <6>;
225 sirf,uart-dma-tx-channel = <7>;
230 compatible = "sirf,prima2-usp";
231 reg = <0xb0080000 0x10000>;
235 sirf,usp-dma-rx-channel = <17>;
236 sirf,usp-dma-tx-channel = <18>;
241 compatible = "sirf,prima2-usp";
242 reg = <0xb0090000 0x10000>;
246 sirf,usp-dma-rx-channel = <14>;
247 sirf,usp-dma-tx-channel = <15>;
252 compatible = "sirf,prima2-usp";
253 reg = <0xb00a0000 0x10000>;
257 sirf,usp-dma-rx-channel = <10>;
258 sirf,usp-dma-tx-channel = <11>;
261 dmac0: dma-controller@b00b0000 {
263 compatible = "sirf,prima2-dmac";
264 reg = <0xb00b0000 0x10000>;
269 dmac1: dma-controller@b0160000 {
271 compatible = "sirf,prima2-dmac";
272 reg = <0xb0160000 0x10000>;
278 compatible = "sirf,prima2-vip";
279 reg = <0xb00C0000 0x10000>;
285 compatible = "sirf,prima2-spi";
286 reg = <0xb00d0000 0x10000>;
293 compatible = "sirf,prima2-spi";
294 reg = <0xb0170000 0x10000>;
301 compatible = "sirf,prima2-i2c";
302 reg = <0xb00e0000 0x10000>;
309 compatible = "sirf,prima2-i2c";
310 reg = <0xb00f0000 0x10000>;
316 compatible = "sirf,prima2-tsc";
317 reg = <0xb0110000 0x10000>;
322 gpio: pinctrl@b0120000 {
324 #interrupt-cells = <2>;
325 compatible = "sirf,prima2-pinctrl";
326 reg = <0xb0120000 0x10000>;
327 interrupts = <43 44 45 46 47>;
329 interrupt-controller;
331 lcd_16pins_a: lcd0@0 {
333 sirf,pins = "lcd_16bitsgrp";
334 sirf,function = "lcd_16bits";
337 lcd_18pins_a: lcd0@1 {
339 sirf,pins = "lcd_18bitsgrp";
340 sirf,function = "lcd_18bits";
343 lcd_24pins_a: lcd0@2 {
345 sirf,pins = "lcd_24bitsgrp";
346 sirf,function = "lcd_24bits";
349 lcdrom_pins_a: lcdrom0@0 {
351 sirf,pins = "lcdromgrp";
352 sirf,function = "lcdrom";
355 uart0_pins_a: uart0@0 {
357 sirf,pins = "uart0grp";
358 sirf,function = "uart0";
361 uart1_pins_a: uart1@0 {
363 sirf,pins = "uart1grp";
364 sirf,function = "uart1";
367 uart2_pins_a: uart2@0 {
369 sirf,pins = "uart2grp";
370 sirf,function = "uart2";
373 uart2_noflow_pins_a: uart2@1 {
375 sirf,pins = "uart2_nostreamctrlgrp";
376 sirf,function = "uart2_nostreamctrl";
379 spi0_pins_a: spi0@0 {
381 sirf,pins = "spi0grp";
382 sirf,function = "spi0";
385 spi1_pins_a: spi1@0 {
387 sirf,pins = "spi1grp";
388 sirf,function = "spi1";
391 i2c0_pins_a: i2c0@0 {
393 sirf,pins = "i2c0grp";
394 sirf,function = "i2c0";
397 i2c1_pins_a: i2c1@0 {
399 sirf,pins = "i2c1grp";
400 sirf,function = "i2c1";
403 pwm0_pins_a: pwm0@0 {
405 sirf,pins = "pwm0grp";
406 sirf,function = "pwm0";
409 pwm1_pins_a: pwm1@0 {
411 sirf,pins = "pwm1grp";
412 sirf,function = "pwm1";
415 pwm2_pins_a: pwm2@0 {
417 sirf,pins = "pwm2grp";
418 sirf,function = "pwm2";
421 pwm3_pins_a: pwm3@0 {
423 sirf,pins = "pwm3grp";
424 sirf,function = "pwm3";
429 sirf,pins = "gpsgrp";
430 sirf,function = "gps";
435 sirf,pins = "vipgrp";
436 sirf,function = "vip";
439 sdmmc0_pins_a: sdmmc0@0 {
441 sirf,pins = "sdmmc0grp";
442 sirf,function = "sdmmc0";
445 sdmmc1_pins_a: sdmmc1@0 {
447 sirf,pins = "sdmmc1grp";
448 sirf,function = "sdmmc1";
451 sdmmc2_pins_a: sdmmc2@0 {
453 sirf,pins = "sdmmc2grp";
454 sirf,function = "sdmmc2";
457 sdmmc3_pins_a: sdmmc3@0 {
459 sirf,pins = "sdmmc3grp";
460 sirf,function = "sdmmc3";
463 sdmmc4_pins_a: sdmmc4@0 {
465 sirf,pins = "sdmmc4grp";
466 sirf,function = "sdmmc4";
469 sdmmc5_pins_a: sdmmc5@0 {
471 sirf,pins = "sdmmc5grp";
472 sirf,function = "sdmmc5";
477 sirf,pins = "i2sgrp";
478 sirf,function = "i2s";
481 ac97_pins_a: ac97@0 {
483 sirf,pins = "ac97grp";
484 sirf,function = "ac97";
487 nand_pins_a: nand@0 {
489 sirf,pins = "nandgrp";
490 sirf,function = "nand";
493 usp0_pins_a: usp0@0 {
495 sirf,pins = "usp0grp";
496 sirf,function = "usp0";
499 usp1_pins_a: usp1@0 {
501 sirf,pins = "usp1grp";
502 sirf,function = "usp1";
505 usp2_pins_a: usp2@0 {
507 sirf,pins = "usp2grp";
508 sirf,function = "usp2";
511 usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus@0 {
513 sirf,pins = "usb0_utmi_drvbusgrp";
514 sirf,function = "usb0_utmi_drvbus";
517 usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
519 sirf,pins = "usb1_utmi_drvbusgrp";
520 sirf,function = "usb1_utmi_drvbus";
523 warm_rst_pins_a: warm_rst@0 {
525 sirf,pins = "warm_rstgrp";
526 sirf,function = "warm_rst";
529 pulse_count_pins_a: pulse_count@0 {
531 sirf,pins = "pulse_countgrp";
532 sirf,function = "pulse_count";
535 cko0_pins_a: cko0@0 {
537 sirf,pins = "cko0grp";
538 sirf,function = "cko0";
541 cko1_pins_a: cko1@0 {
543 sirf,pins = "cko1grp";
544 sirf,function = "cko1";
550 compatible = "sirf,prima2-pwm";
551 reg = <0xb0130000 0x10000>;
556 compatible = "sirf,prima2-efuse";
557 reg = <0xb0140000 0x10000>;
562 compatible = "sirf,prima2-pulsec";
563 reg = <0xb0150000 0x10000>;
569 compatible = "sirf,prima2-pciiobg", "simple-bus";
570 #address-cells = <1>;
572 ranges = <0x56000000 0x56000000 0x1b00000>;
574 sd0: sdhci@56000000 {
576 compatible = "sirf,prima2-sdhc";
577 reg = <0x56000000 0x100000>;
581 sd1: sdhci@56100000 {
583 compatible = "sirf,prima2-sdhc";
584 reg = <0x56100000 0x100000>;
588 sd2: sdhci@56200000 {
590 compatible = "sirf,prima2-sdhc";
591 reg = <0x56200000 0x100000>;
595 sd3: sdhci@56300000 {
597 compatible = "sirf,prima2-sdhc";
598 reg = <0x56300000 0x100000>;
602 sd4: sdhci@56400000 {
604 compatible = "sirf,prima2-sdhc";
605 reg = <0x56400000 0x100000>;
609 sd5: sdhci@56500000 {
611 compatible = "sirf,prima2-sdhc";
612 reg = <0x56500000 0x100000>;
617 compatible = "sirf,prima2-pcicp";
618 reg = <0x57900000 0x100000>;
622 rom-interface@57a00000 {
623 compatible = "sirf,prima2-romif";
624 reg = <0x57a00000 0x100000>;
630 compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus", "simple-bus";
631 #address-cells = <1>;
633 reg = <0x80030000 0x10000>;
636 compatible = "sirf,prima2-gpsrtc";
637 reg = <0x1000 0x1000>;
638 interrupts = <55 56 57>;
642 compatible = "sirf,prima2-sysrtc";
643 reg = <0x2000 0x1000>;
644 interrupts = <52 53 54>;
648 compatible = "sirf,prima2-pwrc";
649 reg = <0x3000 0x1000>;
655 compatible = "simple-bus";
656 #address-cells = <1>;
658 ranges = <0xb8000000 0xb8000000 0x40000>;
661 compatible = "chipidea,ci13611a-prima2";
662 reg = <0xb8000000 0x10000>;
668 compatible = "chipidea,ci13611a-prima2";
669 reg = <0xb8010000 0x10000>;
675 compatible = "synopsys,dwc-ahsata";
676 reg = <0xb8020000 0x10000>;
681 compatible = "sirf,prima2-security";
682 reg = <0xb8030000 0x10000>;