arch/arm/boot/dts/overlays/seeed-can-fd-hat-v1-overlay.dts

   1 // redo: ovmerge -c spi1-1cs-overlay.dts,cs0_pin=18,cs0_spidev=false mcp251xfd-overlay.dts,spi0-0,interrupt=25 mcp251xfd-overlay.dts,spi1-0,interrupt=24
   2
   3 // Device tree overlay for https://www.seeedstudio.com/2-Channel-CAN-BUS-FD-Shield-for-Raspberry-Pi-p-4072.html
   4
   5 /dts-v1/;
   6 /plugin/;
   7
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/interrupt-controller/irq.h>
  10 #include <dt-bindings/pinctrl/bcm2835.h>
  11
  12 / {
  13         compatible = "brcm,bcm2835";
  14         fragment@0 {
  15                 target = <&gpio>;
  16                 __overlay__ {
  17                         spi1_pins: spi1_pins {
  18                                 brcm,pins = <19 20 21>;
  19                                 brcm,function = <3>;
  20                         };
  21                         spi1_cs_pins: spi1_cs_pins {
  22                                 brcm,pins = <18>;
  23                                 brcm,function = <1>;
  24                         };
  25                 };
  26         };
  27         fragment@1 {
  28                 target = <&spi1>;
  29                 __overlay__ {
  30                         #address-cells = <1>;
  31                         #size-cells = <0>;
  32                         pinctrl-names = "default";
  33                         pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
  34                         cs-gpios = <&gpio 18 1>;
  35                         status = "okay";
  36                         spidev@0 {
  37                                 compatible = "spidev";
  38                                 reg = <0>;
  39                                 #address-cells = <1>;
  40                                 #size-cells = <0>;
  41                                 spi-max-frequency = <125000000>;
  42                                 status = "disabled";
  43                         };
  44                 };
  45         };
  46         fragment@2 {
  47                 target = <&aux>;
  48                 __overlay__ {
  49                         status = "okay";
  50                 };
  51         };
  52         fragment@3 {
  53                 target = <&spidev0>;
  54                 __overlay__ {
  55                         status = "disabled";
  56                 };
  57         };
  58         fragment@4 {
  59                 target = <&gpio>;
  60                 __overlay__ {
  61                         mcp251xfd_pins: mcp251xfd_spi0_0_pins {
  62                                 brcm,pins = <25>;
  63                                 brcm,function = <BCM2835_FSEL_GPIO_IN>;
  64                         };
  65                 };
  66         };
  67         fragment@5 {
  68                 target-path = "/clocks";
  69                 __overlay__ {
  70                         clk_mcp251xfd_osc: mcp251xfd-spi0-0-osc {
  71                                 #clock-cells = <0>;
  72                                 compatible = "fixed-clock";
  73                                 clock-frequency = <40000000>;
  74                         };
  75                 };
  76         };
  77         fragment@6 {
  78                 target = <&spi0>;
  79                 __overlay__ {
  80                         status = "okay";
  81                         #address-cells = <1>;
  82                         #size-cells = <0>;
  83                         mcp251xfd@0 {
  84                                 compatible = "microchip,mcp251xfd";
  85                                 reg = <0>;
  86                                 pinctrl-names = "default";
  87                                 pinctrl-0 = <&mcp251xfd_pins>;
  88                                 spi-max-frequency = <20000000>;
  89                                 interrupt-parent = <&gpio>;
  90                                 interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
  91                                 clocks = <&clk_mcp251xfd_osc>;
  92                         };
  93                 };
  94         };
  95         fragment@7 {
  96                 target-path = "spi1/spidev@0";
  97                 __overlay__ {
  98                         status = "disabled";
  99                 };
 100         };
 101         fragment@8 {
 102                 target = <&gpio>;
 103                 __overlay__ {
 104                         mcp251xfd_pins_1: mcp251xfd_spi1_0_pins {
 105                                 brcm,pins = <24>;
 106                                 brcm,function = <BCM2835_FSEL_GPIO_IN>;
 107                         };
 108                 };
 109         };
 110         fragment@9 {
 111                 target-path = "/clocks";
 112                 __overlay__ {
 113                         clk_mcp251xfd_osc_1: mcp251xfd-spi1-0-osc {
 114                                 #clock-cells = <0>;
 115                                 compatible = "fixed-clock";
 116                                 clock-frequency = <40000000>;
 117                         };
 118                 };
 119         };
 120         fragment@10 {
 121                 target = <&spi1>;
 122                 __overlay__ {
 123                         status = "okay";
 124                         #address-cells = <1>;
 125                         #size-cells = <0>;
 126                         mcp251xfd@0 {
 127                                 compatible = "microchip,mcp251xfd";
 128                                 reg = <0>;
 129                                 pinctrl-names = "default";
 130                                 pinctrl-0 = <&mcp251xfd_pins_1>;
 131                                 spi-max-frequency = <20000000>;
 132                                 interrupt-parent = <&gpio>;
 133                                 interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
 134                                 clocks = <&clk_mcp251xfd_osc_1>;
 135                         };
 136                 };
 137         };
 138 };