arch/arm/boot/dts/overlays/mcp3202-overlay.dts

   1 /*
   2  * Device tree overlay for Microchip mcp3202 12-Bit A/D Converters
   3  */
   4
   5 /dts-v1/;
   6 /plugin/;
   7
   8 / {
   9         compatible = "brcm,bcm2835";
  10
  11         fragment@0 {
  12                 target = <&spidev0>;
  13                 __dormant__ {
  14                         status = "disabled";
  15                 };
  16         };
  17
  18         fragment@1 {
  19                 target = <&spidev1>;
  20                 __dormant__ {
  21                         status = "disabled";
  22                 };
  23         };
  24
  25         fragment@2 {
  26                 target-path = "spi1/spidev@0";
  27                 __dormant__ {
  28                         status = "disabled";
  29                 };
  30         };
  31
  32         fragment@3 {
  33                 target-path = "spi1/spidev@1";
  34                 __dormant__ {
  35                         status = "disabled";
  36                 };
  37         };
  38
  39         fragment@4 {
  40                 target-path = "spi1/spidev@2";
  41                 __dormant__ {
  42                         status = "disabled";
  43                 };
  44         };
  45
  46         fragment@5 {
  47                 target-path = "spi2/spidev@0";
  48                 __dormant__ {
  49                         status = "disabled";
  50                 };
  51         };
  52
  53         fragment@6 {
  54                 target-path = "spi2/spidev@1";
  55                 __dormant__ {
  56                         status = "disabled";
  57                 };
  58         };
  59
  60         fragment@7 {
  61                 target-path = "spi2/spidev@2";
  62                 __dormant__ {
  63                         status = "disabled";
  64                 };
  65         };
  66
  67         fragment@8 {
  68                 target = <&spi0>;
  69                 __dormant__ {
  70                         status = "okay";
  71                         #address-cells = <1>;
  72                         #size-cells = <0>;
  73
  74                         mcp3202_00: mcp3202@0 {
  75                                 compatible = "mcp3202";
  76                                 reg = <0>;
  77                                 spi-max-frequency = <1600000>;
  78                         };
  79                 };
  80         };
  81
  82         fragment@9 {
  83                 target = <&spi0>;
  84                 __dormant__ {
  85                         status = "okay";
  86                         #address-cells = <1>;
  87                         #size-cells = <0>;
  88
  89                         mcp3202_01: mcp3202@1 {
  90                                 compatible = "mcp3202";
  91                                 reg = <1>;
  92                                 spi-max-frequency = <1600000>;
  93                         };
  94                 };
  95         };
  96
  97         fragment@10 {
  98                 target = <&spi1>;
  99                 __dormant__ {
 100                         status = "okay";
 101                         #address-cells = <1>;
 102                         #size-cells = <0>;
 103
 104                         mcp3202_10: mcp3202@0 {
 105                                 compatible = "mcp3202";
 106                                 reg = <0>;
 107                                 spi-max-frequency = <1600000>;
 108                         };
 109                 };
 110         };
 111
 112         fragment@11 {
 113                 target = <&spi1>;
 114                 __dormant__ {
 115                         status = "okay";
 116                         #address-cells = <1>;
 117                         #size-cells = <0>;
 118
 119                         mcp3202_11: mcp3202@1 {
 120                                 compatible = "mcp3202";
 121                                 reg = <1>;
 122                                 spi-max-frequency = <1600000>;
 123                         };
 124                 };
 125         };
 126
 127         fragment@12 {
 128                 target = <&spi1>;
 129                 __dormant__ {
 130                         status = "okay";
 131                         #address-cells = <1>;
 132                         #size-cells = <0>;
 133
 134                         mcp3202_12: mcp3202@2 {
 135                                 compatible = "mcp3202";
 136                                 reg = <2>;
 137                                 spi-max-frequency = <1600000>;
 138                         };
 139                 };
 140         };
 141
 142         fragment@13 {
 143                 target = <&spi2>;
 144                 __dormant__ {
 145                         status = "okay";
 146                         #address-cells = <1>;
 147                         #size-cells = <0>;
 148
 149                         mcp3202_20: mcp3202@0 {
 150                                 compatible = "mcp3202";
 151                                 reg = <0>;
 152                                 spi-max-frequency = <1600000>;
 153                         };
 154                 };
 155         };
 156
 157         fragment@14 {
 158                 target = <&spi2>;
 159                 __dormant__ {
 160                         status = "okay";
 161                         #address-cells = <1>;
 162                         #size-cells = <0>;
 163
 164                         mcp3202_21: mcp3202@1 {
 165                                 compatible = "mcp3202";
 166                                 reg = <1>;
 167                                 spi-max-frequency = <1600000>;
 168                         };
 169                 };
 170         };
 171
 172         fragment@15 {
 173                 target = <&spi2>;
 174                 __dormant__ {
 175                         status = "okay";
 176                         #address-cells = <1>;
 177                         #size-cells = <0>;
 178
 179                         mcp3202_22: mcp3202@2 {
 180                                 compatible = "mcp3202";
 181                                 reg = <2>;
 182                                 spi-max-frequency = <1600000>;
 183                         };
 184                 };
 185         };
 186
 187         __overrides__ {
 188                 spi0-0-present = <0>, "+0+8";
 189                 spi0-1-present = <0>, "+1+9";
 190                 spi1-0-present = <0>, "+2+10";
 191                 spi1-1-present = <0>, "+3+11";
 192                 spi1-2-present = <0>, "+4+12";
 193                 spi2-0-present = <0>, "+5+13";
 194                 spi2-1-present = <0>, "+6+14";
 195                 spi2-2-present = <0>, "+7+15";
 196                 spi0-0-speed = <&mcp3202_00>, "spi-max-frequency:0";
 197                 spi0-1-speed = <&mcp3202_01>, "spi-max-frequency:0";
 198                 spi1-0-speed = <&mcp3202_10>, "spi-max-frequency:0";
 199                 spi1-1-speed = <&mcp3202_11>, "spi-max-frequency:0";
 200                 spi1-2-speed = <&mcp3202_12>, "spi-max-frequency:0";
 201                 spi2-0-speed = <&mcp3202_20>, "spi-max-frequency:0";
 202                 spi2-1-speed = <&mcp3202_21>, "spi-max-frequency:0";
 203                 spi2-2-speed = <&mcp3202_22>, "spi-max-frequency:0";
 204         };
 205 };