arch/arm/boot/dts/overlays/mcp23s17-overlay.dts

   1 // Overlay for MCP23S08/17 GPIO Extenders from Microchip Semiconductor
   2
   3 // dtparams:
   4 //     s08-spi<n>-<m>-present  - 4-bit integer, bitmap indicating MCP23S08 devices present on SPI<n>, CS#<m>.
   5 //     s17-spi<n>-<m>-present  - 8-bit integer, bitmap indicating MCP23S17 devices present on SPI<n>, CS#<m>.
   6 //     s08-spi<n>-<m>-int-gpio - integer, enables interrupts on a single MCP23S08 device on SPI<n>, CS#<m>, specifies the GPIO pin to which INT output is connected.
   7 //     s17-spi<n>-<m>-int-gpio - integer, enables mirrored interrupts on a single MCP23S17 device on SPI<n>, CS#<m>, specifies the GPIO pin to which either INTA or INTB output is connected.
   8 //
   9 // If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
  10 // If interrupts are enabled for a device on a given CS# on a SPI bus, that device must be the only one present on that SPI bus/CS#.
  11 //
  12 // Example 1: A single MCP23S17 device on SPI0, CS#0 with its SPI addr set to 0 and INTA output connected to GPIO25:
  13 // dtoverlay=mcp23s17:s17-spi0-0-present=1,s17-spi0-0-int-gpio=25
  14 //
  15 // Example 2: Two MCP23S08 devices on SPI1, CS#0 with their addrs set to 2 and 3. Three MCP23S17 devices on SPI1, CS#1 with their addrs set to 0, 1 and 7:
  16 // dtoverlay=spi1-2cs
  17 // dtoverlay=mcp23s17:s08-spi1-0-present=12,s17-spi1-1-present=131
  18
  19 /dts-v1/;
  20 /plugin/;
  21
  22 / {
  23         compatible = "brcm,bcm2835";
  24
  25         // disable spi-dev on spi0.0
  26         fragment@0 {
  27                 target = <&spidev0>;
  28                 __dormant__ {
  29                         status = "disabled";
  30                 };
  31         };
  32
  33         // disable spi-dev on spi0.1
  34         fragment@1 {
  35                 target = <&spidev1>;
  36                 __dormant__ {
  37                         status = "disabled";
  38                 };
  39         };
  40
  41         // disable spi-dev on spi1.0
  42         fragment@2 {
  43                 target-path = "spi1/spidev@0";
  44                 __dormant__ {
  45                         status = "disabled";
  46                 };
  47         };
  48
  49         // disable spi-dev on spi1.1
  50         fragment@3 {
  51                 target-path = "spi1/spidev@1";
  52                 __dormant__ {
  53                         status = "disabled";
  54                 };
  55         };
  56
  57         // disable spi-dev on spi1.2
  58         fragment@4 {
  59                 target-path = "spi1/spidev@2";
  60                 __dormant__ {
  61                         status = "disabled";
  62                 };
  63         };
  64
  65         // disable spi-dev on spi2.0
  66         fragment@5 {
  67                 target-path = "spi2/spidev@0";
  68                 __dormant__ {
  69                         status = "disabled";
  70                 };
  71         };
  72
  73         // disable spi-dev on spi2.1
  74         fragment@6 {
  75                 target-path = "spi2/spidev@1";
  76                 __dormant__ {
  77                         status = "disabled";
  78                 };
  79         };
  80
  81         // disable spi-dev on spi2.2
  82         fragment@7 {
  83                 target-path = "spi2/spidev@2";
  84                 __dormant__ {
  85                         status = "disabled";
  86                 };
  87         };
  88
  89         // enable one or more mcp23s08s on spi0.0
  90         fragment@8 {
  91                 target = <&spi0>;
  92                 __dormant__ {
  93                         status = "okay";
  94                         #address-cells = <1>;
  95                         #size-cells = <0>;
  96                         mcp23s08_00: mcp23s08@0 {
  97                                 compatible = "microchip,mcp23s08";
  98                                 gpio-controller;
  99                                 #gpio-cells = <2>;
 100                                 microchip,spi-present-mask = <0x00>;  /* overwritten by mcp23s08-spi0-0-present parameter */
 101                                 reg = <0>;
 102                                 spi-max-frequency = <500000>;
 103                                 status = "okay";
 104                                 #interrupt-cells=<2>;
 105                                 interrupts = <0 2>;  /* 1st word overwritten by mcp23s08-spi0-0-int-gpio parameter */
 106                         };
 107                 };
 108         };
 109
 110         // enable one or more mcp23s08s on spi0.1
 111         fragment@9 {
 112                 target = <&spi0>;
 113                 __dormant__ {
 114                         status = "okay";
 115                         #address-cells = <1>;
 116                         #size-cells = <0>;
 117                         mcp23s08_01: mcp23s08@1 {
 118                                 compatible = "microchip,mcp23s08";
 119                                 gpio-controller;
 120                                 #gpio-cells = <2>;
 121                                 microchip,spi-present-mask = <0x00>;  /* overwritten by mcp23s08-spi0-1-present parameter */
 122                                 reg = <1>;
 123                                 spi-max-frequency = <500000>;
 124                                 status = "okay";
 125                                 #interrupt-cells=<2>;
 126                                 interrupts = <0 2>;  /* 1st word overwritten by mcp23s08-spi0-1-int-gpio parameter */
 127                         };
 128                 };
 129         };
 130
 131         // enable one or more mcp23s08s on spi1.0
 132         fragment@10 {
 133                 target = <&spi1>;
 134                 __dormant__ {
 135                         status = "okay";
 136                         #address-cells = <1>;
 137                         #size-cells = <0>;
 138                         mcp23s08_10: mcp23s08@0 {
 139                                 compatible = "microchip,mcp23s08";
 140                                 gpio-controller;
 141                                 #gpio-cells = <2>;
 142                                 microchip,spi-present-mask = <0x00>;  /* overwritten by mcp23s08-spi1-0-present parameter */
 143                                 reg = <0>;
 144                                 spi-max-frequency = <500000>;
 145                                 status = "okay";
 146                                 #interrupt-cells=<2>;
 147                                 interrupts = <0 2>;  /* 1st word overwritten by mcp23s08-spi1-0-int-gpio parameter */
 148                         };
 149                 };
 150         };
 151
 152         // enable one or more mcp23s08s on spi1.1
 153         fragment@11 {
 154                 target = <&spi1>;
 155                 __dormant__ {
 156                         status = "okay";
 157                         #address-cells = <1>;
 158                         #size-cells = <0>;
 159                         mcp23s08_11: mcp23s08@1 {
 160                                 compatible = "microchip,mcp23s08";
 161                                 gpio-controller;
 162                                 #gpio-cells = <2>;
 163                                 microchip,spi-present-mask = <0x00>;  /* overwritten by mcp23s08-spi1-1-present parameter */
 164                                 reg = <1>;
 165                                 spi-max-frequency = <500000>;
 166                                 status = "okay";
 167                                 #interrupt-cells=<2>;
 168                                 interrupts = <0 2>;  /* 1st word overwritten by mcp23s08-spi1-1-int-gpio parameter */
 169                         };
 170                 };
 171         };
 172
 173         // enable one or more mcp23s08s on spi1.2
 174         fragment@12 {
 175                 target = <&spi1>;
 176                 __dormant__ {
 177                         status = "okay";
 178                         #address-cells = <1>;
 179                         #size-cells = <0>;
 180                         mcp23s08_12: mcp23s08@2 {
 181                                 compatible = "microchip,mcp23s08";
 182                                 gpio-controller;
 183                                 #gpio-cells = <2>;
 184                                 microchip,spi-present-mask = <0x00>;  /* overwritten by mcp23s08-spi1-2-present parameter */
 185                                 reg = <2>;
 186                                 spi-max-frequency = <500000>;
 187                                 status = "okay";
 188                                 #interrupt-cells=<2>;
 189                                 interrupts = <0 2>;  /* 1st word overwritten by mcp23s08-spi1-2-int-gpio parameter */
 190                         };
 191                 };
 192         };
 193
 194         // enable one or more mcp23s08s on spi2.0
 195         fragment@13 {
 196                 target = <&spi2>;
 197                 __dormant__ {
 198                         status = "okay";
 199                         #address-cells = <1>;
 200                         #size-cells = <0>;
 201                         mcp23s08_20: mcp23s08@0 {
 202                                 compatible = "microchip,mcp23s08";
 203                                 gpio-controller;
 204                                 #gpio-cells = <2>;
 205                                 microchip,spi-present-mask = <0x00>;  /* overwritten by mcp23s08-spi2-0-present parameter */
 206                                 reg = <0>;
 207                                 spi-max-frequency = <500000>;
 208                                 status = "okay";
 209                                 #interrupt-cells=<2>;
 210                                 interrupts = <0 2>;  /* 1st word overwritten by mcp23s08-spi2-0-int-gpio parameter */
 211                         };
 212                 };
 213         };
 214
 215         // enable one or more mcp23s08s on spi2.1
 216         fragment@14 {
 217                 target = <&spi2>;
 218                 __dormant__ {
 219                         status = "okay";
 220                         #address-cells = <1>;
 221                         #size-cells = <0>;
 222                         mcp23s08_21: mcp23s08@1 {
 223                                 compatible = "microchip,mcp23s08";
 224                                 gpio-controller;
 225                                 #gpio-cells = <2>;
 226                                 microchip,spi-present-mask = <0x00>;  /* overwritten by mcp23s08-spi2-1-present parameter */
 227                                 reg = <1>;
 228                                 spi-max-frequency = <500000>;
 229                                 status = "okay";
 230                                 #interrupt-cells=<2>;
 231                                 interrupts = <0 2>;  /* 1st word overwritten by mcp23s08-spi2-1-int-gpio parameter */
 232                         };
 233                 };
 234         };
 235
 236         // enable one or more mcp23s08s on spi2.2
 237         fragment@15 {
 238                 target = <&spi2>;
 239                 __dormant__ {
 240                         status = "okay";
 241                         #address-cells = <1>;
 242                         #size-cells = <0>;
 243                         mcp23s08_22: mcp23s08@2 {
 244                                 compatible = "microchip,mcp23s08";
 245                                 gpio-controller;
 246                                 #gpio-cells = <2>;
 247                                 microchip,spi-present-mask = <0x00>;  /* overwritten by mcp23s08-spi2-2-present parameter */
 248                                 reg = <2>;
 249                                 spi-max-frequency = <500000>;
 250                                 status = "okay";
 251                                 #interrupt-cells=<2>;
 252                                 interrupts = <0 2>;  /* 1st word overwritten by mcp23s08-spi2-2-int-gpio parameter */
 253                         };
 254                 };
 255         };
 256
 257         // enable one or more mcp23s17s on spi0.0
 258         fragment@16 {
 259                 target = <&spi0>;
 260                 __dormant__ {
 261                         status = "okay";
 262                         #address-cells = <1>;
 263                         #size-cells = <0>;
 264                         mcp23s17_00: mcp23s17@0 {
 265                                 compatible = "microchip,mcp23s17";
 266                                 gpio-controller;
 267                                 #gpio-cells = <2>;
 268                                 microchip,spi-present-mask = <0x00>;  /* overwritten by mcp23s17-spi0-0-present parameter */
 269                                 reg = <0>;
 270                                 spi-max-frequency = <500000>;
 271                                 status = "okay";
 272                                 #interrupt-cells=<2>;
 273                                 interrupts = <0 2>;  /* 1st word overwritten by mcp23s17-spi0-0-int-gpio parameter */
 274                         };
 275                 };
 276         };
 277
 278         // enable one or more mcp23s17s on spi0.1
 279         fragment@17 {
 280                 target = <&spi0>;
 281                 __dormant__ {
 282                         status = "okay";
 283                         #address-cells = <1>;
 284                         #size-cells = <0>;
 285                         mcp23s17_01: mcp23s17@1 {
 286                                 compatible = "microchip,mcp23s17";
 287                                 gpio-controller;
 288                                 #gpio-cells = <2>;
 289                                 microchip,spi-present-mask = <0x00>;  /* overwritten by mcp23s17-spi0-1-present parameter */
 290                                 reg = <1>;
 291                                 spi-max-frequency = <500000>;
 292                                 status = "okay";
 293                                 #interrupt-cells=<2>;
 294                                 interrupts = <0 2>;  /* 1st word overwritten by mcp23s17-spi0-1-int-gpio parameter */
 295                         };
 296                 };
 297         };
 298
 299         // enable one or more mcp23s17s on spi1.0
 300         fragment@18 {
 301                 target = <&spi1>;
 302                 __dormant__ {
 303                         status = "okay";
 304                         #address-cells = <1>;
 305                         #size-cells = <0>;
 306                         mcp23s17_10: mcp23s17@0 {
 307                                 compatible = "microchip,mcp23s17";
 308                                 gpio-controller;
 309                                 #gpio-cells = <2>;
 310                                 microchip,spi-present-mask = <0x00>;  /* overwritten by mcp23s17-spi1-0-present parameter */
 311                                 reg = <0>;
 312                                 spi-max-frequency = <500000>;
 313                                 status = "okay";
 314                                 #interrupt-cells=<2>;
 315                                 interrupts = <0 2>;  /* 1st word overwritten by mcp23s17-spi1-0-int-gpio parameter */
 316                         };
 317                 };
 318         };
 319
 320         // enable one or more mcp23s17s on spi1.1
 321         fragment@19 {
 322                 target = <&spi1>;
 323                 __dormant__ {
 324                         status = "okay";
 325                         #address-cells = <1>;
 326                         #size-cells = <0>;
 327                         mcp23s17_11: mcp23s17@1 {
 328                                 compatible = "microchip,mcp23s17";
 329                                 gpio-controller;
 330                                 #gpio-cells = <2>;
 331                                 microchip,spi-present-mask = <0x00>;  /* overwritten by mcp23s17-spi1-1-present parameter */
 332                                 reg = <1>;
 333                                 spi-max-frequency = <500000>;
 334                                 status = "okay";
 335                                 #interrupt-cells=<2>;
 336                                 interrupts = <0 2>;  /* 1st word overwritten by mcp23s17-spi1-1-int-gpio parameter */
 337                         };
 338                 };
 339         };
 340
 341         // enable one or more mcp23s17s on spi1.2
 342         fragment@20 {
 343                 target = <&spi1>;
 344                 __dormant__ {
 345                         status = "okay";
 346                         #address-cells = <1>;
 347                         #size-cells = <0>;
 348                         mcp23s17_12: mcp23s17@2 {
 349                                 compatible = "microchip,mcp23s17";
 350                                 gpio-controller;
 351                                 #gpio-cells = <2>;
 352                                 microchip,spi-present-mask = <0x00>;  /* overwritten by mcp23s17-spi1-2-present parameter */
 353                                 reg = <2>;
 354                                 spi-max-frequency = <500000>;
 355                                 status = "okay";
 356                                 #interrupt-cells=<2>;
 357                                 interrupts = <0 2>;  /* 1st word overwritten by mcp23s17-spi1-2-int-gpio parameter */
 358                         };
 359                 };
 360         };
 361
 362         // enable one or more mcp23s17s on spi2.0
 363         fragment@21 {
 364                 target = <&spi2>;
 365                 __dormant__ {
 366                         status = "okay";
 367                         #address-cells = <1>;
 368                         #size-cells = <0>;
 369                         mcp23s17_20: mcp23s17@0 {
 370                                 compatible = "microchip,mcp23s17";
 371                                 gpio-controller;
 372                                 #gpio-cells = <2>;
 373                                 microchip,spi-present-mask = <0x00>;  /* overwritten by mcp23s17-spi2-0-present parameter */
 374                                 reg = <0>;
 375                                 spi-max-frequency = <500000>;
 376                                 status = "okay";
 377                                 #interrupt-cells=<2>;
 378                                 interrupts = <0 2>;  /* 1st word overwritten by mcp23s17-spi2-0-int-gpio parameter */
 379                         };
 380                 };
 381         };
 382
 383         // enable one or more mcp23s17s on spi2.1
 384         fragment@22 {
 385                 target = <&spi2>;
 386                 __dormant__ {
 387                         status = "okay";
 388                         #address-cells = <1>;
 389                         #size-cells = <0>;
 390                         mcp23s17_21: mcp23s17@1 {
 391                                 compatible = "microchip,mcp23s17";
 392                                 gpio-controller;
 393                                 #gpio-cells = <2>;
 394                                 microchip,spi-present-mask = <0x00>;  /* overwritten by mcp23s17-spi2-1-present parameter */
 395                                 reg = <1>;
 396                                 spi-max-frequency = <500000>;
 397                                 status = "okay";
 398                                 #interrupt-cells=<2>;
 399                                 interrupts = <0 2>;  /* 1st word overwritten by mcp23s17-spi2-1-int-gpio parameter */
 400                         };
 401                 };
 402         };
 403
 404         // enable one or more mcp23s17s on spi2.2
 405         fragment@23 {
 406                 target = <&spi2>;
 407                 __dormant__ {
 408                         status = "okay";
 409                         #address-cells = <1>;
 410                         #size-cells = <0>;
 411                         mcp23s17_22: mcp23s17@2 {
 412                                 compatible = "microchip,mcp23s17";
 413                                 gpio-controller;
 414                                 #gpio-cells = <2>;
 415                                 microchip,spi-present-mask = <0x00>;  /* overwritten by mcp23s17-spi2-2-present parameter */
 416                                 reg = <2>;
 417                                 spi-max-frequency = <500000>;
 418                                 status = "okay";
 419                                 #interrupt-cells=<2>;
 420                                 interrupts = <0 2>;  /* 1st word overwritten by mcp23s17-spi2-2-int-gpio parameter */
 421                         };
 422                 };
 423         };
 424
 425         // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.0 as a input with no pull-up/down
 426         fragment@24 {
 427                 target = <&gpio>;
 428                 __dormant__ {
 429                         spi0_0_int_pins: spi0_0_int_pins {
 430                                 brcm,pins = <0>;  /* overwritten by mcp23s08/17-spi0-0-int-gpio parameter */
 431                                 brcm,function = <0>;
 432                                 brcm,pull = <0>;
 433                         };
 434                 };
 435         };
 436
 437         // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.1 as a input with no pull-up/down
 438         fragment@25 {
 439                 target = <&gpio>;
 440                 __dormant__ {
 441                         spi0_1_int_pins: spi0_1_int_pins {
 442                                 brcm,pins = <0>;  /* overwritten by mcp23s08/17-spi0-1-int-gpio parameter */
 443                                 brcm,function = <0>;
 444                                 brcm,pull = <0>;
 445                         };
 446                 };
 447         };
 448
 449         // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.0 as a input with no pull-up/down
 450         fragment@26 {
 451                 target = <&gpio>;
 452                 __dormant__ {
 453                         spi1_0_int_pins: spi1_0_int_pins {
 454                                 brcm,pins = <0>;  /* overwritten by mcp23s08/17-spi1-0-int-gpio parameter */
 455                                 brcm,function = <0>;
 456                                 brcm,pull = <0>;
 457                         };
 458                 };
 459         };
 460
 461         // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.1 as a input with no pull-up/down
 462         fragment@27 {
 463                 target = <&gpio>;
 464                 __dormant__ {
 465                         spi1_1_int_pins: spi1_1_int_pins {
 466                                 brcm,pins = <0>;  /* overwritten by mcp23s08/17-spi1-1-int-gpio parameter */
 467                                 brcm,function = <0>;
 468                                 brcm,pull = <0>;
 469                         };
 470                 };
 471         };
 472
 473         // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.2 as a input with no pull-up/down
 474         fragment@28 {
 475                 target = <&gpio>;
 476                 __dormant__ {
 477                         spi1_2_int_pins: spi1_2_int_pins {
 478                                 brcm,pins = <0>;  /* overwritten by mcp23s08/17-spi1-2-int-gpio parameter */
 479                                 brcm,function = <0>;
 480                                 brcm,pull = <0>;
 481                         };
 482                 };
 483         };
 484
 485         // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.0 as a input with no pull-up/down
 486         fragment@29 {
 487                 target = <&gpio>;
 488                 __dormant__ {
 489                         spi2_0_int_pins: spi2_0_int_pins {
 490                                 brcm,pins = <0>;  /* overwritten by mcp23s08/17-spi2-0-int-gpio parameter */
 491                                 brcm,function = <0>;
 492                                 brcm,pull = <0>;
 493                         };
 494                 };
 495         };
 496
 497         // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.1 as a input with no pull-up/down
 498         fragment@30 {
 499                 target = <&gpio>;
 500                 __dormant__ {
 501                         spi2_1_int_pins: spi2_1_int_pins {
 502                                 brcm,pins = <0>;  /* overwritten by mcp23s08/17-spi2-1-int-gpio parameter */
 503                                 brcm,function = <0>;
 504                                 brcm,pull = <0>;
 505                         };
 506                 };
 507         };
 508
 509         // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.2 as a input with no pull-up/down
 510         fragment@31 {
 511                 target = <&gpio>;
 512                 __dormant__ {
 513                         spi2_2_int_pins: spi2_2_int_pins {
 514                                 brcm,pins = <0>;  /* overwritten by mcp23s08/17-spi2-2-int-gpio parameter */
 515                                 brcm,function = <0>;
 516                                 brcm,pull = <0>;
 517                         };
 518                 };
 519         };
 520
 521         // Enable interrupts for a mcp23s08 on spi0.0.
 522         // Use default active low interrupt signalling.
 523         fragment@32 {
 524                 target = <&mcp23s08_00>;
 525                 __dormant__ {
 526                         interrupt-parent = <&gpio>;
 527                         interrupt-controller;
 528                 };
 529         };
 530
 531         // Enable interrupts for a mcp23s08 on spi0.1.
 532         // Use default active low interrupt signalling.
 533         fragment@33 {
 534                 target = <&mcp23s08_01>;
 535                 __dormant__ {
 536                         interrupt-parent = <&gpio>;
 537                         interrupt-controller;
 538                 };
 539         };
 540
 541         // Enable interrupts for a mcp23s08 on spi1.0.
 542         // Use default active low interrupt signalling.
 543         fragment@34 {
 544                 target = <&mcp23s08_10>;
 545                 __dormant__ {
 546                         interrupt-parent = <&gpio>;
 547                         interrupt-controller;
 548                 };
 549         };
 550
 551         // Enable interrupts for a mcp23s08 on spi1.1.
 552         // Use default active low interrupt signalling.
 553         fragment@35 {
 554                 target = <&mcp23s08_11>;
 555                 __dormant__ {
 556                         interrupt-parent = <&gpio>;
 557                         interrupt-controller;
 558                 };
 559         };
 560
 561         // Enable interrupts for a mcp23s08 on spi1.2.
 562         // Use default active low interrupt signalling.
 563         fragment@36 {
 564                 target = <&mcp23s08_12>;
 565                 __dormant__ {
 566                         interrupt-parent = <&gpio>;
 567                         interrupt-controller;
 568                 };
 569         };
 570
 571         // Enable interrupts for a mcp23s08 on spi2.0.
 572         // Use default active low interrupt signalling.
 573         fragment@37 {
 574                 target = <&mcp23s08_20>;
 575                 __dormant__ {
 576                         interrupt-parent = <&gpio>;
 577                         interrupt-controller;
 578                 };
 579         };
 580
 581         // Enable interrupts for a mcp23s08 on spi2.1.
 582         // Use default active low interrupt signalling.
 583         fragment@38 {
 584                 target = <&mcp23s08_21>;
 585                 __dormant__ {
 586                         interrupt-parent = <&gpio>;
 587                         interrupt-controller;
 588                 };
 589         };
 590
 591         // Enable interrupts for a mcp23s08 on spi2.2.
 592         // Use default active low interrupt signalling.
 593         fragment@39 {
 594                 target = <&mcp23s08_22>;
 595                 __dormant__ {
 596                         interrupt-parent = <&gpio>;
 597                         interrupt-controller;
 598                 };
 599         };
 600
 601         // Enable interrupts for a mcp23s17 on spi0.0.
 602         // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
 603         // Use default active low interrupt signalling.
 604         fragment@40 {
 605                 target = <&mcp23s17_00>;
 606                 __dormant__ {
 607                         interrupt-parent = <&gpio>;
 608                         interrupt-controller;
 609                         microchip,irq-mirror;
 610                 };
 611         };
 612
 613         // Enable interrupts for a mcp23s17 on spi0.1.
 614         // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
 615         // Configure INTA/B outputs of mcp23s08/17 as active low.
 616         fragment@41 {
 617                 target = <&mcp23s17_01>;
 618                 __dormant__ {
 619                         interrupt-parent = <&gpio>;
 620                         interrupt-controller;
 621                         microchip,irq-mirror;
 622                 };
 623         };
 624
 625         // Enable interrupts for a mcp23s17 on spi1.0.
 626         // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
 627         // Configure INTA/B outputs of mcp23s08/17 as active low.
 628         fragment@42 {
 629                 target = <&mcp23s17_10>;
 630                 __dormant__ {
 631                         interrupt-parent = <&gpio>;
 632                         interrupt-controller;
 633                         microchip,irq-mirror;
 634                 };
 635         };
 636
 637         // Enable interrupts for a mcp23s17 on spi1.1.
 638         // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
 639         // Configure INTA/B outputs of mcp23s08/17 as active low.
 640         fragment@43 {
 641                 target = <&mcp23s17_11>;
 642                 __dormant__ {
 643                         interrupt-parent = <&gpio>;
 644                         interrupt-controller;
 645                         microchip,irq-mirror;
 646                 };
 647         };
 648
 649         // Enable interrupts for a mcp23s17 on spi1.2.
 650         // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
 651         // Configure INTA/B outputs of mcp23s08/17 as active low.
 652         fragment@44 {
 653                 target = <&mcp23s17_12>;
 654                 __dormant__ {
 655                         interrupt-parent = <&gpio>;
 656                         interrupt-controller;
 657                         microchip,irq-mirror;
 658                 };
 659         };
 660
 661         // Enable interrupts for a mcp23s17 on spi2.0.
 662         // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
 663         // Configure INTA/B outputs of mcp23s08/17 as active low.
 664         fragment@45 {
 665                 target = <&mcp23s17_20>;
 666                 __dormant__ {
 667                         interrupt-parent = <&gpio>;
 668                         interrupt-controller;
 669                         microchip,irq-mirror;
 670                 };
 671         };
 672
 673         // Enable interrupts for a mcp23s17 on spi2.1.
 674         // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
 675         // Configure INTA/B outputs of mcp23s08/17 as active low.
 676         fragment@46 {
 677                 target = <&mcp23s17_21>;
 678                 __dormant__ {
 679                         interrupt-parent = <&gpio>;
 680                         interrupt-controller;
 681                         microchip,irq-mirror;
 682                 };
 683         };
 684
 685         // Enable interrupts for a mcp23s17 on spi2.2.
 686         // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
 687         // Configure INTA/B outputs of mcp23s08/17 as active low.
 688         fragment@47 {
 689                 target = <&mcp23s17_22>;
 690                 __dormant__ {
 691                         interrupt-parent = <&gpio>;
 692                         interrupt-controller;
 693                         microchip,irq-mirror;
 694                 };
 695         };
 696
 697         __overrides__ {
 698                 s08-spi0-0-present = <0>,"+0+8",  <&mcp23s08_00>,"microchip,spi-present-mask:0";
 699                 s08-spi0-1-present = <0>,"+1+9",  <&mcp23s08_01>,"microchip,spi-present-mask:0";
 700                 s08-spi1-0-present = <0>,"+2+10", <&mcp23s08_10>,"microchip,spi-present-mask:0";
 701                 s08-spi1-1-present = <0>,"+3+11", <&mcp23s08_11>,"microchip,spi-present-mask:0";
 702                 s08-spi1-2-present = <0>,"+4+12", <&mcp23s08_12>,"microchip,spi-present-mask:0";
 703                 s08-spi2-0-present = <0>,"+5+13", <&mcp23s08_20>,"microchip,spi-present-mask:0";
 704                 s08-spi2-1-present = <0>,"+6+14", <&mcp23s08_21>,"microchip,spi-present-mask:0";
 705                 s08-spi2-2-present = <0>,"+7+15", <&mcp23s08_22>,"microchip,spi-present-mask:0";
 706                 s17-spi0-0-present = <0>,"+0+16", <&mcp23s17_00>,"microchip,spi-present-mask:0";
 707                 s17-spi0-1-present = <0>,"+1+17", <&mcp23s17_01>,"microchip,spi-present-mask:0";
 708                 s17-spi1-0-present = <0>,"+2+18", <&mcp23s17_10>,"microchip,spi-present-mask:0";
 709                 s17-spi1-1-present = <0>,"+3+19", <&mcp23s17_11>,"microchip,spi-present-mask:0";
 710                 s17-spi1-2-present = <0>,"+4+20", <&mcp23s17_12>,"microchip,spi-present-mask:0";
 711                 s17-spi2-0-present = <0>,"+5+21", <&mcp23s17_20>,"microchip,spi-present-mask:0";
 712                 s17-spi2-1-present = <0>,"+6+22", <&mcp23s17_21>,"microchip,spi-present-mask:0";
 713                 s17-spi2-2-present = <0>,"+7+23", <&mcp23s17_22>,"microchip,spi-present-mask:0";
 714                 s08-spi0-0-int-gpio = <0>,"+24+32", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s08_00>,"interrupts:0";
 715                 s08-spi0-1-int-gpio = <0>,"+25+33", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s08_01>,"interrupts:0";
 716                 s08-spi1-0-int-gpio = <0>,"+26+34", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s08_10>,"interrupts:0";
 717                 s08-spi1-1-int-gpio = <0>,"+27+35", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s08_11>,"interrupts:0";
 718                 s08-spi1-2-int-gpio = <0>,"+28+36", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s08_12>,"interrupts:0";
 719                 s08-spi2-0-int-gpio = <0>,"+29+37", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s08_20>,"interrupts:0";
 720                 s08-spi2-1-int-gpio = <0>,"+30+38", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s08_21>,"interrupts:0";
 721                 s08-spi2-2-int-gpio = <0>,"+31+39", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s08_22>,"interrupts:0";
 722                 s17-spi0-0-int-gpio = <0>,"+24+40", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s17_00>,"interrupts:0";
 723                 s17-spi0-1-int-gpio = <0>,"+25+41", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s17_01>,"interrupts:0";
 724                 s17-spi1-0-int-gpio = <0>,"+26+42", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s17_10>,"interrupts:0";
 725                 s17-spi1-1-int-gpio = <0>,"+27+43", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s17_11>,"interrupts:0";
 726                 s17-spi1-2-int-gpio = <0>,"+28+44", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s17_12>,"interrupts:0";
 727                 s17-spi2-0-int-gpio = <0>,"+29+45", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s17_20>,"interrupts:0";
 728                 s17-spi2-1-int-gpio = <0>,"+30+46", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s17_21>,"interrupts:0";
 729                 s17-spi2-2-int-gpio = <0>,"+31+47", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s17_22>,"interrupts:0";
 730         };
 731 };
 732