arch/arm/boot/dts/omap4.dtsi

   1 /*
   2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <dt-bindings/gpio/gpio.h>
  10 #include <dt-bindings/interrupt-controller/arm-gic.h>
  11 #include <dt-bindings/pinctrl/omap.h>
  12
  13 #include "skeleton.dtsi"
  14
  15 / {
  16         compatible = "ti,omap4430", "ti,omap4";
  17         interrupt-parent = <&gic>;
  18
  19         aliases {
  20                 i2c0 = &i2c1;
  21                 i2c1 = &i2c2;
  22                 i2c2 = &i2c3;
  23                 i2c3 = &i2c4;
  24                 serial0 = &uart1;
  25                 serial1 = &uart2;
  26                 serial2 = &uart3;
  27                 serial3 = &uart4;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 cpu@0 {
  35                         compatible = "arm,cortex-a9";
  36                         device_type = "cpu";
  37                         next-level-cache = <&L2>;
  38                         reg = <0x0>;
  39
  40                         clocks = <&dpll_mpu_ck>;
  41                         clock-names = "cpu";
  42
  43                         clock-latency = <300000>; /* From omap-cpufreq driver */
  44                 };
  45                 cpu@1 {
  46                         compatible = "arm,cortex-a9";
  47                         device_type = "cpu";
  48                         next-level-cache = <&L2>;
  49                         reg = <0x1>;
  50                 };
  51         };
  52
  53         gic: interrupt-controller@48241000 {
  54                 compatible = "arm,cortex-a9-gic";
  55                 interrupt-controller;
  56                 #interrupt-cells = <3>;
  57                 reg = <0x48241000 0x1000>,
  58                       <0x48240100 0x0100>;
  59         };
  60
  61         L2: l2-cache-controller@48242000 {
  62                 compatible = "arm,pl310-cache";
  63                 reg = <0x48242000 0x1000>;
  64                 cache-unified;
  65                 cache-level = <2>;
  66         };
  67
  68         local-timer@48240600 {
  69                 compatible = "arm,cortex-a9-twd-timer";
  70                 clocks = <&mpu_periphclk>;
  71                 reg = <0x48240600 0x20>;
  72                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
  73         };
  74
  75         /*
  76          * The soc node represents the soc top level view. It is used for IPs
  77          * that are not memory mapped in the MPU view or for the MPU itself.
  78          */
  79         soc {
  80                 compatible = "ti,omap-infra";
  81                 mpu {
  82                         compatible = "ti,omap4-mpu";
  83                         ti,hwmods = "mpu";
  84                         sram = <&ocmcram>;
  85                 };
  86
  87                 dsp {
  88                         compatible = "ti,omap3-c64";
  89                         ti,hwmods = "dsp";
  90                 };
  91
  92                 iva {
  93                         compatible = "ti,ivahd";
  94                         ti,hwmods = "iva";
  95                 };
  96         };
  97
  98         /*
  99          * XXX: Use a flat representation of the OMAP4 interconnect.
 100          * The real OMAP interconnect network is quite complex.
 101          * Since it will not bring real advantage to represent that in DT for
 102          * the moment, just use a fake OCP bus entry to represent the whole bus
 103          * hierarchy.
 104          */
 105         ocp {
 106                 compatible = "ti,omap4-l3-noc", "simple-bus";
 107                 #address-cells = <1>;
 108                 #size-cells = <1>;
 109                 ranges;
 110                 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
 111                 reg = <0x44000000 0x1000>,
 112                       <0x44800000 0x2000>,
 113                       <0x45000000 0x1000>;
 114                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
 115                              <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 116
 117                 l4_cfg: l4@4a000000 {
 118                         compatible = "ti,omap4-l4-cfg", "simple-bus";
 119                         #address-cells = <1>;
 120                         #size-cells = <1>;
 121                         ranges = <0 0x4a000000 0x1000000>;
 122
 123                         cm1: cm1@4000 {
 124                                 compatible = "ti,omap4-cm1";
 125                                 reg = <0x4000 0x2000>;
 126
 127                                 cm1_clocks: clocks {
 128                                         #address-cells = <1>;
 129                                         #size-cells = <0>;
 130                                 };
 131
 132                                 cm1_clockdomains: clockdomains {
 133                                 };
 134                         };
 135
 136                         cm2: cm2@8000 {
 137                                 compatible = "ti,omap4-cm2";
 138                                 reg = <0x8000 0x3000>;
 139
 140                                 cm2_clocks: clocks {
 141                                         #address-cells = <1>;
 142                                         #size-cells = <0>;
 143                                 };
 144
 145                                 cm2_clockdomains: clockdomains {
 146                                 };
 147                         };
 148
 149                         omap4_scm_core: scm@2000 {
 150                                 compatible = "ti,omap4-scm-core", "simple-bus";
 151                                 reg = <0x2000 0x1000>;
 152                                 #address-cells = <1>;
 153                                 #size-cells = <1>;
 154                                 ranges = <0 0x2000 0x1000>;
 155
 156                                 scm_conf: scm_conf@0 {
 157                                         compatible = "syscon";
 158                                         reg = <0x0 0x800>;
 159                                         #address-cells = <1>;
 160                                         #size-cells = <1>;
 161                                 };
 162                         };
 163
 164                         omap4_padconf_core: scm@100000 {
 165                                 compatible = "ti,omap4-scm-padconf-core",
 166                                              "simple-bus";
 167                                 #address-cells = <1>;
 168                                 #size-cells = <1>;
 169                                 ranges = <0 0x100000 0x1000>;
 170
 171                                 omap4_pmx_core: pinmux@40 {
 172                                         compatible = "ti,omap4-padconf",
 173                                                      "pinctrl-single";
 174                                         reg = <0x40 0x0196>;
 175                                         #address-cells = <1>;
 176                                         #size-cells = <0>;
 177                                         #interrupt-cells = <1>;
 178                                         interrupt-controller;
 179                                         pinctrl-single,register-width = <16>;
 180                                         pinctrl-single,function-mask = <0x7fff>;
 181                                 };
 182
 183                                 omap4_padconf_global: omap4_padconf_global@5a0 {
 184                                         compatible = "syscon";
 185                                         reg = <0x5a0 0x170>;
 186                                         #address-cells = <1>;
 187                                         #size-cells = <1>;
 188
 189                                         pbias_regulator: pbias_regulator {
 190                                                 compatible = "ti,pbias-omap";
 191                                                 reg = <0x60 0x4>;
 192                                                 syscon = <&omap4_padconf_global>;
 193                                                 pbias_mmc_reg: pbias_mmc_omap4 {
 194                                                         regulator-name = "pbias_mmc_omap4";
 195                                                         regulator-min-microvolt = <1800000>;
 196                                                         regulator-max-microvolt = <3000000>;
 197                                                 };
 198                                         };
 199                                 };
 200                         };
 201
 202                         l4_wkup: l4@300000 {
 203                                 compatible = "ti,omap4-l4-wkup", "simple-bus";
 204                                 #address-cells = <1>;
 205                                 #size-cells = <1>;
 206                                 ranges = <0 0x300000 0x40000>;
 207
 208                                 counter32k: counter@4000 {
 209                                         compatible = "ti,omap-counter32k";
 210                                         reg = <0x4000 0x20>;
 211                                         ti,hwmods = "counter_32k";
 212                                 };
 213
 214                                 prm: prm@6000 {
 215                                         compatible = "ti,omap4-prm";
 216                                         reg = <0x6000 0x3000>;
 217                                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 218
 219                                         prm_clocks: clocks {
 220                                                 #address-cells = <1>;
 221                                                 #size-cells = <0>;
 222                                         };
 223
 224                                         prm_clockdomains: clockdomains {
 225                                         };
 226                                 };
 227
 228                                 scrm: scrm@a000 {
 229                                         compatible = "ti,omap4-scrm";
 230                                         reg = <0xa000 0x2000>;
 231
 232                                         scrm_clocks: clocks {
 233                                                 #address-cells = <1>;
 234                                                 #size-cells = <0>;
 235                                         };
 236
 237                                         scrm_clockdomains: clockdomains {
 238                                         };
 239                                 };
 240
 241                                 omap4_pmx_wkup: pinmux@1e040 {
 242                                         compatible = "ti,omap4-padconf",
 243                                                      "pinctrl-single";
 244                                         reg = <0x1e040 0x0038>;
 245                                         #address-cells = <1>;
 246                                         #size-cells = <0>;
 247                                         #interrupt-cells = <1>;
 248                                         interrupt-controller;
 249                                         pinctrl-single,register-width = <16>;
 250                                         pinctrl-single,function-mask = <0x7fff>;
 251                                 };
 252                         };
 253                 };
 254
 255                 ocmcram: ocmcram@40304000 {
 256                         compatible = "mmio-sram";
 257                         reg = <0x40304000 0xa000>; /* 40k */
 258                 };
 259
 260                 sdma: dma-controller@4a056000 {
 261                         compatible = "ti,omap4430-sdma";
 262                         reg = <0x4a056000 0x1000>;
 263                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 264                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 265                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 266                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 267                         #dma-cells = <1>;
 268                         dma-channels = <32>;
 269                         dma-requests = <127>;
 270                 };
 271
 272                 gpio1: gpio@4a310000 {
 273                         compatible = "ti,omap4-gpio";
 274                         reg = <0x4a310000 0x200>;
 275                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 276                         ti,hwmods = "gpio1";
 277                         ti,gpio-always-on;
 278                         gpio-controller;
 279                         #gpio-cells = <2>;
 280                         interrupt-controller;
 281                         #interrupt-cells = <2>;
 282                 };
 283
 284                 gpio2: gpio@48055000 {
 285                         compatible = "ti,omap4-gpio";
 286                         reg = <0x48055000 0x200>;
 287                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 288                         ti,hwmods = "gpio2";
 289                         gpio-controller;
 290                         #gpio-cells = <2>;
 291                         interrupt-controller;
 292                         #interrupt-cells = <2>;
 293                 };
 294
 295                 gpio3: gpio@48057000 {
 296                         compatible = "ti,omap4-gpio";
 297                         reg = <0x48057000 0x200>;
 298                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 299                         ti,hwmods = "gpio3";
 300                         gpio-controller;
 301                         #gpio-cells = <2>;
 302                         interrupt-controller;
 303                         #interrupt-cells = <2>;
 304                 };
 305
 306                 gpio4: gpio@48059000 {
 307                         compatible = "ti,omap4-gpio";
 308                         reg = <0x48059000 0x200>;
 309                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 310                         ti,hwmods = "gpio4";
 311                         gpio-controller;
 312                         #gpio-cells = <2>;
 313                         interrupt-controller;
 314                         #interrupt-cells = <2>;
 315                 };
 316
 317                 gpio5: gpio@4805b000 {
 318                         compatible = "ti,omap4-gpio";
 319                         reg = <0x4805b000 0x200>;
 320                         interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 321                         ti,hwmods = "gpio5";
 322                         gpio-controller;
 323                         #gpio-cells = <2>;
 324                         interrupt-controller;
 325                         #interrupt-cells = <2>;
 326                 };
 327
 328                 gpio6: gpio@4805d000 {
 329                         compatible = "ti,omap4-gpio";
 330                         reg = <0x4805d000 0x200>;
 331                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 332                         ti,hwmods = "gpio6";
 333                         gpio-controller;
 334                         #gpio-cells = <2>;
 335                         interrupt-controller;
 336                         #interrupt-cells = <2>;
 337                 };
 338
 339                 gpmc: gpmc@50000000 {
 340                         compatible = "ti,omap4430-gpmc";
 341                         reg = <0x50000000 0x1000>;
 342                         #address-cells = <2>;
 343                         #size-cells = <1>;
 344                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 345                         gpmc,num-cs = <8>;
 346                         gpmc,num-waitpins = <4>;
 347                         ti,hwmods = "gpmc";
 348                         ti,no-idle-on-init;
 349                         clocks = <&l3_div_ck>;
 350                         clock-names = "fck";
 351                 };
 352
 353                 uart1: serial@4806a000 {
 354                         compatible = "ti,omap4-uart";
 355                         reg = <0x4806a000 0x100>;
 356                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
 357                         ti,hwmods = "uart1";
 358                         clock-frequency = <48000000>;
 359                 };
 360
 361                 uart2: serial@4806c000 {
 362                         compatible = "ti,omap4-uart";
 363                         reg = <0x4806c000 0x100>;
 364                         interrupts-extended = <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 365                         ti,hwmods = "uart2";
 366                         clock-frequency = <48000000>;
 367                 };
 368
 369                 uart3: serial@48020000 {
 370                         compatible = "ti,omap4-uart";
 371                         reg = <0x48020000 0x100>;
 372                         interrupts-extended = <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 373                         ti,hwmods = "uart3";
 374                         clock-frequency = <48000000>;
 375                 };
 376
 377                 uart4: serial@4806e000 {
 378                         compatible = "ti,omap4-uart";
 379                         reg = <0x4806e000 0x100>;
 380                         interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 381                         ti,hwmods = "uart4";
 382                         clock-frequency = <48000000>;
 383                 };
 384
 385                 hwspinlock: spinlock@4a0f6000 {
 386                         compatible = "ti,omap4-hwspinlock";
 387                         reg = <0x4a0f6000 0x1000>;
 388                         ti,hwmods = "spinlock";
 389                         #hwlock-cells = <1>;
 390                 };
 391
 392                 i2c1: i2c@48070000 {
 393                         compatible = "ti,omap4-i2c";
 394                         reg = <0x48070000 0x100>;
 395                         interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 396                         #address-cells = <1>;
 397                         #size-cells = <0>;
 398                         ti,hwmods = "i2c1";
 399                 };
 400
 401                 i2c2: i2c@48072000 {
 402                         compatible = "ti,omap4-i2c";
 403                         reg = <0x48072000 0x100>;
 404                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 405                         #address-cells = <1>;
 406                         #size-cells = <0>;
 407                         ti,hwmods = "i2c2";
 408                 };
 409
 410                 i2c3: i2c@48060000 {
 411                         compatible = "ti,omap4-i2c";
 412                         reg = <0x48060000 0x100>;
 413                         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
 414                         #address-cells = <1>;
 415                         #size-cells = <0>;
 416                         ti,hwmods = "i2c3";
 417                 };
 418
 419                 i2c4: i2c@48350000 {
 420                         compatible = "ti,omap4-i2c";
 421                         reg = <0x48350000 0x100>;
 422                         interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
 423                         #address-cells = <1>;
 424                         #size-cells = <0>;
 425                         ti,hwmods = "i2c4";
 426                 };
 427
 428                 mcspi1: spi@48098000 {
 429                         compatible = "ti,omap4-mcspi";
 430                         reg = <0x48098000 0x200>;
 431                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 432                         #address-cells = <1>;
 433                         #size-cells = <0>;
 434                         ti,hwmods = "mcspi1";
 435                         ti,spi-num-cs = <4>;
 436                         dmas = <&sdma 35>,
 437                                <&sdma 36>,
 438                                <&sdma 37>,
 439                                <&sdma 38>,
 440                                <&sdma 39>,
 441                                <&sdma 40>,
 442                                <&sdma 41>,
 443                                <&sdma 42>;
 444                         dma-names = "tx0", "rx0", "tx1", "rx1",
 445                                     "tx2", "rx2", "tx3", "rx3";
 446                 };
 447
 448                 mcspi2: spi@4809a000 {
 449                         compatible = "ti,omap4-mcspi";
 450                         reg = <0x4809a000 0x200>;
 451                         interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
 452                         #address-cells = <1>;
 453                         #size-cells = <0>;
 454                         ti,hwmods = "mcspi2";
 455                         ti,spi-num-cs = <2>;
 456                         dmas = <&sdma 43>,
 457                                <&sdma 44>,
 458                                <&sdma 45>,
 459                                <&sdma 46>;
 460                         dma-names = "tx0", "rx0", "tx1", "rx1";
 461                 };
 462
 463                 mcspi3: spi@480b8000 {
 464                         compatible = "ti,omap4-mcspi";
 465                         reg = <0x480b8000 0x200>;
 466                         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
 467                         #address-cells = <1>;
 468                         #size-cells = <0>;
 469                         ti,hwmods = "mcspi3";
 470                         ti,spi-num-cs = <2>;
 471                         dmas = <&sdma 15>, <&sdma 16>;
 472                         dma-names = "tx0", "rx0";
 473                 };
 474
 475                 mcspi4: spi@480ba000 {
 476                         compatible = "ti,omap4-mcspi";
 477                         reg = <0x480ba000 0x200>;
 478                         interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
 479                         #address-cells = <1>;
 480                         #size-cells = <0>;
 481                         ti,hwmods = "mcspi4";
 482                         ti,spi-num-cs = <1>;
 483                         dmas = <&sdma 70>, <&sdma 71>;
 484                         dma-names = "tx0", "rx0";
 485                 };
 486
 487                 mmc1: mmc@4809c000 {
 488                         compatible = "ti,omap4-hsmmc";
 489                         reg = <0x4809c000 0x400>;
 490                         interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 491                         ti,hwmods = "mmc1";
 492                         ti,dual-volt;
 493                         ti,needs-special-reset;
 494                         dmas = <&sdma 61>, <&sdma 62>;
 495                         dma-names = "tx", "rx";
 496                         pbias-supply = <&pbias_mmc_reg>;
 497                 };
 498
 499                 mmc2: mmc@480b4000 {
 500                         compatible = "ti,omap4-hsmmc";
 501                         reg = <0x480b4000 0x400>;
 502                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 503                         ti,hwmods = "mmc2";
 504                         ti,needs-special-reset;
 505                         dmas = <&sdma 47>, <&sdma 48>;
 506                         dma-names = "tx", "rx";
 507                 };
 508
 509                 mmc3: mmc@480ad000 {
 510                         compatible = "ti,omap4-hsmmc";
 511                         reg = <0x480ad000 0x400>;
 512                         interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
 513                         ti,hwmods = "mmc3";
 514                         ti,needs-special-reset;
 515                         dmas = <&sdma 77>, <&sdma 78>;
 516                         dma-names = "tx", "rx";
 517                 };
 518
 519                 mmc4: mmc@480d1000 {
 520                         compatible = "ti,omap4-hsmmc";
 521                         reg = <0x480d1000 0x400>;
 522                         interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
 523                         ti,hwmods = "mmc4";
 524                         ti,needs-special-reset;
 525                         dmas = <&sdma 57>, <&sdma 58>;
 526                         dma-names = "tx", "rx";
 527                 };
 528
 529                 mmc5: mmc@480d5000 {
 530                         compatible = "ti,omap4-hsmmc";
 531                         reg = <0x480d5000 0x400>;
 532                         interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
 533                         ti,hwmods = "mmc5";
 534                         ti,needs-special-reset;
 535                         dmas = <&sdma 59>, <&sdma 60>;
 536                         dma-names = "tx", "rx";
 537                 };
 538
 539                 mmu_dsp: mmu@4a066000 {
 540                         compatible = "ti,omap4-iommu";
 541                         reg = <0x4a066000 0x100>;
 542                         interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 543                         ti,hwmods = "mmu_dsp";
 544                 };
 545
 546                 mmu_ipu: mmu@55082000 {
 547                         compatible = "ti,omap4-iommu";
 548                         reg = <0x55082000 0x100>;
 549                         interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 550                         ti,hwmods = "mmu_ipu";
 551                         ti,iommu-bus-err-back;
 552                 };
 553
 554                 wdt2: wdt@4a314000 {
 555                         compatible = "ti,omap4-wdt", "ti,omap3-wdt";
 556                         reg = <0x4a314000 0x80>;
 557                         interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 558                         ti,hwmods = "wd_timer2";
 559                 };
 560
 561                 mcpdm: mcpdm@40132000 {
 562                         compatible = "ti,omap4-mcpdm";
 563                         reg = <0x40132000 0x7f>, /* MPU private access */
 564                               <0x49032000 0x7f>; /* L3 Interconnect */
 565                         reg-names = "mpu", "dma";
 566                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 567                         ti,hwmods = "mcpdm";
 568                         dmas = <&sdma 65>,
 569                                <&sdma 66>;
 570                         dma-names = "up_link", "dn_link";
 571                         status = "disabled";
 572                 };
 573
 574                 dmic: dmic@4012e000 {
 575                         compatible = "ti,omap4-dmic";
 576                         reg = <0x4012e000 0x7f>, /* MPU private access */
 577                               <0x4902e000 0x7f>; /* L3 Interconnect */
 578                         reg-names = "mpu", "dma";
 579                         interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
 580                         ti,hwmods = "dmic";
 581                         dmas = <&sdma 67>;
 582                         dma-names = "up_link";
 583                         status = "disabled";
 584                 };
 585
 586                 mcbsp1: mcbsp@40122000 {
 587                         compatible = "ti,omap4-mcbsp";
 588                         reg = <0x40122000 0xff>, /* MPU private access */
 589                               <0x49022000 0xff>; /* L3 Interconnect */
 590                         reg-names = "mpu", "dma";
 591                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 592                         interrupt-names = "common";
 593                         ti,buffer-size = <128>;
 594                         ti,hwmods = "mcbsp1";
 595                         dmas = <&sdma 33>,
 596                                <&sdma 34>;
 597                         dma-names = "tx", "rx";
 598                         status = "disabled";
 599                 };
 600
 601                 mcbsp2: mcbsp@40124000 {
 602                         compatible = "ti,omap4-mcbsp";
 603                         reg = <0x40124000 0xff>, /* MPU private access */
 604                               <0x49024000 0xff>; /* L3 Interconnect */
 605                         reg-names = "mpu", "dma";
 606                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 607                         interrupt-names = "common";
 608                         ti,buffer-size = <128>;
 609                         ti,hwmods = "mcbsp2";
 610                         dmas = <&sdma 17>,
 611                                <&sdma 18>;
 612                         dma-names = "tx", "rx";
 613                         status = "disabled";
 614                 };
 615
 616                 mcbsp3: mcbsp@40126000 {
 617                         compatible = "ti,omap4-mcbsp";
 618                         reg = <0x40126000 0xff>, /* MPU private access */
 619                               <0x49026000 0xff>; /* L3 Interconnect */
 620                         reg-names = "mpu", "dma";
 621                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 622                         interrupt-names = "common";
 623                         ti,buffer-size = <128>;
 624                         ti,hwmods = "mcbsp3";
 625                         dmas = <&sdma 19>,
 626                                <&sdma 20>;
 627                         dma-names = "tx", "rx";
 628                         status = "disabled";
 629                 };
 630
 631                 mcbsp4: mcbsp@48096000 {
 632                         compatible = "ti,omap4-mcbsp";
 633                         reg = <0x48096000 0xff>; /* L4 Interconnect */
 634                         reg-names = "mpu";
 635                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 636                         interrupt-names = "common";
 637                         ti,buffer-size = <128>;
 638                         ti,hwmods = "mcbsp4";
 639                         dmas = <&sdma 31>,
 640                                <&sdma 32>;
 641                         dma-names = "tx", "rx";
 642                         status = "disabled";
 643                 };
 644
 645                 keypad: keypad@4a31c000 {
 646                         compatible = "ti,omap4-keypad";
 647                         reg = <0x4a31c000 0x80>;
 648                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 649                         reg-names = "mpu";
 650                         ti,hwmods = "kbd";
 651                 };
 652
 653                 dmm@4e000000 {
 654                         compatible = "ti,omap4-dmm";
 655                         reg = <0x4e000000 0x800>;
 656                         interrupts = <0 113 0x4>;
 657                         ti,hwmods = "dmm";
 658                 };
 659
 660                 emif1: emif@4c000000 {
 661                         compatible = "ti,emif-4d";
 662                         reg = <0x4c000000 0x100>;
 663                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 664                         ti,hwmods = "emif1";
 665                         ti,no-idle-on-init;
 666                         phy-type = <1>;
 667                         hw-caps-read-idle-ctrl;
 668                         hw-caps-ll-interface;
 669                         hw-caps-temp-alert;
 670                 };
 671
 672                 emif2: emif@4d000000 {
 673                         compatible = "ti,emif-4d";
 674                         reg = <0x4d000000 0x100>;
 675                         interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
 676                         ti,hwmods = "emif2";
 677                         ti,no-idle-on-init;
 678                         phy-type = <1>;
 679                         hw-caps-read-idle-ctrl;
 680                         hw-caps-ll-interface;
 681                         hw-caps-temp-alert;
 682                 };
 683
 684                 ocp2scp@4a0ad000 {
 685                         compatible = "ti,omap-ocp2scp";
 686                         reg = <0x4a0ad000 0x1f>;
 687                         #address-cells = <1>;
 688                         #size-cells = <1>;
 689                         ranges;
 690                         ti,hwmods = "ocp2scp_usb_phy";
 691                         usb2_phy: usb2phy@4a0ad080 {
 692                                 compatible = "ti,omap-usb2";
 693                                 reg = <0x4a0ad080 0x58>;
 694                                 ctrl-module = <&omap_control_usb2phy>;
 695                                 clocks = <&usb_phy_cm_clk32k>;
 696                                 clock-names = "wkupclk";
 697                                 #phy-cells = <0>;
 698                         };
 699                 };
 700
 701                 mailbox: mailbox@4a0f4000 {
 702                         compatible = "ti,omap4-mailbox";
 703                         reg = <0x4a0f4000 0x200>;
 704                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 705                         ti,hwmods = "mailbox";
 706                         #mbox-cells = <1>;
 707                         ti,mbox-num-users = <3>;
 708                         ti,mbox-num-fifos = <8>;
 709                         mbox_ipu: mbox_ipu {
 710                                 ti,mbox-tx = <0 0 0>;
 711                                 ti,mbox-rx = <1 0 0>;
 712                         };
 713                         mbox_dsp: mbox_dsp {
 714                                 ti,mbox-tx = <3 0 0>;
 715                                 ti,mbox-rx = <2 0 0>;
 716                         };
 717                 };
 718
 719                 timer1: timer@4a318000 {
 720                         compatible = "ti,omap3430-timer";
 721                         reg = <0x4a318000 0x80>;
 722                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 723                         ti,hwmods = "timer1";
 724                         ti,timer-alwon;
 725                 };
 726
 727                 timer2: timer@48032000 {
 728                         compatible = "ti,omap3430-timer";
 729                         reg = <0x48032000 0x80>;
 730                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
 731                         ti,hwmods = "timer2";
 732                 };
 733
 734                 timer3: timer@48034000 {
 735                         compatible = "ti,omap4430-timer";
 736                         reg = <0x48034000 0x80>;
 737                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
 738                         ti,hwmods = "timer3";
 739                 };
 740
 741                 timer4: timer@48036000 {
 742                         compatible = "ti,omap4430-timer";
 743                         reg = <0x48036000 0x80>;
 744                         interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
 745                         ti,hwmods = "timer4";
 746                 };
 747
 748                 timer5: timer@40138000 {
 749                         compatible = "ti,omap4430-timer";
 750                         reg = <0x40138000 0x80>,
 751                               <0x49038000 0x80>;
 752                         interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 753                         ti,hwmods = "timer5";
 754                         ti,timer-dsp;
 755                 };
 756
 757                 timer6: timer@4013a000 {
 758                         compatible = "ti,omap4430-timer";
 759                         reg = <0x4013a000 0x80>,
 760                               <0x4903a000 0x80>;
 761                         interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 762                         ti,hwmods = "timer6";
 763                         ti,timer-dsp;
 764                 };
 765
 766                 timer7: timer@4013c000 {
 767                         compatible = "ti,omap4430-timer";
 768                         reg = <0x4013c000 0x80>,
 769                               <0x4903c000 0x80>;
 770                         interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
 771                         ti,hwmods = "timer7";
 772                         ti,timer-dsp;
 773                 };
 774
 775                 timer8: timer@4013e000 {
 776                         compatible = "ti,omap4430-timer";
 777                         reg = <0x4013e000 0x80>,
 778                               <0x4903e000 0x80>;
 779                         interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 780                         ti,hwmods = "timer8";
 781                         ti,timer-pwm;
 782                         ti,timer-dsp;
 783                 };
 784
 785                 timer9: timer@4803e000 {
 786                         compatible = "ti,omap4430-timer";
 787                         reg = <0x4803e000 0x80>;
 788                         interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 789                         ti,hwmods = "timer9";
 790                         ti,timer-pwm;
 791                 };
 792
 793                 timer10: timer@48086000 {
 794                         compatible = "ti,omap3430-timer";
 795                         reg = <0x48086000 0x80>;
 796                         interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 797                         ti,hwmods = "timer10";
 798                         ti,timer-pwm;
 799                 };
 800
 801                 timer11: timer@48088000 {
 802                         compatible = "ti,omap4430-timer";
 803                         reg = <0x48088000 0x80>;
 804                         interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 805                         ti,hwmods = "timer11";
 806                         ti,timer-pwm;
 807                 };
 808
 809                 usbhstll: usbhstll@4a062000 {
 810                         compatible = "ti,usbhs-tll";
 811                         reg = <0x4a062000 0x1000>;
 812                         interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 813                         ti,hwmods = "usb_tll_hs";
 814                 };
 815
 816                 usbhshost: usbhshost@4a064000 {
 817                         compatible = "ti,usbhs-host";
 818                         reg = <0x4a064000 0x800>;
 819                         ti,hwmods = "usb_host_hs";
 820                         #address-cells = <1>;
 821                         #size-cells = <1>;
 822                         ranges;
 823                         clocks = <&init_60m_fclk>,
 824                                  <&xclk60mhsp1_ck>,
 825                                  <&xclk60mhsp2_ck>;
 826                         clock-names = "refclk_60m_int",
 827                                       "refclk_60m_ext_p1",
 828                                       "refclk_60m_ext_p2";
 829
 830                         usbhsohci: ohci@4a064800 {
 831                                 compatible = "ti,ohci-omap3";
 832                                 reg = <0x4a064800 0x400>;
 833                                 interrupt-parent = <&gic>;
 834                                 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 835                         };
 836
 837                         usbhsehci: ehci@4a064c00 {
 838                                 compatible = "ti,ehci-omap";
 839                                 reg = <0x4a064c00 0x400>;
 840                                 interrupt-parent = <&gic>;
 841                                 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 842                         };
 843                 };
 844
 845                 omap_control_usb2phy: control-phy@4a002300 {
 846                         compatible = "ti,control-phy-usb2";
 847                         reg = <0x4a002300 0x4>;
 848                         reg-names = "power";
 849                 };
 850
 851                 omap_control_usbotg: control-phy@4a00233c {
 852                         compatible = "ti,control-phy-otghs";
 853                         reg = <0x4a00233c 0x4>;
 854                         reg-names = "otghs_control";
 855                 };
 856
 857                 usb_otg_hs: usb_otg_hs@4a0ab000 {
 858                         compatible = "ti,omap4-musb";
 859                         reg = <0x4a0ab000 0x7ff>;
 860                         interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 861                         interrupt-names = "mc", "dma";
 862                         ti,hwmods = "usb_otg_hs";
 863                         usb-phy = <&usb2_phy>;
 864                         phys = <&usb2_phy>;
 865                         phy-names = "usb2-phy";
 866                         multipoint = <1>;
 867                         num-eps = <16>;
 868                         ram-bits = <12>;
 869                         ctrl-module = <&omap_control_usbotg>;
 870                 };
 871
 872                 aes: aes@4b501000 {
 873                         compatible = "ti,omap4-aes";
 874                         ti,hwmods = "aes";
 875                         reg = <0x4b501000 0xa0>;
 876                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 877                         dmas = <&sdma 111>, <&sdma 110>;
 878                         dma-names = "tx", "rx";
 879                 };
 880
 881                 des: des@480a5000 {
 882                         compatible = "ti,omap4-des";
 883                         ti,hwmods = "des";
 884                         reg = <0x480a5000 0xa0>;
 885                         interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 886                         dmas = <&sdma 117>, <&sdma 116>;
 887                         dma-names = "tx", "rx";
 888                 };
 889
 890                 abb_mpu: regulator-abb-mpu {
 891                         compatible = "ti,abb-v2";
 892                         regulator-name = "abb_mpu";
 893                         #address-cells = <0>;
 894                         #size-cells = <0>;
 895                         ti,tranxdone-status-mask = <0x80>;
 896                         clocks = <&sys_clkin_ck>;
 897                         ti,settling-time = <50>;
 898                         ti,clock-cycles = <16>;
 899
 900                         status = "disabled";
 901                 };
 902
 903                 abb_iva: regulator-abb-iva {
 904                         compatible = "ti,abb-v2";
 905                         regulator-name = "abb_iva";
 906                         #address-cells = <0>;
 907                         #size-cells = <0>;
 908                         ti,tranxdone-status-mask = <0x80000000>;
 909                         clocks = <&sys_clkin_ck>;
 910                         ti,settling-time = <50>;
 911                         ti,clock-cycles = <16>;
 912
 913                         status = "disabled";
 914                 };
 915
 916                 dss: dss@58000000 {
 917                         compatible = "ti,omap4-dss";
 918                         reg = <0x58000000 0x80>;
 919                         status = "disabled";
 920                         ti,hwmods = "dss_core";
 921                         clocks = <&dss_dss_clk>;
 922                         clock-names = "fck";
 923                         #address-cells = <1>;
 924                         #size-cells = <1>;
 925                         ranges;
 926
 927                         dispc@58001000 {
 928                                 compatible = "ti,omap4-dispc";
 929                                 reg = <0x58001000 0x1000>;
 930                                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 931                                 ti,hwmods = "dss_dispc";
 932                                 clocks = <&dss_dss_clk>;
 933                                 clock-names = "fck";
 934                         };
 935
 936                         rfbi: encoder@58002000  {
 937                                 compatible = "ti,omap4-rfbi";
 938                                 reg = <0x58002000 0x1000>;
 939                                 status = "disabled";
 940                                 ti,hwmods = "dss_rfbi";
 941                                 clocks = <&dss_dss_clk>, <&l3_div_ck>;
 942                                 clock-names = "fck", "ick";
 943                         };
 944
 945                         venc: encoder@58003000 {
 946                                 compatible = "ti,omap4-venc";
 947                                 reg = <0x58003000 0x1000>;
 948                                 status = "disabled";
 949                                 ti,hwmods = "dss_venc";
 950                                 clocks = <&dss_tv_clk>;
 951                                 clock-names = "fck";
 952                         };
 953
 954                         dsi1: encoder@58004000 {
 955                                 compatible = "ti,omap4-dsi";
 956                                 reg = <0x58004000 0x200>,
 957                                       <0x58004200 0x40>,
 958                                       <0x58004300 0x20>;
 959                                 reg-names = "proto", "phy", "pll";
 960                                 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
 961                                 status = "disabled";
 962                                 ti,hwmods = "dss_dsi1";
 963                                 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
 964                                 clock-names = "fck", "sys_clk";
 965                         };
 966
 967                         dsi2: encoder@58005000 {
 968                                 compatible = "ti,omap4-dsi";
 969                                 reg = <0x58005000 0x200>,
 970                                       <0x58005200 0x40>,
 971                                       <0x58005300 0x20>;
 972                                 reg-names = "proto", "phy", "pll";
 973                                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 974                                 status = "disabled";
 975                                 ti,hwmods = "dss_dsi2";
 976                                 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
 977                                 clock-names = "fck", "sys_clk";
 978                         };
 979
 980                         hdmi: encoder@58006000 {
 981                                 compatible = "ti,omap4-hdmi";
 982                                 reg = <0x58006000 0x200>,
 983                                       <0x58006200 0x100>,
 984                                       <0x58006300 0x100>,
 985                                       <0x58006400 0x1000>;
 986                                 reg-names = "wp", "pll", "phy", "core";
 987                                 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
 988                                 status = "disabled";
 989                                 ti,hwmods = "dss_hdmi";
 990                                 clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
 991                                 clock-names = "fck", "sys_clk";
 992                                 dmas = <&sdma 76>;
 993                                 dma-names = "audio_tx";
 994                         };
 995                 };
 996         };
 997 };
 998
 999 /include/ "omap44xx-clocks.dtsi"