1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device Tree Source for OMAP2 SoC
5 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/pinctrl/omap.h>
14 compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
15 interrupt-parent = <&intc>;
33 compatible = "arm,arm1136jf-s";
39 compatible = "arm,arm1136-pmu";
44 compatible = "ti,omap-infra";
46 compatible = "ti,omap2-mpu";
52 compatible = "simple-bus";
56 ti,hwmods = "l3_main";
59 compatible = "ti,omap2-aes";
61 reg = <0x480a6000 0x50>;
62 dmas = <&sdma 9 &sdma 10>;
63 dma-names = "tx", "rx";
67 compatible = "ti,omap2420-1w";
69 reg = <0x480b2000 0x1000>;
73 intc: interrupt-controller@1 {
74 compatible = "ti,omap2-intc";
76 #interrupt-cells = <1>;
77 reg = <0x480FE000 0x1000>;
80 target-module@48056000 {
81 compatible = "ti,sysc-omap2", "ti,sysc";
82 reg = <0x48056000 0x4>,
85 reg-names = "rev", "sysc", "syss";
86 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
88 SYSC_OMAP2_SOFTRESET |
89 SYSC_OMAP2_AUTOIDLE)>;
90 ti,sysc-midle = <SYSC_IDLE_FORCE>,
94 clocks = <&core_l3_ck>;
98 ranges = <0 0x48056000 0x1000>;
100 sdma: dma-controller@0 {
101 compatible = "ti,omap2420-sdma", "ti,omap-sdma";
114 compatible = "ti,omap2-i2c";
116 reg = <0x48070000 0x80>;
117 #address-cells = <1>;
123 compatible = "ti,omap2-i2c";
125 reg = <0x48072000 0x80>;
126 #address-cells = <1>;
131 mcspi1: spi@48098000 {
132 compatible = "ti,omap2-mcspi";
133 ti,hwmods = "mcspi1";
134 reg = <0x48098000 0x100>;
136 dmas = <&sdma 35 &sdma 36 &sdma 37 &sdma 38
137 &sdma 39 &sdma 40 &sdma 41 &sdma 42>;
138 dma-names = "tx0", "rx0", "tx1", "rx1",
139 "tx2", "rx2", "tx3", "rx3";
142 mcspi2: spi@4809a000 {
143 compatible = "ti,omap2-mcspi";
144 ti,hwmods = "mcspi2";
145 reg = <0x4809a000 0x100>;
147 dmas = <&sdma 43 &sdma 44 &sdma 45 &sdma 46>;
148 dma-names = "tx0", "rx0", "tx1", "rx1";
152 compatible = "ti,omap2-rng";
154 reg = <0x480a0000 0x50>;
158 sham: sham@480a4000 {
159 compatible = "ti,omap2-sham";
161 reg = <0x480a4000 0x64>;
167 uart1: serial@4806a000 {
168 compatible = "ti,omap2-uart";
170 reg = <0x4806a000 0x2000>;
172 dmas = <&sdma 49 &sdma 50>;
173 dma-names = "tx", "rx";
174 clock-frequency = <48000000>;
177 uart2: serial@4806c000 {
178 compatible = "ti,omap2-uart";
180 reg = <0x4806c000 0x400>;
182 dmas = <&sdma 51 &sdma 52>;
183 dma-names = "tx", "rx";
184 clock-frequency = <48000000>;
187 uart3: serial@4806e000 {
188 compatible = "ti,omap2-uart";
190 reg = <0x4806e000 0x400>;
192 dmas = <&sdma 53 &sdma 54>;
193 dma-names = "tx", "rx";
194 clock-frequency = <48000000>;
197 timer2_target: target-module@4802a000 {
198 compatible = "ti,sysc-omap2-timer", "ti,sysc";
199 reg = <0x4802a000 0x4>,
202 reg-names = "rev", "sysc", "syss";
203 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
205 SYSC_OMAP2_ENAWAKEUP |
206 SYSC_OMAP2_SOFTRESET |
207 SYSC_OMAP2_AUTOIDLE)>;
208 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
212 clocks = <&gpt2_fck>, <&gpt2_ick>;
213 clock-names = "fck", "ick";
214 #address-cells = <1>;
216 ranges = <0x0 0x4802a000 0x1000>;
219 compatible = "ti,omap2420-timer";
225 timer3: timer@48078000 {
226 compatible = "ti,omap2420-timer";
227 reg = <0x48078000 0x400>;
229 ti,hwmods = "timer3";
232 timer4: timer@4807a000 {
233 compatible = "ti,omap2420-timer";
234 reg = <0x4807a000 0x400>;
236 ti,hwmods = "timer4";
239 timer5: timer@4807c000 {
240 compatible = "ti,omap2420-timer";
241 reg = <0x4807c000 0x400>;
243 ti,hwmods = "timer5";
247 timer6: timer@4807e000 {
248 compatible = "ti,omap2420-timer";
249 reg = <0x4807e000 0x400>;
251 ti,hwmods = "timer6";
255 timer7: timer@48080000 {
256 compatible = "ti,omap2420-timer";
257 reg = <0x48080000 0x400>;
259 ti,hwmods = "timer7";
263 timer8: timer@48082000 {
264 compatible = "ti,omap2420-timer";
265 reg = <0x48082000 0x400>;
267 ti,hwmods = "timer8";
271 timer9: timer@48084000 {
272 compatible = "ti,omap2420-timer";
273 reg = <0x48084000 0x400>;
275 ti,hwmods = "timer9";
279 timer10: timer@48086000 {
280 compatible = "ti,omap2420-timer";
281 reg = <0x48086000 0x400>;
283 ti,hwmods = "timer10";
287 timer11: timer@48088000 {
288 compatible = "ti,omap2420-timer";
289 reg = <0x48088000 0x400>;
291 ti,hwmods = "timer11";
295 timer12: timer@4808a000 {
296 compatible = "ti,omap2420-timer";
297 reg = <0x4808a000 0x400>;
299 ti,hwmods = "timer12";
304 compatible = "ti,omap2-dss";
305 reg = <0x48050000 0x400>;
307 ti,hwmods = "dss_core";
308 #address-cells = <1>;
313 compatible = "ti,omap2-dispc";
314 reg = <0x48050400 0x400>;
316 ti,hwmods = "dss_dispc";
319 rfbi: encoder@48050800 {
320 compatible = "ti,omap2-rfbi";
321 reg = <0x48050800 0x400>;
323 ti,hwmods = "dss_rfbi";
326 venc: encoder@48050c00 {
327 compatible = "ti,omap2-venc";
328 reg = <0x48050c00 0x400>;
330 ti,hwmods = "dss_venc";