4 * Copyright 2012 Roland Stigge <stigge@antcom.de>
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
14 /include/ "skeleton.dtsi"
17 compatible = "nxp,lpc3220";
18 interrupt-parent = <&mic>;
22 compatible = "arm,arm926ejs";
29 compatible = "simple-bus";
30 ranges = <0x20000000 0x20000000 0x30000000>;
33 * Enable either SLC or MLC
36 compatible = "nxp,lpc3220-slc";
37 reg = <0x20020000 0x1000>;
42 compatible = "nxp,lpc3220-mlc";
43 reg = <0x200B0000 0x1000>;
48 compatible = "arm,pl080", "arm,primecell";
49 reg = <0x31000000 0x1000>;
50 interrupts = <0x1c 0>;
54 * Enable either ohci or usbd (gadget)!
57 compatible = "nxp,ohci-nxp", "usb-ohci";
58 reg = <0x31020000 0x300>;
59 interrupts = <0x3b 0>;
64 compatible = "nxp,lpc3220-udc";
65 reg = <0x31020000 0x300>;
66 interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>;
71 compatible = "arm,pl110", "arm,primecell";
72 reg = <0x31040000 0x1000>;
73 interrupts = <0x0e 0>;
77 mac: ethernet@31060000 {
78 compatible = "nxp,lpc-eth";
79 reg = <0x31060000 0x1000>;
80 interrupts = <0x1d 0>;
86 compatible = "simple-bus";
87 ranges = <0x20000000 0x20000000 0x30000000>;
90 compatible = "arm,pl022", "arm,primecell";
91 reg = <0x20084000 0x1000>;
92 interrupts = <0x14 0>;
96 compatible = "nxp,lpc3220-spi";
97 reg = <0x20088000 0x1000>;
101 compatible = "arm,pl022", "arm,primecell";
102 reg = <0x2008c000 0x1000>;
103 interrupts = <0x15 0>;
107 compatible = "nxp,lpc3220-spi";
108 reg = <0x20090000 0x1000>;
112 compatible = "nxp,lpc3220-i2s";
113 reg = <0x20094000 0x1000>;
117 compatible = "arm,pl180", "arm,primecell";
118 reg = <0x20098000 0x1000>;
119 interrupts = <0x0f 0>, <0x0d 0>;
123 compatible = "nxp,lpc3220-i2s";
124 reg = <0x2009C000 0x1000>;
127 uart3: serial@40080000 {
128 compatible = "nxp,serial";
129 reg = <0x40080000 0x1000>;
132 uart4: serial@40088000 {
133 compatible = "nxp,serial";
134 reg = <0x40088000 0x1000>;
137 uart5: serial@40090000 {
138 compatible = "nxp,serial";
139 reg = <0x40090000 0x1000>;
142 uart6: serial@40098000 {
143 compatible = "nxp,serial";
144 reg = <0x40098000 0x1000>;
148 compatible = "nxp,pnx-i2c";
149 reg = <0x400A0000 0x100>;
150 interrupts = <0x33 0>;
151 #address-cells = <1>;
153 pnx,timeout = <0x64>;
157 compatible = "nxp,pnx-i2c";
158 reg = <0x400A8000 0x100>;
159 interrupts = <0x32 0>;
160 #address-cells = <1>;
162 pnx,timeout = <0x64>;
165 i2cusb: i2c@31020300 {
166 compatible = "nxp,pnx-i2c";
167 reg = <0x31020300 0x100>;
168 interrupts = <0x3f 0>;
169 #address-cells = <1>;
171 pnx,timeout = <0x64>;
176 #address-cells = <1>;
178 compatible = "simple-bus";
179 ranges = <0x20000000 0x20000000 0x30000000>;
182 * MIC Interrupt controller includes:
187 mic: interrupt-controller@40008000 {
188 compatible = "nxp,lpc3220-mic";
189 interrupt-controller;
190 reg = <0x40008000 0xC000>;
191 #interrupt-cells = <2>;
194 uart1: serial@40014000 {
195 compatible = "nxp,serial";
196 reg = <0x40014000 0x1000>;
199 uart2: serial@40018000 {
200 compatible = "nxp,serial";
201 reg = <0x40018000 0x1000>;
204 uart7: serial@4001C000 {
205 compatible = "nxp,serial";
206 reg = <0x4001C000 0x1000>;
210 compatible = "nxp,lpc3220-rtc";
211 reg = <0x40024000 0x1000>;
212 interrupts = <0x34 0>;
215 gpio: gpio@40028000 {
216 compatible = "nxp,lpc3220-gpio";
217 reg = <0x40028000 0x1000>;
219 #gpio-cells = <3>; /* bank, pin, flags */
223 compatible = "nxp,pnx4008-wdt";
224 reg = <0x4003C000 0x1000>;
228 * TSC vs. ADC: Since those two share the same
229 * hardware, you need to choose from one of the
230 * following two and do 'status = "okay";' for one of
235 compatible = "nxp,lpc3220-adc";
236 reg = <0x40048000 0x1000>;
237 interrupts = <0x27 0>;
242 compatible = "nxp,lpc3220-tsc";
243 reg = <0x40048000 0x1000>;
244 interrupts = <0x27 0>;
249 compatible = "nxp,lpc3220-key";
250 reg = <0x40050000 0x1000>;