2 * Copyright 2013 Texas Instruments, Inc.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/gpio/gpio.h>
12 #include "skeleton.dtsi"
15 model = "Texas Instruments Keystone 2 SoC";
18 interrupt-parent = <&gic>;
25 reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
28 gic: interrupt-controller {
29 compatible = "arm,cortex-a15-gic";
30 #interrupt-cells = <3>;
32 reg = <0x0 0x02561000 0x0 0x1000>,
33 <0x0 0x02562000 0x0 0x2000>,
34 <0x0 0x02564000 0x0 0x1000>,
35 <0x0 0x02566000 0x0 0x2000>;
36 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
37 IRQ_TYPE_LEVEL_HIGH)>;
41 compatible = "arm,armv7-timer";
44 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
46 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
48 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
50 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
54 compatible = "arm,cortex-a15-pmu";
55 interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
56 <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
57 <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
58 <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
64 compatible = "ti,keystone","simple-bus";
65 interrupt-parent = <&gic>;
66 ranges = <0x0 0x0 0x0 0xc0000000>;
67 dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
69 rstctrl: reset-controller {
70 compatible = "ti,keystone-reset";
71 reg = <0x023100e8 4>; /* pll reset control reg */
74 /include/ "keystone-clocks.dtsi"
76 uart0: serial@02530c00 {
77 compatible = "ns16550a";
78 current-speed = <115200>;
81 reg = <0x02530c00 0x100>;
83 interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
86 uart1: serial@02531000 {
87 compatible = "ns16550a";
88 current-speed = <115200>;
91 reg = <0x02531000 0x100>;
93 interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
97 compatible = "ti,davinci-i2c";
98 reg = <0x02530000 0x400>;
99 clock-frequency = <100000>;
101 interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>;
102 #address-cells = <1>;
107 compatible = "ti,davinci-i2c";
108 reg = <0x02530400 0x400>;
109 clock-frequency = <100000>;
111 interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>;
112 #address-cells = <1>;
117 compatible = "ti,davinci-i2c";
118 reg = <0x02530800 0x400>;
119 clock-frequency = <100000>;
121 interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
122 #address-cells = <1>;
127 compatible = "ti,dm6441-spi";
128 reg = <0x21000400 0x200>;
130 ti,davinci-spi-intr-line = <0>;
131 interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>;
133 #address-cells = <1>;
138 compatible = "ti,dm6441-spi";
139 reg = <0x21000600 0x200>;
141 ti,davinci-spi-intr-line = <0>;
142 interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>;
144 #address-cells = <1>;
149 compatible = "ti,dm6441-spi";
150 reg = <0x21000800 0x200>;
152 ti,davinci-spi-intr-line = <0>;
153 interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
155 #address-cells = <1>;
159 usb_phy: usb_phy@2620738 {
160 compatible = "ti,keystone-usbphy";
161 #address-cells = <1>;
163 reg = <0x2620738 32>;
168 compatible = "ti,keystone-dwc3";
169 #address-cells = <1>;
171 reg = <0x2680000 0x10000>;
174 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
181 compatible = "synopsys,dwc3";
182 reg = <0x2690000 0x70000>;
183 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
184 usb-phy = <&usb_phy>, <&usb_phy>;
189 compatible = "ti,keystone-wdt","ti,davinci-wdt";
190 reg = <0x022f0080 0x80>;
191 clocks = <&clkwdtimer0>;
194 clock_event: timer@22f0000 {
195 compatible = "ti,keystone-timer";
196 reg = <0x022f0000 0x80>;
197 interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>;
198 clocks = <&clktimer15>;
201 gpio0: gpio@260bf00 {
202 compatible = "ti,keystone-gpio";
203 reg = <0x0260bf00 0x100>;
206 /* HW Interrupts mapped to GPIO pins */
207 interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
208 <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
209 <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
210 <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
211 <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
212 <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
213 <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
214 <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
215 <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
216 <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
217 <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
218 <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
219 <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
220 <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
221 <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
222 <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
223 <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
224 <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
225 <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
226 <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
227 <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
228 <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
229 <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
230 <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
231 <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
232 <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
233 <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
234 <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
235 <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
236 <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
237 <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
238 <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
240 clock-names = "gpio";
242 ti,davinci-gpio-unbanked = <32>;
245 aemif: aemif@21000A00 {
246 compatible = "ti,keystone-aemif", "ti,davinci-aemif";
247 #address-cells = <2>;
249 clocks = <&clkaemif>;
250 clock-names = "aemif";
253 reg = <0x21000A00 0x00000100>;
254 ranges = <0 0 0x30000000 0x10000000
255 1 0 0x21000A00 0x00000100>;