arch/arm/boot/dts/keystone-k2g.dtsi

   1 /*
   2  * Device Tree Source for K2G SOC
   3  *
   4  * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11  * kind, whether express or implied; without even the implied warranty
  12  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <dt-bindings/interrupt-controller/arm-gic.h>
  17 #include <dt-bindings/pinctrl/keystone.h>
  18 #include <dt-bindings/gpio/gpio.h>
  19
  20 / {
  21         compatible = "ti,k2g","ti,keystone";
  22         model = "Texas Instruments K2G SoC";
  23         #address-cells = <2>;
  24         #size-cells = <2>;
  25         interrupt-parent = <&gic>;
  26
  27         chosen { };
  28
  29         aliases {
  30                 serial0 = &uart0;
  31         };
  32
  33         cpus {
  34                 #address-cells = <1>;
  35                 #size-cells = <0>;
  36
  37                 cpu@0 {
  38                         compatible = "arm,cortex-a15";
  39                         device_type = "cpu";
  40                         reg = <0>;
  41                 };
  42         };
  43
  44         gic: interrupt-controller@02561000 {
  45                 compatible = "arm,gic-400", "arm,cortex-a15-gic";
  46                 #interrupt-cells = <3>;
  47                 interrupt-controller;
  48                 reg = <0x0 0x02561000 0x0 0x1000>,
  49                       <0x0 0x02562000 0x0 0x2000>,
  50                       <0x0 0x02564000 0x0 0x2000>,
  51                       <0x0 0x02566000 0x0 0x2000>;
  52                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
  53                                 IRQ_TYPE_LEVEL_HIGH)>;
  54         };
  55
  56         timer {
  57                 compatible = "arm,armv7-timer";
  58                 interrupts =
  59                         <GIC_PPI 13
  60                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  61                         <GIC_PPI 14
  62                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  63                         <GIC_PPI 11
  64                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  65                         <GIC_PPI 10
  66                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
  67         };
  68
  69         pmu {
  70                 compatible = "arm,cortex-a15-pmu";
  71                 interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
  72         };
  73
  74         soc {
  75                 #address-cells = <1>;
  76                 #size-cells = <1>;
  77                 #pinctrl-cells = <1>;
  78                 compatible = "ti,keystone","simple-bus";
  79                 ranges = <0x0 0x0 0x0 0xc0000000>;
  80                 dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
  81
  82                 msm_ram: msmram@0c000000 {
  83                         compatible = "mmio-sram";
  84                         reg = <0x0c000000 0x100000>;
  85                         ranges = <0x0 0x0c000000 0x100000>;
  86                         #address-cells = <1>;
  87                         #size-cells = <1>;
  88
  89                         sram-bm@f7000 {
  90                                 reg = <0x000f7000 0x8000>;
  91                         };
  92                 };
  93
  94                 k2g_pinctrl: pinmux@02621000 {
  95                         compatible = "pinctrl-single";
  96                         reg = <0x02621000 0x410>;
  97                         pinctrl-single,register-width = <32>;
  98                         pinctrl-single,function-mask = <0x001b0007>;
  99                 };
 100
 101                 devctrl: device-state-control@02620000 {
 102                         compatible = "ti,keystone-devctrl", "syscon";
 103                         reg = <0x02620000 0x1000>;
 104                 };
 105
 106                 uart0: serial@02530c00 {
 107                         compatible = "ti,da830-uart", "ns16550a";
 108                         current-speed = <115200>;
 109                         reg-shift = <2>;
 110                         reg-io-width = <4>;
 111                         reg = <0x02530c00 0x100>;
 112                         interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
 113                         clock-frequency = <200000000>;
 114                         status = "disabled";
 115                 };
 116
 117                 dcan0: can@0260B200 {
 118                         compatible = "ti,am4372-d_can", "ti,am3352-d_can";
 119                         reg = <0x0260B200 0x200>;
 120                         interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
 121                         status = "disabled";
 122                         power-domains = <&k2g_pds 0x0008>;
 123                         clocks = <&k2g_clks 0x0008 1>;
 124                 };
 125
 126                 dcan1: can@0260B400 {
 127                         compatible = "ti,am4372-d_can", "ti,am3352-d_can";
 128                         reg = <0x0260B400 0x200>;
 129                         interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
 130                         status = "disabled";
 131                         power-domains = <&k2g_pds 0x0009>;
 132                         clocks = <&k2g_clks 0x0009 1>;
 133                 };
 134
 135                 kirq0: keystone_irq@026202a0 {
 136                         compatible = "ti,keystone-irq";
 137                         interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
 138                         interrupt-controller;
 139                         #interrupt-cells = <1>;
 140                         ti,syscon-dev = <&devctrl 0x2a0>;
 141                 };
 142
 143                 dspgpio0: keystone_dsp_gpio@02620240 {
 144                         compatible = "ti,keystone-dsp-gpio";
 145                         gpio-controller;
 146                         #gpio-cells = <2>;
 147                         gpio,syscon-dev = <&devctrl 0x240>;
 148                 };
 149
 150                 msgmgr: msgmgr@02a00000 {
 151                         compatible = "ti,k2g-message-manager";
 152                         #mbox-cells = <2>;
 153                         reg-names = "queue_proxy_region",
 154                                     "queue_state_debug_region";
 155                         reg = <0x02a00000 0x400000>, <0x028c3400 0x400>;
 156                         interrupt-names = "rx_005",
 157                                           "rx_057";
 158                         interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
 159                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
 160                 };
 161
 162                 pmmc: pmmc@02921c00 {
 163                         compatible = "ti,k2g-sci";
 164                         /*
 165                          * In case of rare platforms that does not use k2g as
 166                          * system master, use /delete-property/
 167                          */
 168                         ti,system-reboot-controller;
 169                         mbox-names = "rx", "tx";
 170                         mboxes= <&msgmgr 5 2>,
 171                                 <&msgmgr 0 0>;
 172                         reg-names = "debug_messages";
 173                         reg = <0x02921c00 0x400>;
 174
 175                         k2g_pds: power-controller {
 176                                 compatible = "ti,sci-pm-domain";
 177                                 #power-domain-cells = <1>;
 178                         };
 179
 180                         k2g_clks: clocks {
 181                                 compatible = "ti,k2g-sci-clk";
 182                                 #clock-cells = <2>;
 183                         };
 184
 185                         k2g_reset: reset-controller {
 186                                 compatible = "ti,sci-reset";
 187                                 #reset-cells = <2>;
 188                         };
 189                 };
 190
 191                 gpio0: gpio@2603000 {
 192                         compatible = "ti,k2g-gpio", "ti,keystone-gpio";
 193                         reg = <0x02603000 0x100>;
 194                         gpio-controller;
 195                         #gpio-cells = <2>;
 196
 197                         interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>,
 198                                         <GIC_SPI 433 IRQ_TYPE_EDGE_RISING>,
 199                                         <GIC_SPI 434 IRQ_TYPE_EDGE_RISING>,
 200                                         <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>,
 201                                         <GIC_SPI 436 IRQ_TYPE_EDGE_RISING>,
 202                                         <GIC_SPI 437 IRQ_TYPE_EDGE_RISING>,
 203                                         <GIC_SPI 438 IRQ_TYPE_EDGE_RISING>,
 204                                         <GIC_SPI 439 IRQ_TYPE_EDGE_RISING>,
 205                                         <GIC_SPI 440 IRQ_TYPE_EDGE_RISING>;
 206                         interrupt-controller;
 207                         #interrupt-cells = <2>;
 208                         ti,ngpio = <144>;
 209                         ti,davinci-gpio-unbanked = <0>;
 210                         clocks = <&k2g_clks 0x001b 0x0>;
 211                         clock-names = "gpio";
 212                 };
 213
 214                 gpio1: gpio@260a000 {
 215                         compatible = "ti,k2g-gpio", "ti,keystone-gpio";
 216                         reg = <0x0260a000 0x100>;
 217                         gpio-controller;
 218                         #gpio-cells = <2>;
 219                         interrupts = <GIC_SPI 442 IRQ_TYPE_EDGE_RISING>,
 220                                         <GIC_SPI 443 IRQ_TYPE_EDGE_RISING>,
 221                                         <GIC_SPI 444 IRQ_TYPE_EDGE_RISING>,
 222                                         <GIC_SPI 445 IRQ_TYPE_EDGE_RISING>,
 223                                         <GIC_SPI 446 IRQ_TYPE_EDGE_RISING>;
 224                         interrupt-controller;
 225                         #interrupt-cells = <2>;
 226                         ti,ngpio = <68>;
 227                         ti,davinci-gpio-unbanked = <0>;
 228                         clocks = <&k2g_clks 0x001c 0x0>;
 229                         clock-names = "gpio";
 230                 };
 231
 232                 edma0: edma@02700000 {
 233                         compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
 234                         reg =   <0x02700000 0x8000>;
 235                         reg-names = "edma3_cc";
 236                         interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>,
 237                                         <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>,
 238                                         <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
 239                         interrupt-names = "edma3_ccint", "emda3_mperr",
 240                                           "edma3_ccerrint";
 241                         dma-requests = <64>;
 242                         #dma-cells = <2>;
 243
 244                         ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
 245
 246                         ti,edma-memcpy-channels = <32 33 34 35>;
 247
 248                         power-domains = <&k2g_pds 0x3f>;
 249                 };
 250
 251                 edma0_tptc0: tptc@02760000 {
 252                         compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
 253                         reg =   <0x02760000 0x400>;
 254                         power-domains = <&k2g_pds 0x3f>;
 255                 };
 256
 257                 edma0_tptc1: tptc@02768000 {
 258                         compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
 259                         reg =   <0x02768000 0x400>;
 260                         power-domains = <&k2g_pds 0x3f>;
 261                 };
 262
 263                 edma1: edma@02728000 {
 264                         compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
 265                         reg =   <0x02728000 0x8000>;
 266                         reg-names = "edma3_cc";
 267                         interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
 268                                         <GIC_SPI 219 IRQ_TYPE_EDGE_RISING>,
 269                                         <GIC_SPI 220 IRQ_TYPE_EDGE_RISING>;
 270                         interrupt-names = "edma3_ccint", "emda3_mperr",
 271                                           "edma3_ccerrint";
 272                         dma-requests = <64>;
 273                         #dma-cells = <2>;
 274
 275                         ti,tptcs = <&edma1_tptc0 7>, <&edma1_tptc1 0>;
 276
 277                         /*
 278                          * memcpy is disabled, can be enabled with:
 279                          * ti,edma-memcpy-channels = <12 13 14 15>;
 280                          * for example.
 281                          */
 282
 283                         power-domains = <&k2g_pds 0x4f>;
 284                 };
 285
 286                 edma1_tptc0: tptc@027b0000 {
 287                         compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
 288                         reg =   <0x027b0000 0x400>;
 289                         power-domains = <&k2g_pds 0x4f>;
 290                 };
 291
 292                 edma1_tptc1: tptc@027b8000 {
 293                         compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
 294                         reg =   <0x027b8000 0x400>;
 295                         power-domains = <&k2g_pds 0x4f>;
 296                 };
 297
 298                 mmc0: mmc@23000000 {
 299                         compatible = "ti,k2g-hsmmc", "ti,omap4-hsmmc";
 300                         reg = <0x23000000 0x400>;
 301                         interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
 302                         dmas = <&edma1 24 0>, <&edma1 25 0>;
 303                         dma-names = "tx", "rx";
 304                         bus-width = <4>;
 305                         ti,needs-special-reset;
 306                         no-1-8-v;
 307                         max-frequency = <96000000>;
 308                         power-domains = <&k2g_pds 0xb>;
 309                         clocks = <&k2g_clks 0xb 1>, <&k2g_clks 0xb 2>;
 310                         clock-names = "fck", "mmchsdb_fck";
 311                         status = "disabled";
 312                 };
 313
 314                 mmc1: mmc@23100000 {
 315                         compatible = "ti,k2g-hsmmc", "ti,omap4-hsmmc";
 316                         reg = <0x23100000 0x400>;
 317                         interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
 318                         dmas = <&edma1 26 0>, <&edma1 27 0>;
 319                         dma-names = "tx", "rx";
 320                         bus-width = <8>;
 321                         ti,needs-special-reset;
 322                         ti,non-removable;
 323                         max-frequency = <96000000>;
 324                         power-domains = <&k2g_pds 0xc>;
 325                         clocks = <&k2g_clks 0xc 1>, <&k2g_clks 0xc 2>;
 326                         clock-names = "fck", "mmchsdb_fck";
 327                         status = "disabled";
 328                 };
 329         };
 330 };