1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2013 Gateworks Corporation
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
11 /* these are used by bootloader for disabling nodes */
23 bootargs = "console=ttymxc1,115200";
27 compatible = "pwm-backlight";
28 pwms = <&pwm4 0 5000000>;
29 brightness-levels = <0 4 8 16 32 64 128 255>;
30 default-brightness-level = <7>;
34 compatible = "gpio-keys";
38 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
45 interrupt-parent = <&gsc>;
52 interrupt-parent = <&gsc>;
59 interrupt-parent = <&gsc>;
66 interrupt-parent = <&gsc>;
71 label = "switch_hold";
73 interrupt-parent = <&gsc>;
79 compatible = "gpio-leds";
80 pinctrl-names = "default";
81 pinctrl-0 = <&pinctrl_gpio_leds>;
85 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
87 linux,default-trigger = "heartbeat";
92 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
93 default-state = "off";
98 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
99 default-state = "off";
104 device_type = "memory";
105 reg = <0x10000000 0x40000000>;
109 compatible = "pps-gpio";
110 pinctrl-names = "default";
111 pinctrl-0 = <&pinctrl_pps>;
112 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
116 reg_1p0v: regulator-1p0v {
117 compatible = "regulator-fixed";
118 regulator-name = "1P0V";
119 regulator-min-microvolt = <1000000>;
120 regulator-max-microvolt = <1000000>;
124 reg_3p3v: regulator-3p3v {
125 compatible = "regulator-fixed";
126 regulator-name = "3P3V";
127 regulator-min-microvolt = <3300000>;
128 regulator-max-microvolt = <3300000>;
132 reg_usb_h1_vbus: regulator-usb-h1-vbus {
133 compatible = "regulator-fixed";
134 regulator-name = "usb_h1_vbus";
135 regulator-min-microvolt = <5000000>;
136 regulator-max-microvolt = <5000000>;
140 reg_usb_otg_vbus: regulator-usb-otg-vbus {
141 compatible = "regulator-fixed";
142 regulator-name = "usb_otg_vbus";
143 regulator-min-microvolt = <5000000>;
144 regulator-max-microvolt = <5000000>;
145 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
150 compatible = "fsl,imx6q-ventana-sgtl5000",
151 "fsl,imx-audio-sgtl5000";
152 model = "sgtl5000-audio";
153 ssi-controller = <&ssi1>;
154 audio-codec = <&codec>;
156 "MIC_IN", "Mic Jack",
157 "Mic Jack", "Mic Bias",
158 "Headphone Jack", "HP_OUT";
165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_audmux>;
171 pinctrl-names = "default";
172 pinctrl-0 = <&pinctrl_flexcan1>;
177 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
178 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
179 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
180 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
184 pinctrl-names = "default";
185 pinctrl-0 = <&pinctrl_enet>;
186 phy-mode = "rgmii-id";
187 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
192 pinctrl-names = "default";
193 pinctrl-0 = <&pinctrl_gpmi_nand>;
198 ddc-i2c-bus = <&i2c3>;
203 clock-frequency = <100000>;
204 pinctrl-names = "default";
205 pinctrl-0 = <&pinctrl_i2c1>;
209 compatible = "gw,gsc";
211 interrupt-parent = <&gpio1>;
212 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
213 interrupt-controller;
214 #interrupt-cells = <1>;
218 compatible = "gw,gsc-adc";
219 #address-cells = <1>;
309 compatible = "nxp,pca9555";
313 interrupt-parent = <&gsc>;
318 compatible = "atmel,24c02";
324 compatible = "atmel,24c02";
330 compatible = "atmel,24c02";
336 compatible = "atmel,24c02";
342 compatible = "dallas,ds1672";
348 clock-frequency = <100000>;
349 pinctrl-names = "default";
350 pinctrl-0 = <&pinctrl_i2c2>;
354 compatible = "lltc,ltc3676";
356 interrupt-parent = <&gpio1>;
357 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
360 /* VDD_SOC (1+R1/R2 = 1.635) */
362 regulator-name = "vddsoc";
363 regulator-min-microvolt = <674400>;
364 regulator-max-microvolt = <1308000>;
365 lltc,fb-voltage-divider = <127000 200000>;
366 regulator-ramp-delay = <7000>;
371 /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
373 regulator-name = "vdd1p8";
374 regulator-min-microvolt = <1033310>;
375 regulator-max-microvolt = <2004000>;
376 lltc,fb-voltage-divider = <301000 200000>;
377 regulator-ramp-delay = <7000>;
382 /* VDD_ARM (1+R1/R2 = 1.635) */
384 regulator-name = "vddarm";
385 regulator-min-microvolt = <674400>;
386 regulator-max-microvolt = <1308000>;
387 lltc,fb-voltage-divider = <127000 200000>;
388 regulator-ramp-delay = <7000>;
393 /* VDD_DDR (1+R1/R2 = 2.105) */
395 regulator-name = "vddddr";
396 regulator-min-microvolt = <868310>;
397 regulator-max-microvolt = <1684000>;
398 lltc,fb-voltage-divider = <221000 200000>;
399 regulator-ramp-delay = <7000>;
404 /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
406 regulator-name = "vdd2p5";
407 regulator-min-microvolt = <2490375>;
408 regulator-max-microvolt = <2490375>;
409 lltc,fb-voltage-divider = <487000 200000>;
414 /* VDD_AUD_1P8: Audio codec */
416 regulator-name = "vdd1p8a";
417 regulator-min-microvolt = <1800000>;
418 regulator-max-microvolt = <1800000>;
422 /* VDD_HIGH (1+R1/R2 = 4.17) */
424 regulator-name = "vdd3p0";
425 regulator-min-microvolt = <3023250>;
426 regulator-max-microvolt = <3023250>;
427 lltc,fb-voltage-divider = <634000 200000>;
436 clock-frequency = <100000>;
437 pinctrl-names = "default";
438 pinctrl-0 = <&pinctrl_i2c3>;
442 compatible = "fsl,sgtl5000";
444 clocks = <&clks IMX6QDL_CLK_CKO>;
445 VDDA-supply = <®_1p8v>;
446 VDDIO-supply = <®_3p3v>;
449 touchscreen: egalax_ts@4 {
450 compatible = "eeti,egalax_ts";
452 interrupt-parent = <&gpio1>;
454 wakeup-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
458 compatible = "nxp,fxos8700";
467 fsl,data-mapping = "spwg";
468 fsl,data-width = <18>;
472 native-mode = <&timing0>;
473 timing0: hsd100pxn1 {
474 clock-frequency = <65000000>;
489 pinctrl-names = "default";
490 pinctrl-0 = <&pinctrl_pcie>;
491 reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
496 pinctrl-names = "default";
497 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
502 pinctrl-names = "default";
503 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
509 pinctrl-names = "default";
510 pinctrl-0 = <&pinctrl_pwm4>;
519 pinctrl-names = "default";
520 pinctrl-0 = <&pinctrl_uart1>;
521 rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
526 pinctrl-names = "default";
527 pinctrl-0 = <&pinctrl_uart2>;
532 pinctrl-names = "default";
533 pinctrl-0 = <&pinctrl_uart5>;
538 vbus-supply = <®_usb_otg_vbus>;
539 pinctrl-names = "default";
540 pinctrl-0 = <&pinctrl_usbotg>;
541 disable-over-current;
546 vbus-supply = <®_usb_h1_vbus>;
551 pinctrl-names = "default", "state_100mhz", "state_200mhz";
552 pinctrl-0 = <&pinctrl_usdhc3>;
553 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
554 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
555 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
556 vmmc-supply = <®_3p3v>;
557 no-1-8-v; /* firmware will remove if board revision supports */
562 pinctrl-names = "default";
563 pinctrl-0 = <&pinctrl_wdog>;
564 fsl,ext-reset-output;
568 pinctrl_audmux: audmuxgrp {
570 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
571 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
572 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
573 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
574 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
578 pinctrl_enet: enetgrp {
580 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
581 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
582 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
583 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
584 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
585 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
586 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
587 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
588 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
589 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
590 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
591 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
592 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
593 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
594 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
595 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
599 pinctrl_flexcan1: flexcan1grp {
601 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
602 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
603 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */
607 pinctrl_gpio_leds: gpioledsgrp {
609 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
610 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
611 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
615 pinctrl_gpmi_nand: gpminandgrp {
617 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
618 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
619 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
620 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
621 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
622 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
623 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
624 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
625 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
626 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
627 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
628 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
629 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
630 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
631 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
635 pinctrl_i2c1: i2c1grp {
637 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
638 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
639 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
643 pinctrl_i2c2: i2c2grp {
645 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
646 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
650 pinctrl_i2c3: i2c3grp {
652 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
653 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
657 pinctrl_pcie: pciegrp {
659 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
660 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
664 pinctrl_pmic: pmicgrp {
666 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
670 pinctrl_pps: ppsgrp {
672 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
676 pinctrl_pwm2: pwm2grp {
678 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
682 pinctrl_pwm3: pwm3grp {
684 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
688 pinctrl_pwm4: pwm4grp {
690 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
694 pinctrl_uart1: uart1grp {
696 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
697 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
698 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
702 pinctrl_uart2: uart2grp {
704 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
705 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
709 pinctrl_uart5: uart5grp {
711 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
712 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
716 pinctrl_usbotg: usbotggrp {
718 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
719 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
720 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */
724 pinctrl_usdhc3: usdhc3grp {
726 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
727 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
728 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
729 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
730 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
731 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
732 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
733 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
737 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
739 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
740 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
741 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
742 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
743 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
744 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
745 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
746 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
750 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
752 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
753 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
754 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
755 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
756 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
757 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
758 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
759 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
763 pinctrl_wdog: wdoggrp {
765 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0