arch/arm/boot/dts/imx27.dtsi

   1 /*
   2  * Copyright 2012 Sascha Hauer, Pengutronix
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include "skeleton.dtsi"
  13
  14 / {
  15         aliases {
  16                 serial0 = &uart1;
  17                 serial1 = &uart2;
  18                 serial2 = &uart3;
  19                 serial3 = &uart4;
  20                 serial4 = &uart5;
  21                 serial5 = &uart6;
  22                 gpio0 = &gpio1;
  23                 gpio1 = &gpio2;
  24                 gpio2 = &gpio3;
  25                 gpio3 = &gpio4;
  26                 gpio4 = &gpio5;
  27                 gpio5 = &gpio6;
  28         };
  29
  30         avic: avic-interrupt-controller@e0000000 {
  31                 compatible = "fsl,imx27-avic", "fsl,avic";
  32                 interrupt-controller;
  33                 #interrupt-cells = <1>;
  34                 reg = <0x10040000 0x1000>;
  35         };
  36
  37         clocks {
  38                 #address-cells = <1>;
  39                 #size-cells = <0>;
  40
  41                 osc26m {
  42                         compatible = "fsl,imx-osc26m", "fixed-clock";
  43                         clock-frequency = <26000000>;
  44                 };
  45         };
  46
  47         soc {
  48                 #address-cells = <1>;
  49                 #size-cells = <1>;
  50                 compatible = "simple-bus";
  51                 interrupt-parent = <&avic>;
  52                 ranges;
  53
  54                 aipi@10000000 { /* AIPI1 */
  55                         compatible = "fsl,aipi-bus", "simple-bus";
  56                         #address-cells = <1>;
  57                         #size-cells = <1>;
  58                         reg = <0x10000000 0x20000>;
  59                         ranges;
  60
  61                         wdog: wdog@10002000 {
  62                                 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
  63                                 reg = <0x10002000 0x1000>;
  64                                 interrupts = <27>;
  65                                 clocks = <&clks 0>;
  66                         };
  67
  68                         gpt1: timer@10003000 {
  69                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
  70                                 reg = <0x10003000 0x1000>;
  71                                 interrupts = <26>;
  72                         };
  73
  74                         gpt2: timer@10004000 {
  75                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
  76                                 reg = <0x10004000 0x1000>;
  77                                 interrupts = <25>;
  78                         };
  79
  80                         gpt3: timer@10005000 {
  81                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
  82                                 reg = <0x10005000 0x1000>;
  83                                 interrupts = <24>;
  84                         };
  85
  86                         uart1: serial@1000a000 {
  87                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
  88                                 reg = <0x1000a000 0x1000>;
  89                                 interrupts = <20>;
  90                                 clocks = <&clks 81>, <&clks 61>;
  91                                 clock-names = "ipg", "per";
  92                                 status = "disabled";
  93                         };
  94
  95                         uart2: serial@1000b000 {
  96                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
  97                                 reg = <0x1000b000 0x1000>;
  98                                 interrupts = <19>;
  99                                 clocks = <&clks 80>, <&clks 61>;
 100                                 clock-names = "ipg", "per";
 101                                 status = "disabled";
 102                         };
 103
 104                         uart3: serial@1000c000 {
 105                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 106                                 reg = <0x1000c000 0x1000>;
 107                                 interrupts = <18>;
 108                                 clocks = <&clks 79>, <&clks 61>;
 109                                 clock-names = "ipg", "per";
 110                                 status = "disabled";
 111                         };
 112
 113                         uart4: serial@1000d000 {
 114                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 115                                 reg = <0x1000d000 0x1000>;
 116                                 interrupts = <17>;
 117                                 clocks = <&clks 78>, <&clks 61>;
 118                                 clock-names = "ipg", "per";
 119                                 status = "disabled";
 120                         };
 121
 122                         cspi1: cspi@1000e000 {
 123                                 #address-cells = <1>;
 124                                 #size-cells = <0>;
 125                                 compatible = "fsl,imx27-cspi";
 126                                 reg = <0x1000e000 0x1000>;
 127                                 interrupts = <16>;
 128                                 clocks = <&clks 53>, <&clks 0>;
 129                                 clock-names = "ipg", "per";
 130                                 status = "disabled";
 131                         };
 132
 133                         cspi2: cspi@1000f000 {
 134                                 #address-cells = <1>;
 135                                 #size-cells = <0>;
 136                                 compatible = "fsl,imx27-cspi";
 137                                 reg = <0x1000f000 0x1000>;
 138                                 interrupts = <15>;
 139                                 clocks = <&clks 52>, <&clks 0>;
 140                                 clock-names = "ipg", "per";
 141                                 status = "disabled";
 142                         };
 143
 144                         i2c1: i2c@10012000 {
 145                                 #address-cells = <1>;
 146                                 #size-cells = <0>;
 147                                 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
 148                                 reg = <0x10012000 0x1000>;
 149                                 interrupts = <12>;
 150                                 clocks = <&clks 40>;
 151                                 status = "disabled";
 152                         };
 153
 154                         gpio1: gpio@10015000 {
 155                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 156                                 reg = <0x10015000 0x100>;
 157                                 interrupts = <8>;
 158                                 gpio-controller;
 159                                 #gpio-cells = <2>;
 160                                 interrupt-controller;
 161                                 #interrupt-cells = <2>;
 162                         };
 163
 164                         gpio2: gpio@10015100 {
 165                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 166                                 reg = <0x10015100 0x100>;
 167                                 interrupts = <8>;
 168                                 gpio-controller;
 169                                 #gpio-cells = <2>;
 170                                 interrupt-controller;
 171                                 #interrupt-cells = <2>;
 172                         };
 173
 174                         gpio3: gpio@10015200 {
 175                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 176                                 reg = <0x10015200 0x100>;
 177                                 interrupts = <8>;
 178                                 gpio-controller;
 179                                 #gpio-cells = <2>;
 180                                 interrupt-controller;
 181                                 #interrupt-cells = <2>;
 182                         };
 183
 184                         gpio4: gpio@10015300 {
 185                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 186                                 reg = <0x10015300 0x100>;
 187                                 interrupts = <8>;
 188                                 gpio-controller;
 189                                 #gpio-cells = <2>;
 190                                 interrupt-controller;
 191                                 #interrupt-cells = <2>;
 192                         };
 193
 194                         gpio5: gpio@10015400 {
 195                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 196                                 reg = <0x10015400 0x100>;
 197                                 interrupts = <8>;
 198                                 gpio-controller;
 199                                 #gpio-cells = <2>;
 200                                 interrupt-controller;
 201                                 #interrupt-cells = <2>;
 202                         };
 203
 204                         gpio6: gpio@10015500 {
 205                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 206                                 reg = <0x10015500 0x100>;
 207                                 interrupts = <8>;
 208                                 gpio-controller;
 209                                 #gpio-cells = <2>;
 210                                 interrupt-controller;
 211                                 #interrupt-cells = <2>;
 212                         };
 213
 214                         cspi3: cspi@10017000 {
 215                                 #address-cells = <1>;
 216                                 #size-cells = <0>;
 217                                 compatible = "fsl,imx27-cspi";
 218                                 reg = <0x10017000 0x1000>;
 219                                 interrupts = <6>;
 220                                 clocks = <&clks 51>, <&clks 0>;
 221                                 clock-names = "ipg", "per";
 222                                 status = "disabled";
 223                         };
 224
 225                         gpt4: timer@10019000 {
 226                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 227                                 reg = <0x10019000 0x1000>;
 228                                 interrupts = <4>;
 229                         };
 230
 231                         gpt5: timer@1001a000 {
 232                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 233                                 reg = <0x1001a000 0x1000>;
 234                                 interrupts = <3>;
 235                         };
 236
 237                         uart5: serial@1001b000 {
 238                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 239                                 reg = <0x1001b000 0x1000>;
 240                                 interrupts = <49>;
 241                                 clocks = <&clks 77>, <&clks 61>;
 242                                 clock-names = "ipg", "per";
 243                                 status = "disabled";
 244                         };
 245
 246                         uart6: serial@1001c000 {
 247                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 248                                 reg = <0x1001c000 0x1000>;
 249                                 interrupts = <48>;
 250                                 clocks = <&clks 78>, <&clks 61>;
 251                                 clock-names = "ipg", "per";
 252                                 status = "disabled";
 253                         };
 254
 255                         i2c2: i2c@1001d000 {
 256                                 #address-cells = <1>;
 257                                 #size-cells = <0>;
 258                                 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
 259                                 reg = <0x1001d000 0x1000>;
 260                                 interrupts = <1>;
 261                                 clocks = <&clks 39>;
 262                                 status = "disabled";
 263                         };
 264
 265                         gpt6: timer@1001f000 {
 266                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 267                                 reg = <0x1001f000 0x1000>;
 268                                 interrupts = <2>;
 269                         };
 270                 };
 271
 272                 aipi@10020000 { /* AIPI2 */
 273                         compatible = "fsl,aipi-bus", "simple-bus";
 274                         #address-cells = <1>;
 275                         #size-cells = <1>;
 276                         reg = <0x10020000 0x20000>;
 277                         ranges;
 278
 279                         fec: ethernet@1002b000 {
 280                                 compatible = "fsl,imx27-fec";
 281                                 reg = <0x1002b000 0x4000>;
 282                                 interrupts = <50>;
 283                                 clocks = <&clks 48>, <&clks 67>, <&clks 0>;
 284                                 clock-names = "ipg", "ahb", "ptp";
 285                                 status = "disabled";
 286                         };
 287
 288                         clks: ccm@10027000{
 289                                 compatible = "fsl,imx27-ccm";
 290                                 reg = <0x10027000 0x1000>;
 291                                 #clock-cells = <1>;
 292                         };
 293                 };
 294
 295
 296                 nfc: nand@d8000000 {
 297                         #address-cells = <1>;
 298                         #size-cells = <1>;
 299
 300                         compatible = "fsl,imx27-nand";
 301                         reg = <0xd8000000 0x1000>;
 302                         interrupts = <29>;
 303                         clocks = <&clks 54>;
 304                         status = "disabled";
 305                 };
 306         };
 307 };