arch/arm/boot/dts/exynos5250.dtsi

   1 /*
   2  * SAMSUNG EXYNOS5250 SoC device tree source
   3  *
   4  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
   8  * EXYNOS5250 based board files can include this file and provide
   9  * values for board specfic bindings.
  10  *
  11  * Note: This file does not include device nodes for all the controllers in
  12  * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
  13  * additional nodes can be added to this file.
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License version 2 as
  17  * published by the Free Software Foundation.
  18 */
  19
  20 #include "exynos5.dtsi"
  21 #include "exynos5250-pinctrl.dtsi"
  22
  23 #include <dt-bindings/clk/exynos-audss-clk.h>
  24
  25 / {
  26         compatible = "samsung,exynos5250";
  27
  28         aliases {
  29                 spi0 = &spi_0;
  30                 spi1 = &spi_1;
  31                 spi2 = &spi_2;
  32                 gsc0 = &gsc_0;
  33                 gsc1 = &gsc_1;
  34                 gsc2 = &gsc_2;
  35                 gsc3 = &gsc_3;
  36                 mshc0 = &mmc_0;
  37                 mshc1 = &mmc_1;
  38                 mshc2 = &mmc_2;
  39                 mshc3 = &mmc_3;
  40                 i2c0 = &i2c_0;
  41                 i2c1 = &i2c_1;
  42                 i2c2 = &i2c_2;
  43                 i2c3 = &i2c_3;
  44                 i2c4 = &i2c_4;
  45                 i2c5 = &i2c_5;
  46                 i2c6 = &i2c_6;
  47                 i2c7 = &i2c_7;
  48                 i2c8 = &i2c_8;
  49                 pinctrl0 = &pinctrl_0;
  50                 pinctrl1 = &pinctrl_1;
  51                 pinctrl2 = &pinctrl_2;
  52                 pinctrl3 = &pinctrl_3;
  53         };
  54
  55         cpus {
  56                 #address-cells = <1>;
  57                 #size-cells = <0>;
  58
  59                 cpu@0 {
  60                         device_type = "cpu";
  61                         compatible = "arm,cortex-a15";
  62                         reg = <0>;
  63                         clock-frequency = <1700000000>;
  64                 };
  65                 cpu@1 {
  66                         device_type = "cpu";
  67                         compatible = "arm,cortex-a15";
  68                         reg = <1>;
  69                         clock-frequency = <1700000000>;
  70                 };
  71         };
  72
  73         pd_gsc: gsc-power-domain@10044000 {
  74                 compatible = "samsung,exynos4210-pd";
  75                 reg = <0x10044000 0x20>;
  76         };
  77
  78         pd_mfc: mfc-power-domain@10044040 {
  79                 compatible = "samsung,exynos4210-pd";
  80                 reg = <0x10044040 0x20>;
  81         };
  82
  83         clock: clock-controller@10010000 {
  84                 compatible = "samsung,exynos5250-clock";
  85                 reg = <0x10010000 0x30000>;
  86                 #clock-cells = <1>;
  87         };
  88
  89         clock_audss: audss-clock-controller@3810000 {
  90                 compatible = "samsung,exynos5250-audss-clock";
  91                 reg = <0x03810000 0x0C>;
  92                 #clock-cells = <1>;
  93         };
  94
  95         timer {
  96                 compatible = "arm,armv7-timer";
  97                 interrupts = <1 13 0xf08>,
  98                              <1 14 0xf08>,
  99                              <1 11 0xf08>,
 100                              <1 10 0xf08>;
 101                 /* Unfortunately we need this since some versions of U-Boot
 102                  * on Exynos don't set the CNTFRQ register, so we need the
 103                  * value from DT.
 104                  */
 105                 clock-frequency = <24000000>;
 106         };
 107
 108         mct@101C0000 {
 109                 compatible = "samsung,exynos4210-mct";
 110                 reg = <0x101C0000 0x800>;
 111                 interrupt-controller;
 112                 #interrups-cells = <2>;
 113                 interrupt-parent = <&mct_map>;
 114                 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
 115                              <4 0>, <5 0>;
 116                 clocks = <&clock 1>, <&clock 335>;
 117                 clock-names = "fin_pll", "mct";
 118
 119                 mct_map: mct-map {
 120                         #interrupt-cells = <2>;
 121                         #address-cells = <0>;
 122                         #size-cells = <0>;
 123                         interrupt-map = <0x0 0 &combiner 23 3>,
 124                                         <0x1 0 &combiner 23 4>,
 125                                         <0x2 0 &combiner 25 2>,
 126                                         <0x3 0 &combiner 25 3>,
 127                                         <0x4 0 &gic 0 120 0>,
 128                                         <0x5 0 &gic 0 121 0>;
 129                 };
 130         };
 131
 132         pmu {
 133                 compatible = "arm,cortex-a15-pmu";
 134                 interrupt-parent = <&combiner>;
 135                 interrupts = <1 2>, <22 4>;
 136         };
 137
 138         pinctrl_0: pinctrl@11400000 {
 139                 compatible = "samsung,exynos5250-pinctrl";
 140                 reg = <0x11400000 0x1000>;
 141                 interrupts = <0 46 0>;
 142
 143                 wakup_eint: wakeup-interrupt-controller {
 144                         compatible = "samsung,exynos4210-wakeup-eint";
 145                         interrupt-parent = <&gic>;
 146                         interrupts = <0 32 0>;
 147                 };
 148         };
 149
 150         pinctrl_1: pinctrl@13400000 {
 151                 compatible = "samsung,exynos5250-pinctrl";
 152                 reg = <0x13400000 0x1000>;
 153                 interrupts = <0 45 0>;
 154         };
 155
 156         pinctrl_2: pinctrl@10d10000 {
 157                 compatible = "samsung,exynos5250-pinctrl";
 158                 reg = <0x10d10000 0x1000>;
 159                 interrupts = <0 50 0>;
 160         };
 161
 162         pinctrl_3: pinctrl@03860000 {
 163                 compatible = "samsung,exynos5250-pinctrl";
 164                 reg = <0x03860000 0x1000>;
 165                 interrupts = <0 47 0>;
 166         };
 167
 168         watchdog {
 169                 clocks = <&clock 336>;
 170                 clock-names = "watchdog";
 171         };
 172
 173         g2d@10850000 {
 174                 compatible = "samsung,exynos5250-g2d";
 175                 reg = <0x10850000 0x1000>;
 176                 interrupts = <0 91 0>;
 177                 clocks = <&clock 345>;
 178                 clock-names = "fimg2d";
 179         };
 180
 181         codec@11000000 {
 182                 compatible = "samsung,mfc-v6";
 183                 reg = <0x11000000 0x10000>;
 184                 interrupts = <0 96 0>;
 185                 samsung,power-domain = <&pd_mfc>;
 186                 clocks = <&clock 266>;
 187                 clock-names = "mfc";
 188         };
 189
 190         rtc@101E0000 {
 191                 clocks = <&clock 337>;
 192                 clock-names = "rtc";
 193                 status = "okay";
 194         };
 195
 196         tmu@10060000 {
 197                 compatible = "samsung,exynos5250-tmu";
 198                 reg = <0x10060000 0x100>;
 199                 interrupts = <0 65 0>;
 200                 clocks = <&clock 338>;
 201                 clock-names = "tmu_apbif";
 202         };
 203
 204         serial@12C00000 {
 205                 clocks = <&clock 289>, <&clock 146>;
 206                 clock-names = "uart", "clk_uart_baud0";
 207         };
 208
 209         serial@12C10000 {
 210                 clocks = <&clock 290>, <&clock 147>;
 211                 clock-names = "uart", "clk_uart_baud0";
 212         };
 213
 214         serial@12C20000 {
 215                 clocks = <&clock 291>, <&clock 148>;
 216                 clock-names = "uart", "clk_uart_baud0";
 217         };
 218
 219         serial@12C30000 {
 220                 clocks = <&clock 292>, <&clock 149>;
 221                 clock-names = "uart", "clk_uart_baud0";
 222         };
 223
 224         sata@122F0000 {
 225                 compatible = "samsung,exynos5-sata-ahci";
 226                 reg = <0x122F0000 0x1ff>;
 227                 interrupts = <0 115 0>;
 228                 clocks = <&clock 277>, <&clock 143>;
 229                 clock-names = "sata", "sclk_sata";
 230         };
 231
 232         sata-phy@12170000 {
 233                 compatible = "samsung,exynos5-sata-phy";
 234                 reg = <0x12170000 0x1ff>;
 235         };
 236
 237         i2c_0: i2c@12C60000 {
 238                 compatible = "samsung,s3c2440-i2c";
 239                 reg = <0x12C60000 0x100>;
 240                 interrupts = <0 56 0>;
 241                 #address-cells = <1>;
 242                 #size-cells = <0>;
 243                 clocks = <&clock 294>;
 244                 clock-names = "i2c";
 245                 pinctrl-names = "default";
 246                 pinctrl-0 = <&i2c0_bus>;
 247                 status = "disabled";
 248         };
 249
 250         i2c_1: i2c@12C70000 {
 251                 compatible = "samsung,s3c2440-i2c";
 252                 reg = <0x12C70000 0x100>;
 253                 interrupts = <0 57 0>;
 254                 #address-cells = <1>;
 255                 #size-cells = <0>;
 256                 clocks = <&clock 295>;
 257                 clock-names = "i2c";
 258                 pinctrl-names = "default";
 259                 pinctrl-0 = <&i2c1_bus>;
 260                 status = "disabled";
 261         };
 262
 263         i2c_2: i2c@12C80000 {
 264                 compatible = "samsung,s3c2440-i2c";
 265                 reg = <0x12C80000 0x100>;
 266                 interrupts = <0 58 0>;
 267                 #address-cells = <1>;
 268                 #size-cells = <0>;
 269                 clocks = <&clock 296>;
 270                 clock-names = "i2c";
 271                 pinctrl-names = "default";
 272                 pinctrl-0 = <&i2c2_bus>;
 273                 status = "disabled";
 274         };
 275
 276         i2c_3: i2c@12C90000 {
 277                 compatible = "samsung,s3c2440-i2c";
 278                 reg = <0x12C90000 0x100>;
 279                 interrupts = <0 59 0>;
 280                 #address-cells = <1>;
 281                 #size-cells = <0>;
 282                 clocks = <&clock 297>;
 283                 clock-names = "i2c";
 284                 pinctrl-names = "default";
 285                 pinctrl-0 = <&i2c3_bus>;
 286                 status = "disabled";
 287         };
 288
 289         i2c_4: i2c@12CA0000 {
 290                 compatible = "samsung,s3c2440-i2c";
 291                 reg = <0x12CA0000 0x100>;
 292                 interrupts = <0 60 0>;
 293                 #address-cells = <1>;
 294                 #size-cells = <0>;
 295                 clocks = <&clock 298>;
 296                 clock-names = "i2c";
 297                 pinctrl-names = "default";
 298                 pinctrl-0 = <&i2c4_bus>;
 299                 status = "disabled";
 300         };
 301
 302         i2c_5: i2c@12CB0000 {
 303                 compatible = "samsung,s3c2440-i2c";
 304                 reg = <0x12CB0000 0x100>;
 305                 interrupts = <0 61 0>;
 306                 #address-cells = <1>;
 307                 #size-cells = <0>;
 308                 clocks = <&clock 299>;
 309                 clock-names = "i2c";
 310                 pinctrl-names = "default";
 311                 pinctrl-0 = <&i2c5_bus>;
 312                 status = "disabled";
 313         };
 314
 315         i2c_6: i2c@12CC0000 {
 316                 compatible = "samsung,s3c2440-i2c";
 317                 reg = <0x12CC0000 0x100>;
 318                 interrupts = <0 62 0>;
 319                 #address-cells = <1>;
 320                 #size-cells = <0>;
 321                 clocks = <&clock 300>;
 322                 clock-names = "i2c";
 323                 pinctrl-names = "default";
 324                 pinctrl-0 = <&i2c6_bus>;
 325                 status = "disabled";
 326         };
 327
 328         i2c_7: i2c@12CD0000 {
 329                 compatible = "samsung,s3c2440-i2c";
 330                 reg = <0x12CD0000 0x100>;
 331                 interrupts = <0 63 0>;
 332                 #address-cells = <1>;
 333                 #size-cells = <0>;
 334                 clocks = <&clock 301>;
 335                 clock-names = "i2c";
 336                 pinctrl-names = "default";
 337                 pinctrl-0 = <&i2c7_bus>;
 338                 status = "disabled";
 339         };
 340
 341         i2c_8: i2c@12CE0000 {
 342                 compatible = "samsung,s3c2440-hdmiphy-i2c";
 343                 reg = <0x12CE0000 0x1000>;
 344                 interrupts = <0 64 0>;
 345                 #address-cells = <1>;
 346                 #size-cells = <0>;
 347                 clocks = <&clock 302>;
 348                 clock-names = "i2c";
 349                 status = "disabled";
 350         };
 351
 352         i2c@121D0000 {
 353                 compatible = "samsung,exynos5-sata-phy-i2c";
 354                 reg = <0x121D0000 0x100>;
 355                 #address-cells = <1>;
 356                 #size-cells = <0>;
 357                 clocks = <&clock 288>;
 358                 clock-names = "i2c";
 359                 status = "disabled";
 360         };
 361
 362         spi_0: spi@12d20000 {
 363                 compatible = "samsung,exynos4210-spi";
 364                 status = "disabled";
 365                 reg = <0x12d20000 0x100>;
 366                 interrupts = <0 66 0>;
 367                 dmas = <&pdma0 5
 368                         &pdma0 4>;
 369                 dma-names = "tx", "rx";
 370                 #address-cells = <1>;
 371                 #size-cells = <0>;
 372                 clocks = <&clock 304>, <&clock 154>;
 373                 clock-names = "spi", "spi_busclk0";
 374                 pinctrl-names = "default";
 375                 pinctrl-0 = <&spi0_bus>;
 376         };
 377
 378         spi_1: spi@12d30000 {
 379                 compatible = "samsung,exynos4210-spi";
 380                 status = "disabled";
 381                 reg = <0x12d30000 0x100>;
 382                 interrupts = <0 67 0>;
 383                 dmas = <&pdma1 5
 384                         &pdma1 4>;
 385                 dma-names = "tx", "rx";
 386                 #address-cells = <1>;
 387                 #size-cells = <0>;
 388                 clocks = <&clock 305>, <&clock 155>;
 389                 clock-names = "spi", "spi_busclk0";
 390                 pinctrl-names = "default";
 391                 pinctrl-0 = <&spi1_bus>;
 392         };
 393
 394         spi_2: spi@12d40000 {
 395                 compatible = "samsung,exynos4210-spi";
 396                 status = "disabled";
 397                 reg = <0x12d40000 0x100>;
 398                 interrupts = <0 68 0>;
 399                 dmas = <&pdma0 7
 400                         &pdma0 6>;
 401                 dma-names = "tx", "rx";
 402                 #address-cells = <1>;
 403                 #size-cells = <0>;
 404                 clocks = <&clock 306>, <&clock 156>;
 405                 clock-names = "spi", "spi_busclk0";
 406                 pinctrl-names = "default";
 407                 pinctrl-0 = <&spi2_bus>;
 408         };
 409
 410         mmc_0: mmc@12200000 {
 411                 compatible = "samsung,exynos5250-dw-mshc";
 412                 interrupts = <0 75 0>;
 413                 #address-cells = <1>;
 414                 #size-cells = <0>;
 415                 reg = <0x12200000 0x1000>;
 416                 clocks = <&clock 280>, <&clock 139>;
 417                 clock-names = "biu", "ciu";
 418                 fifo-depth = <0x80>;
 419                 status = "disabled";
 420         };
 421
 422         mmc_1: mmc@12210000 {
 423                 compatible = "samsung,exynos5250-dw-mshc";
 424                 interrupts = <0 76 0>;
 425                 #address-cells = <1>;
 426                 #size-cells = <0>;
 427                 reg = <0x12210000 0x1000>;
 428                 clocks = <&clock 281>, <&clock 140>;
 429                 clock-names = "biu", "ciu";
 430                 fifo-depth = <0x80>;
 431                 status = "disabled";
 432         };
 433
 434         mmc_2: mmc@12220000 {
 435                 compatible = "samsung,exynos5250-dw-mshc";
 436                 interrupts = <0 77 0>;
 437                 #address-cells = <1>;
 438                 #size-cells = <0>;
 439                 reg = <0x12220000 0x1000>;
 440                 clocks = <&clock 282>, <&clock 141>;
 441                 clock-names = "biu", "ciu";
 442                 fifo-depth = <0x80>;
 443                 status = "disabled";
 444         };
 445
 446         mmc_3: mmc@12230000 {
 447                 compatible = "samsung,exynos5250-dw-mshc";
 448                 reg = <0x12230000 0x1000>;
 449                 interrupts = <0 78 0>;
 450                 #address-cells = <1>;
 451                 #size-cells = <0>;
 452                 clocks = <&clock 283>, <&clock 142>;
 453                 clock-names = "biu", "ciu";
 454                 fifo-depth = <0x80>;
 455                 status = "disabled";
 456         };
 457
 458         i2s0: i2s@03830000 {
 459                 compatible = "samsung,s5pv210-i2s";
 460                 status = "disabled";
 461                 reg = <0x03830000 0x100>;
 462                 dmas = <&pdma0 10
 463                         &pdma0 9
 464                         &pdma0 8>;
 465                 dma-names = "tx", "rx", "tx-sec";
 466                 clocks = <&clock_audss EXYNOS_I2S_BUS>,
 467                         <&clock_audss EXYNOS_I2S_BUS>,
 468                         <&clock_audss EXYNOS_SCLK_I2S>;
 469                 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
 470                 samsung,idma-addr = <0x03000000>;
 471                 pinctrl-names = "default";
 472                 pinctrl-0 = <&i2s0_bus>;
 473         };
 474
 475         i2s1: i2s@12D60000 {
 476                 compatible = "samsung,s3c6410-i2s";
 477                 status = "disabled";
 478                 reg = <0x12D60000 0x100>;
 479                 dmas = <&pdma1 12
 480                         &pdma1 11>;
 481                 dma-names = "tx", "rx";
 482                 clocks = <&clock 307>, <&clock 157>;
 483                 clock-names = "iis", "i2s_opclk0";
 484                 pinctrl-names = "default";
 485                 pinctrl-0 = <&i2s1_bus>;
 486         };
 487
 488         i2s2: i2s@12D70000 {
 489                 compatible = "samsung,s3c6410-i2s";
 490                 status = "disabled";
 491                 reg = <0x12D70000 0x100>;
 492                 dmas = <&pdma0 12
 493                         &pdma0 11>;
 494                 dma-names = "tx", "rx";
 495                 clocks = <&clock 308>, <&clock 158>;
 496                 clock-names = "iis", "i2s_opclk0";
 497                 pinctrl-names = "default";
 498                 pinctrl-0 = <&i2s2_bus>;
 499         };
 500
 501         usb@12000000 {
 502                 compatible = "samsung,exynos5250-dwusb3";
 503                 clocks = <&clock 286>;
 504                 clock-names = "usbdrd30";
 505                 #address-cells = <1>;
 506                 #size-cells = <1>;
 507                 ranges;
 508
 509                 dwc3 {
 510                         compatible = "synopsys,dwc3";
 511                         reg = <0x12000000 0x10000>;
 512                         interrupts = <0 72 0>;
 513                         usb-phy = <&usb2_phy &usb3_phy>;
 514                 };
 515         };
 516
 517         usb3_phy: usbphy@12100000 {
 518                 compatible = "samsung,exynos5250-usb3phy";
 519                 reg = <0x12100000 0x100>;
 520                 clocks = <&clock 1>, <&clock 286>;
 521                 clock-names = "ext_xtal", "usbdrd30";
 522                 #address-cells = <1>;
 523                 #size-cells = <1>;
 524                 ranges;
 525
 526                 usbphy-sys {
 527                         reg = <0x10040704 0x8>;
 528                 };
 529         };
 530
 531         usb@12110000 {
 532                 compatible = "samsung,exynos4210-ehci";
 533                 reg = <0x12110000 0x100>;
 534                 interrupts = <0 71 0>;
 535
 536                 clocks = <&clock 285>;
 537                 clock-names = "usbhost";
 538         };
 539
 540         usb@12120000 {
 541                 compatible = "samsung,exynos4210-ohci";
 542                 reg = <0x12120000 0x100>;
 543                 interrupts = <0 71 0>;
 544
 545                 clocks = <&clock 285>;
 546                 clock-names = "usbhost";
 547         };
 548
 549         usb2_phy: usbphy@12130000 {
 550                 compatible = "samsung,exynos5250-usb2phy";
 551                 reg = <0x12130000 0x100>;
 552                 clocks = <&clock 1>, <&clock 285>;
 553                 clock-names = "ext_xtal", "usbhost";
 554                 #address-cells = <1>;
 555                 #size-cells = <1>;
 556                 ranges;
 557
 558                 usbphy-sys {
 559                         reg = <0x10040704 0x8>,
 560                               <0x10050230 0x4>;
 561                 };
 562         };
 563
 564         pwm: pwm@12dd0000 {
 565                 compatible = "samsung,exynos4210-pwm";
 566                 reg = <0x12dd0000 0x100>;
 567                 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
 568                 #pwm-cells = <3>;
 569                 clocks = <&clock 311>;
 570                 clock-names = "timers";
 571         };
 572
 573         amba {
 574                 #address-cells = <1>;
 575                 #size-cells = <1>;
 576                 compatible = "arm,amba-bus";
 577                 interrupt-parent = <&gic>;
 578                 ranges;
 579
 580                 pdma0: pdma@121A0000 {
 581                         compatible = "arm,pl330", "arm,primecell";
 582                         reg = <0x121A0000 0x1000>;
 583                         interrupts = <0 34 0>;
 584                         clocks = <&clock 275>;
 585                         clock-names = "apb_pclk";
 586                         #dma-cells = <1>;
 587                         #dma-channels = <8>;
 588                         #dma-requests = <32>;
 589                 };
 590
 591                 pdma1: pdma@121B0000 {
 592                         compatible = "arm,pl330", "arm,primecell";
 593                         reg = <0x121B0000 0x1000>;
 594                         interrupts = <0 35 0>;
 595                         clocks = <&clock 276>;
 596                         clock-names = "apb_pclk";
 597                         #dma-cells = <1>;
 598                         #dma-channels = <8>;
 599                         #dma-requests = <32>;
 600                 };
 601
 602                 mdma0: mdma@10800000 {
 603                         compatible = "arm,pl330", "arm,primecell";
 604                         reg = <0x10800000 0x1000>;
 605                         interrupts = <0 33 0>;
 606                         clocks = <&clock 346>;
 607                         clock-names = "apb_pclk";
 608                         #dma-cells = <1>;
 609                         #dma-channels = <8>;
 610                         #dma-requests = <1>;
 611                 };
 612
 613                 mdma1: mdma@11C10000 {
 614                         compatible = "arm,pl330", "arm,primecell";
 615                         reg = <0x11C10000 0x1000>;
 616                         interrupts = <0 124 0>;
 617                         clocks = <&clock 271>;
 618                         clock-names = "apb_pclk";
 619                         #dma-cells = <1>;
 620                         #dma-channels = <8>;
 621                         #dma-requests = <1>;
 622                 };
 623         };
 624
 625         gsc_0:  gsc@13e00000 {
 626                 compatible = "samsung,exynos5-gsc";
 627                 reg = <0x13e00000 0x1000>;
 628                 interrupts = <0 85 0>;
 629                 samsung,power-domain = <&pd_gsc>;
 630                 clocks = <&clock 256>;
 631                 clock-names = "gscl";
 632         };
 633
 634         gsc_1:  gsc@13e10000 {
 635                 compatible = "samsung,exynos5-gsc";
 636                 reg = <0x13e10000 0x1000>;
 637                 interrupts = <0 86 0>;
 638                 samsung,power-domain = <&pd_gsc>;
 639                 clocks = <&clock 257>;
 640                 clock-names = "gscl";
 641         };
 642
 643         gsc_2:  gsc@13e20000 {
 644                 compatible = "samsung,exynos5-gsc";
 645                 reg = <0x13e20000 0x1000>;
 646                 interrupts = <0 87 0>;
 647                 samsung,power-domain = <&pd_gsc>;
 648                 clocks = <&clock 258>;
 649                 clock-names = "gscl";
 650         };
 651
 652         gsc_3:  gsc@13e30000 {
 653                 compatible = "samsung,exynos5-gsc";
 654                 reg = <0x13e30000 0x1000>;
 655                 interrupts = <0 88 0>;
 656                 samsung,power-domain = <&pd_gsc>;
 657                 clocks = <&clock 259>;
 658                 clock-names = "gscl";
 659         };
 660
 661         hdmi {
 662                 compatible = "samsung,exynos4212-hdmi";
 663                 reg = <0x14530000 0x70000>;
 664                 interrupts = <0 95 0>;
 665                 clocks = <&clock 344>, <&clock 136>, <&clock 137>,
 666                                 <&clock 159>, <&clock 1024>;
 667                 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
 668                                 "sclk_hdmiphy", "mout_hdmi";
 669         };
 670
 671         mixer {
 672                 compatible = "samsung,exynos5250-mixer";
 673                 reg = <0x14450000 0x10000>;
 674                 interrupts = <0 94 0>;
 675                 clocks = <&clock 343>, <&clock 136>;
 676                 clock-names = "mixer", "sclk_hdmi";
 677         };
 678
 679         dp_phy: video-phy@10040720 {
 680                 compatible = "samsung,exynos5250-dp-video-phy";
 681                 reg = <0x10040720 4>;
 682                 #phy-cells = <0>;
 683         };
 684
 685         dp-controller@145B0000 {
 686                 clocks = <&clock 342>;
 687                 clock-names = "dp";
 688                 phys = <&dp_phy>;
 689                 phy-names = "dp";
 690         };
 691
 692         fimd@14400000 {
 693                 clocks = <&clock 133>, <&clock 339>;
 694                 clock-names = "sclk_fimd", "fimd";
 695         };
 696
 697         adc: adc@12D10000 {
 698                 compatible = "samsung,exynos-adc-v1";
 699                 reg = <0x12D10000 0x100>, <0x10040718 0x4>;
 700                 interrupts = <0 106 0>;
 701                 clocks = <&clock 303>;
 702                 clock-names = "adc";
 703                 #io-channel-cells = <1>;
 704                 io-channel-ranges;
 705                 status = "disabled";
 706         };
 707 };