arch/arm/boot/dts/ecx-common.dtsi

   1 /*
   2  * Copyright 2011-2012 Calxeda, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16
  17 / {
  18         chosen {
  19                 bootargs = "console=ttyAMA0";
  20         };
  21
  22         psci {
  23                 compatible      = "arm,psci";
  24                 method          = "smc";
  25                 cpu_suspend     = <0x84000002>;
  26                 cpu_off         = <0x84000004>;
  27                 cpu_on          = <0x84000006>;
  28         };
  29
  30         soc {
  31                 #address-cells = <1>;
  32                 #size-cells = <1>;
  33                 compatible = "simple-bus";
  34                 interrupt-parent = <&intc>;
  35
  36                 sata@ffe08000 {
  37                         compatible = "calxeda,hb-ahci";
  38                         reg = <0xffe08000 0x10000>;
  39                         interrupts = <0 83 4>;
  40                         dma-coherent;
  41                         calxeda,port-phys = <&combophy5 0 &combophy0 0
  42                                              &combophy0 1 &combophy0 2
  43                                              &combophy0 3>;
  44                         calxeda,sgpio-gpio =<&gpioh 5 1 &gpioh 6 1 &gpioh 7 1>;
  45                         calxeda,led-order = <4 0 1 2 3>;
  46                 };
  47
  48                 sdhci@ffe0e000 {
  49                         compatible = "calxeda,hb-sdhci";
  50                         reg = <0xffe0e000 0x1000>;
  51                         interrupts = <0 90 4>;
  52                         clocks = <&eclk>;
  53                         status = "disabled";
  54                 };
  55
  56                 memory-controller@fff00000 {
  57                         compatible = "calxeda,hb-ddr-ctrl";
  58                         reg = <0xfff00000 0x1000>;
  59                         interrupts = <0 91 4>;
  60                 };
  61
  62                 ipc@fff20000 {
  63                         compatible = "arm,pl320", "arm,primecell";
  64                         reg = <0xfff20000 0x1000>;
  65                         interrupts = <0 7 4>;
  66                         clocks = <&pclk>;
  67                         clock-names = "apb_pclk";
  68                 };
  69
  70                 gpioe: gpio@fff30000 {
  71                         #gpio-cells = <2>;
  72                         compatible = "arm,pl061", "arm,primecell";
  73                         gpio-controller;
  74                         reg = <0xfff30000 0x1000>;
  75                         interrupts = <0 14 4>;
  76                         clocks = <&pclk>;
  77                         clock-names = "apb_pclk";
  78                         status = "disabled";
  79                 };
  80
  81                 gpiof: gpio@fff31000 {
  82                         #gpio-cells = <2>;
  83                         compatible = "arm,pl061", "arm,primecell";
  84                         gpio-controller;
  85                         reg = <0xfff31000 0x1000>;
  86                         interrupts = <0 15 4>;
  87                         clocks = <&pclk>;
  88                         clock-names = "apb_pclk";
  89                         status = "disabled";
  90                 };
  91
  92                 gpiog: gpio@fff32000 {
  93                         #gpio-cells = <2>;
  94                         compatible = "arm,pl061", "arm,primecell";
  95                         gpio-controller;
  96                         reg = <0xfff32000 0x1000>;
  97                         interrupts = <0 16 4>;
  98                         clocks = <&pclk>;
  99                         clock-names = "apb_pclk";
 100                         status = "disabled";
 101                 };
 102
 103                 gpioh: gpio@fff33000 {
 104                         #gpio-cells = <2>;
 105                         compatible = "arm,pl061", "arm,primecell";
 106                         gpio-controller;
 107                         reg = <0xfff33000 0x1000>;
 108                         interrupts = <0 17 4>;
 109                         clocks = <&pclk>;
 110                         clock-names = "apb_pclk";
 111                         status = "disabled";
 112                 };
 113
 114                 timer@fff34000 {
 115                         compatible = "arm,sp804", "arm,primecell";
 116                         reg = <0xfff34000 0x1000>;
 117                         interrupts = <0 18 4>;
 118                         clocks = <&pclk>;
 119                         clock-names = "apb_pclk";
 120                 };
 121
 122                 rtc@fff35000 {
 123                         compatible = "arm,pl031", "arm,primecell";
 124                         reg = <0xfff35000 0x1000>;
 125                         interrupts = <0 19 4>;
 126                         clocks = <&pclk>;
 127                         clock-names = "apb_pclk";
 128                 };
 129
 130                 serial@fff36000 {
 131                         compatible = "arm,pl011", "arm,primecell";
 132                         reg = <0xfff36000 0x1000>;
 133                         interrupts = <0 20 4>;
 134                         clocks = <&pclk>;
 135                         clock-names = "apb_pclk";
 136                 };
 137
 138                 smic@fff3a000 {
 139                         compatible = "ipmi-smic";
 140                         device_type = "ipmi";
 141                         reg = <0xfff3a000 0x1000>;
 142                         interrupts = <0 24 4>;
 143                         reg-size = <4>;
 144                         reg-spacing = <4>;
 145                 };
 146
 147                 sregs@fff3c000 {
 148                         compatible = "calxeda,hb-sregs";
 149                         reg = <0xfff3c000 0x1000>;
 150
 151                         clocks {
 152                                 #address-cells = <1>;
 153                                 #size-cells = <0>;
 154
 155                                 osc: oscillator {
 156                                         #clock-cells = <0>;
 157                                         compatible = "fixed-clock";
 158                                         clock-frequency = <33333000>;
 159                                 };
 160
 161                                 ddrpll: ddrpll {
 162                                         #clock-cells = <0>;
 163                                         compatible = "calxeda,hb-pll-clock";
 164                                         clocks = <&osc>;
 165                                         reg = <0x108>;
 166                                 };
 167
 168                                 a9pll: a9pll {
 169                                         #clock-cells = <0>;
 170                                         compatible = "calxeda,hb-pll-clock";
 171                                         clocks = <&osc>;
 172                                         reg = <0x100>;
 173                                 };
 174
 175                                 a9periphclk: a9periphclk {
 176                                         #clock-cells = <0>;
 177                                         compatible = "calxeda,hb-a9periph-clock";
 178                                         clocks = <&a9pll>;
 179                                         reg = <0x104>;
 180                                 };
 181
 182                                 a9bclk: a9bclk {
 183                                         #clock-cells = <0>;
 184                                         compatible = "calxeda,hb-a9bus-clock";
 185                                         clocks = <&a9pll>;
 186                                         reg = <0x104>;
 187                                 };
 188
 189                                 emmcpll: emmcpll {
 190                                         #clock-cells = <0>;
 191                                         compatible = "calxeda,hb-pll-clock";
 192                                         clocks = <&osc>;
 193                                         reg = <0x10C>;
 194                                 };
 195
 196                                 eclk: eclk {
 197                                         #clock-cells = <0>;
 198                                         compatible = "calxeda,hb-emmc-clock";
 199                                         clocks = <&emmcpll>;
 200                                         reg = <0x114>;
 201                                 };
 202
 203                                 pclk: pclk {
 204                                         #clock-cells = <0>;
 205                                         compatible = "fixed-clock";
 206                                         clock-frequency = <150000000>;
 207                                 };
 208                         };
 209                 };
 210
 211                 dma@fff3d000 {
 212                         compatible = "arm,pl330", "arm,primecell";
 213                         reg = <0xfff3d000 0x1000>;
 214                         interrupts = <0 92 4>;
 215                         clocks = <&pclk>;
 216                         clock-names = "apb_pclk";
 217                 };
 218
 219                 ethernet@fff50000 {
 220                         compatible = "calxeda,hb-xgmac";
 221                         reg = <0xfff50000 0x1000>;
 222                         interrupts = <0 77 4  0 78 4  0 79 4>;
 223                         dma-coherent;
 224                 };
 225
 226                 ethernet@fff51000 {
 227                         compatible = "calxeda,hb-xgmac";
 228                         reg = <0xfff51000 0x1000>;
 229                         interrupts = <0 80 4  0 81 4  0 82 4>;
 230                         dma-coherent;
 231                 };
 232
 233                 combophy0: combo-phy@fff58000 {
 234                         compatible = "calxeda,hb-combophy";
 235                         #phy-cells = <1>;
 236                         reg = <0xfff58000 0x1000>;
 237                         phydev = <5>;
 238                 };
 239
 240                 combophy5: combo-phy@fff5d000 {
 241                         compatible = "calxeda,hb-combophy";
 242                         #phy-cells = <1>;
 243                         reg = <0xfff5d000 0x1000>;
 244                         phydev = <31>;
 245                 };
 246         };
 247 };