1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <dt-bindings/bus/ti-sysc.h>
4 #include <dt-bindings/clock/dm814.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/dm814x.h>
9 compatible = "ti,dm814";
10 interrupt-parent = <&intc>;
21 ethernet0 = &cpsw_emac0;
22 ethernet1 = &cpsw_emac1;
33 compatible = "arm,cortex-a8";
40 compatible = "arm,cortex-a8-pmu";
45 * The soc node represents the soc top level view. It is used for IPs
46 * that are not memory mapped in the MPU view or for the MPU itself.
49 compatible = "ti,omap-infra";
51 compatible = "ti,omap3-mpu";
57 compatible = "simple-bus";
61 ti,hwmods = "l3_main";
64 compatible = "ti,am33xx-usb";
65 reg = <0x47400000 0x1000>;
69 ti,hwmods = "usb_otg_hs";
71 usb0_phy: usb-phy@47401300 {
72 compatible = "ti,am335x-usb-phy";
73 reg = <0x47401300 0x100>;
75 ti,ctrl_mod = <&usb_ctrl_mod>;
80 compatible = "ti,musb-am33xx";
81 reg = <0x47401400 0x400
83 reg-names = "mc", "control";
86 interrupt-names = "mc";
88 mentor,multipoint = <1>;
89 mentor,num-eps = <16>;
90 mentor,ram-bits = <12>;
94 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
95 &cppi41dma 2 0 &cppi41dma 3 0
96 &cppi41dma 4 0 &cppi41dma 5 0
97 &cppi41dma 6 0 &cppi41dma 7 0
98 &cppi41dma 8 0 &cppi41dma 9 0
99 &cppi41dma 10 0 &cppi41dma 11 0
100 &cppi41dma 12 0 &cppi41dma 13 0
101 &cppi41dma 14 0 &cppi41dma 0 1
102 &cppi41dma 1 1 &cppi41dma 2 1
103 &cppi41dma 3 1 &cppi41dma 4 1
104 &cppi41dma 5 1 &cppi41dma 6 1
105 &cppi41dma 7 1 &cppi41dma 8 1
106 &cppi41dma 9 1 &cppi41dma 10 1
107 &cppi41dma 11 1 &cppi41dma 12 1
108 &cppi41dma 13 1 &cppi41dma 14 1>;
110 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
111 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
113 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
114 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
119 compatible = "ti,musb-am33xx";
120 reg = <0x47401c00 0x400
122 reg-names = "mc", "control";
124 interrupt-names = "mc";
126 mentor,multipoint = <1>;
127 mentor,num-eps = <16>;
128 mentor,ram-bits = <12>;
129 mentor,power = <500>;
132 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
133 &cppi41dma 17 0 &cppi41dma 18 0
134 &cppi41dma 19 0 &cppi41dma 20 0
135 &cppi41dma 21 0 &cppi41dma 22 0
136 &cppi41dma 23 0 &cppi41dma 24 0
137 &cppi41dma 25 0 &cppi41dma 26 0
138 &cppi41dma 27 0 &cppi41dma 28 0
139 &cppi41dma 29 0 &cppi41dma 15 1
140 &cppi41dma 16 1 &cppi41dma 17 1
141 &cppi41dma 18 1 &cppi41dma 19 1
142 &cppi41dma 20 1 &cppi41dma 21 1
143 &cppi41dma 22 1 &cppi41dma 23 1
144 &cppi41dma 24 1 &cppi41dma 25 1
145 &cppi41dma 26 1 &cppi41dma 27 1
146 &cppi41dma 28 1 &cppi41dma 29 1>;
148 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
149 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
151 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
152 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
156 cppi41dma: dma-controller@47402000 {
157 compatible = "ti,am3359-cppi41";
158 reg = <0x47400000 0x1000
162 reg-names = "glue", "controller", "scheduler", "queuemgr";
164 interrupt-names = "glue";
166 /* For backwards compatibility: */
167 #dma-channels = <30>;
169 #dma-requests = <256>;
170 dma-requests = <256>;
175 * See TRM "Table 1-317. L4LS Instance Summary" for hints.
176 * It shows the module target agent registers though, so the
177 * actual device is typically 0x1000 before the target agent
178 * except in cases where the module is larger than 0x1000.
180 l4ls: l4ls@48000000 {
181 compatible = "ti,dm814-l4ls", "simple-bus";
182 #address-cells = <1>;
184 ranges = <0 0x48000000 0x2000000>;
187 compatible = "ti,omap4-i2c";
188 #address-cells = <1>;
191 reg = <0x28000 0x1000>;
196 compatible = "ti,814-elm";
198 reg = <0x80000 0x2000>;
203 compatible = "ti,omap4-gpio";
206 reg = <0x32000 0x2000>;
210 interrupt-controller;
211 #interrupt-cells = <2>;
215 compatible = "ti,omap4-gpio";
218 reg = <0x4c000 0x2000>;
222 interrupt-controller;
223 #interrupt-cells = <2>;
227 compatible = "ti,omap4-gpio";
230 reg = <0x1ac000 0x2000>;
234 interrupt-controller;
235 #interrupt-cells = <2>;
239 compatible = "ti,omap4-gpio";
242 reg = <0x1ae000 0x2000>;
246 interrupt-controller;
247 #interrupt-cells = <2>;
251 compatible = "ti,omap4-i2c";
252 #address-cells = <1>;
255 reg = <0x2a000 0x1000>;
260 compatible = "ti,omap4-mcspi";
261 reg = <0x30000 0x1000>;
262 #address-cells = <1>;
266 ti,hwmods = "mcspi1";
267 dmas = <&edma 16 0 &edma 17 0
268 &edma 18 0 &edma 19 0
269 &edma 20 0 &edma 21 0
270 &edma 22 0 &edma 23 0>;
272 dma-names = "tx0", "rx0", "tx1", "rx1",
273 "tx2", "rx2", "tx3", "rx3";
277 compatible = "ti,omap4-mcspi";
278 reg = <0x1a0000 0x1000>;
279 #address-cells = <1>;
283 ti,hwmods = "mcspi2";
284 dmas = <&edma 42 0 &edma 43 0
285 &edma 44 0 &edma 45 0>;
286 dma-names = "tx0", "rx0", "tx1", "rx1";
289 /* Board must configure dmas with edma_xbar for EDMA */
291 compatible = "ti,omap4-mcspi";
292 reg = <0x1a2000 0x1000>;
293 #address-cells = <1>;
297 ti,hwmods = "mcspi3";
301 compatible = "ti,omap4-mcspi";
302 reg = <0x1a4000 0x1000>;
303 #address-cells = <1>;
307 ti,hwmods = "mcspi4";
310 timer1_target: target-module@2e000 {
311 compatible = "ti,sysc-omap4-timer", "ti,sysc";
314 reg-names = "rev", "sysc";
315 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
316 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
319 <SYSC_IDLE_SMART_WKUP>;
320 clocks = <&timer1_fck>;
322 #address-cells = <1>;
324 ranges = <0x0 0x2e000 0x1000>;
327 compatible = "ti,am335x-timer-1ms";
331 clocks = <&timer1_fck>;
337 compatible = "ti,am3352-uart", "ti,omap3-uart";
339 reg = <0x20000 0x2000>;
340 clock-frequency = <48000000>;
342 dmas = <&edma 26 0 &edma 27 0>;
343 dma-names = "tx", "rx";
347 compatible = "ti,am3352-uart", "ti,omap3-uart";
349 reg = <0x22000 0x2000>;
350 clock-frequency = <48000000>;
352 dmas = <&edma 28 0 &edma 29 0>;
353 dma-names = "tx", "rx";
357 compatible = "ti,am3352-uart", "ti,omap3-uart";
359 reg = <0x24000 0x2000>;
360 clock-frequency = <48000000>;
362 dmas = <&edma 30 0 &edma 31 0>;
363 dma-names = "tx", "rx";
366 timer2_target: target-module@40000 {
367 compatible = "ti,sysc-omap4-timer", "ti,sysc";
370 reg-names = "rev", "sysc";
371 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
372 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
375 <SYSC_IDLE_SMART_WKUP>;
376 clocks = <&timer2_fck>;
378 #address-cells = <1>;
380 ranges = <0x0 0x40000 0x1000>;
383 compatible = "ti,dm814-timer";
386 clocks = <&timer2_fck>;
391 timer3: timer@42000 {
392 compatible = "ti,dm814-timer";
393 reg = <0x42000 0x2000>;
395 ti,hwmods = "timer3";
399 compatible = "ti,omap4-hsmmc";
403 dma-names = "tx", "rx";
405 interrupt-parent = <&intc>;
406 reg = <0x60000 0x1000>;
410 compatible = "ti,am3352-rtc", "ti,da830-rtc";
411 reg = <0xc0000 0x1000>;
412 interrupts = <75 76>;
417 compatible = "ti,omap4-hsmmc";
421 dma-names = "tx", "rx";
423 interrupt-parent = <&intc>;
424 reg = <0x1d8000 0x1000>;
427 control: control@140000 {
428 compatible = "ti,dm814-scm", "simple-bus";
429 reg = <0x140000 0x20000>;
430 #address-cells = <1>;
432 ranges = <0 0x140000 0x20000>;
434 scm_conf: scm_conf@0 {
435 compatible = "syscon", "simple-bus";
437 #address-cells = <1>;
439 ranges = <0 0 0x800>;
441 phy_gmii_sel: phy-gmii-sel {
442 compatible = "ti,dm814-phy-gmii-sel";
448 #address-cells = <1>;
452 scm_clockdomains: clockdomains {
456 usb_ctrl_mod: control@620 {
457 compatible = "ti,am335x-usb-ctrl-module";
460 reg-names = "phy_ctrl", "wakeup";
463 edma_xbar: dma-router@f90 {
464 compatible = "ti,am335x-edma-crossbar";
468 dma-masters = <&edma>;
472 * Note that silicon revision 2.1 and older
473 * require input enabled (bit 18 set) for all
474 * 3.3V I/Os to avoid cumulative hardware damage.
475 * For more info, see errata advisory 2.1.87.
476 * We leave bit 18 out of function-mask and rely
477 * on the bootloader for it.
479 pincntl: pinmux@800 {
480 compatible = "pinctrl-single";
482 #address-cells = <1>;
484 #pinctrl-cells = <1>;
485 pinctrl-single,register-width = <32>;
486 pinctrl-single,function-mask = <0x307ff>;
489 usb1_phy: usb-phy@1b00 {
490 compatible = "ti,am335x-usb-phy";
491 reg = <0x1b00 0x100>;
493 ti,ctrl_mod = <&usb_ctrl_mod>;
499 compatible = "ti,dm814-prcm", "simple-bus";
500 reg = <0x180000 0x2000>;
501 #address-cells = <1>;
503 ranges = <0 0x180000 0x2000>;
505 prcm_clocks: clocks {
506 #address-cells = <1>;
510 prcm_clockdomains: clockdomains {
514 /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
515 pllss: pllss@1c5000 {
516 compatible = "ti,dm814-pllss", "simple-bus";
517 reg = <0x1c5000 0x1000>;
518 #address-cells = <1>;
520 ranges = <0 0x1c5000 0x1000>;
522 pllss_clocks: clocks {
523 #address-cells = <1>;
527 pllss_clockdomains: clockdomains {
532 compatible = "ti,omap3-wdt";
533 ti,hwmods = "wd_timer";
534 reg = <0x1c7000 0x1000>;
539 intc: interrupt-controller@48200000 {
540 compatible = "ti,dm814-intc";
541 interrupt-controller;
542 #interrupt-cells = <1>;
543 reg = <0x48200000 0x1000>;
546 /* Board must configure evtmux with edma_xbar for EDMA */
548 compatible = "ti,omap4-hsmmc";
551 interrupt-parent = <&intc>;
552 reg = <0x47810000 0x1000>;
555 target-module@49000000 {
556 compatible = "ti,sysc-omap4", "ti,sysc";
557 reg = <0x49000000 0x4>;
559 clocks = <&alwon_clkctrl DM814_TPCC_CLKCTRL 0>;
561 #address-cells = <1>;
563 ranges = <0x0 0x49000000 0x10000>;
566 compatible = "ti,edma3-tpcc";
568 reg-names = "edma3_cc";
569 interrupts = <12 13 14>;
570 interrupt-names = "edma3_ccint", "edma3_mperr",
575 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
576 <&edma_tptc2 3>, <&edma_tptc3 0>;
578 ti,edma-memcpy-channels = <20 21>;
582 target-module@49800000 {
583 compatible = "ti,sysc-omap4", "ti,sysc";
584 reg = <0x49800000 0x4>,
586 reg-names = "rev", "sysc";
587 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
588 ti,sysc-midle = <SYSC_IDLE_FORCE>;
589 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
591 clocks = <&alwon_clkctrl DM814_TPTC0_CLKCTRL 0>;
593 #address-cells = <1>;
595 ranges = <0x0 0x49800000 0x100000>;
598 compatible = "ti,edma3-tptc";
601 interrupt-names = "edma3_tcerrint";
605 target-module@49900000 {
606 compatible = "ti,sysc-omap4", "ti,sysc";
607 reg = <0x49900000 0x4>,
609 reg-names = "rev", "sysc";
610 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
611 ti,sysc-midle = <SYSC_IDLE_FORCE>;
612 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
614 clocks = <&alwon_clkctrl DM814_TPTC1_CLKCTRL 0>;
616 #address-cells = <1>;
618 ranges = <0x0 0x49900000 0x100000>;
621 compatible = "ti,edma3-tptc";
624 interrupt-names = "edma3_tcerrint";
628 target-module@49a00000 {
629 compatible = "ti,sysc-omap4", "ti,sysc";
630 reg = <0x49a00000 0x4>,
632 reg-names = "rev", "sysc";
633 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
634 ti,sysc-midle = <SYSC_IDLE_FORCE>;
635 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
637 clocks = <&alwon_clkctrl DM814_TPTC2_CLKCTRL 0>;
639 #address-cells = <1>;
641 ranges = <0x0 0x49a00000 0x100000>;
644 compatible = "ti,edma3-tptc";
647 interrupt-names = "edma3_tcerrint";
651 target-module@49b00000 {
652 compatible = "ti,sysc-omap4", "ti,sysc";
653 reg = <0x49b00000 0x4>,
655 reg-names = "rev", "sysc";
656 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
657 ti,sysc-midle = <SYSC_IDLE_FORCE>;
658 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
660 clocks = <&alwon_clkctrl DM814_TPTC3_CLKCTRL 0>;
662 #address-cells = <1>;
664 ranges = <0x0 0x49b00000 0x100000>;
667 compatible = "ti,edma3-tptc";
670 interrupt-names = "edma3_tcerrint";
674 /* See TRM "Table 1-318. L4HS Instance Summary" */
675 l4hs: l4hs@4a000000 {
676 compatible = "ti,dm814-l4hs", "simple-bus";
677 #address-cells = <1>;
679 ranges = <0 0x4a000000 0x1b4040>;
681 target-module@100000 {
682 compatible = "ti,sysc-omap4-simple", "ti,sysc";
683 reg = <0x100900 0x4>,
686 reg-names = "rev", "sysc", "syss";
688 ti,sysc-midle = <SYSC_IDLE_FORCE>,
690 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
693 clocks = <&alwon_ethernet_clkctrl DM814_ETHERNET_CPGMAC0_CLKCTRL 0>;
695 #address-cells = <1>;
697 ranges = <0 0x100000 0x8000>;
700 compatible = "ti,cpsw";
701 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
702 clock-names = "fck", "cpts";
703 cpdma_channels = <8>;
704 ale_entries = <1024>;
705 bd_ram_size = <0x2000>;
706 mac_control = <0x20>;
709 cpts_clock_mult = <0x80000000>;
710 cpts_clock_shift = <29>;
713 #address-cells = <1>;
721 interrupts = <40 41 42 43>;
722 ranges = <0 0 0x8000>;
723 syscon = <&scm_conf>;
725 davinci_mdio: mdio@800 {
726 compatible = "ti,cpsw-mdio", "ti,davinci_mdio";
727 clocks = <&cpsw_125mhz_gclk>;
729 #address-cells = <1>;
731 bus_freq = <1000000>;
735 cpsw_emac0: slave@200 {
736 /* Filled in by U-Boot */
737 mac-address = [ 00 00 00 00 00 00 ];
738 phys = <&phy_gmii_sel 1>;
741 cpsw_emac1: slave@300 {
742 /* Filled in by U-Boot */
743 mac-address = [ 00 00 00 00 00 00 ];
744 phys = <&phy_gmii_sel 2>;
750 gpmc: gpmc@50000000 {
751 compatible = "ti,am3352-gpmc";
754 reg = <0x50000000 0x2000>;
757 gpmc,num-waitpins = <2>;
758 #address-cells = <2>;
760 interrupt-controller;
761 #interrupt-cells = <2>;
768 #include "dm814x-clocks.dtsi"
770 /* Preferred always-on timer for clocksource */
775 assigned-clocks = <&timer1_fck>;
776 assigned-clock-parents = <&devosc_ck>;
780 /* Preferred timer for clockevent */
785 assigned-clocks = <&timer2_fck>;
786 assigned-clock-parents = <&devosc_ck>;