arch/arm/boot/dts/at91sam9x5.dtsi

   1 /*
   2  * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
   3  *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
   4  *                   AT91SAM9X25, AT91SAM9X35 SoC
   5  *
   6  *  Copyright (C) 2012 Atmel,
   7  *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
   8  *
   9  * Licensed under GPLv2 or later.
  10  */
  11
  12 /include/ "skeleton.dtsi"
  13
  14 / {
  15         model = "Atmel AT91SAM9x5 family SoC";
  16         compatible = "atmel,at91sam9x5";
  17         interrupt-parent = <&aic>;
  18
  19         aliases {
  20                 serial0 = &dbgu;
  21                 serial1 = &usart0;
  22                 serial2 = &usart1;
  23                 serial3 = &usart2;
  24                 gpio0 = &pioA;
  25                 gpio1 = &pioB;
  26                 gpio2 = &pioC;
  27                 gpio3 = &pioD;
  28                 tcb0 = &tcb0;
  29                 tcb1 = &tcb1;
  30                 i2c0 = &i2c0;
  31                 i2c1 = &i2c1;
  32                 i2c2 = &i2c2;
  33                 ssc0 = &ssc0;
  34         };
  35         cpus {
  36                 cpu@0 {
  37                         compatible = "arm,arm926ejs";
  38                 };
  39         };
  40
  41         memory {
  42                 reg = <0x20000000 0x10000000>;
  43         };
  44
  45         ahb {
  46                 compatible = "simple-bus";
  47                 #address-cells = <1>;
  48                 #size-cells = <1>;
  49                 ranges;
  50
  51                 apb {
  52                         compatible = "simple-bus";
  53                         #address-cells = <1>;
  54                         #size-cells = <1>;
  55                         ranges;
  56
  57                         aic: interrupt-controller@fffff000 {
  58                                 #interrupt-cells = <3>;
  59                                 compatible = "atmel,at91rm9200-aic";
  60                                 interrupt-controller;
  61                                 reg = <0xfffff000 0x200>;
  62                                 atmel,external-irqs = <31>;
  63                         };
  64
  65                         ramc0: ramc@ffffe800 {
  66                                 compatible = "atmel,at91sam9g45-ddramc";
  67                                 reg = <0xffffe800 0x200>;
  68                         };
  69
  70                         pmc: pmc@fffffc00 {
  71                                 compatible = "atmel,at91rm9200-pmc";
  72                                 reg = <0xfffffc00 0x100>;
  73                         };
  74
  75                         rstc@fffffe00 {
  76                                 compatible = "atmel,at91sam9g45-rstc";
  77                                 reg = <0xfffffe00 0x10>;
  78                         };
  79
  80                         shdwc@fffffe10 {
  81                                 compatible = "atmel,at91sam9x5-shdwc";
  82                                 reg = <0xfffffe10 0x10>;
  83                         };
  84
  85                         pit: timer@fffffe30 {
  86                                 compatible = "atmel,at91sam9260-pit";
  87                                 reg = <0xfffffe30 0xf>;
  88                                 interrupts = <1 4 7>;
  89                         };
  90
  91                         tcb0: timer@f8008000 {
  92                                 compatible = "atmel,at91sam9x5-tcb";
  93                                 reg = <0xf8008000 0x100>;
  94                                 interrupts = <17 4 0>;
  95                         };
  96
  97                         tcb1: timer@f800c000 {
  98                                 compatible = "atmel,at91sam9x5-tcb";
  99                                 reg = <0xf800c000 0x100>;
 100                                 interrupts = <17 4 0>;
 101                         };
 102
 103                         dma0: dma-controller@ffffec00 {
 104                                 compatible = "atmel,at91sam9g45-dma";
 105                                 reg = <0xffffec00 0x200>;
 106                                 interrupts = <20 4 0>;
 107                                 #dma-cells = <2>;
 108                         };
 109
 110                         dma1: dma-controller@ffffee00 {
 111                                 compatible = "atmel,at91sam9g45-dma";
 112                                 reg = <0xffffee00 0x200>;
 113                                 interrupts = <21 4 0>;
 114                                 #dma-cells = <2>;
 115                         };
 116
 117                         pinctrl@fffff400 {
 118                                 #address-cells = <1>;
 119                                 #size-cells = <1>;
 120                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 121                                 ranges = <0xfffff400 0xfffff400 0x800>;
 122
 123                                 /* shared pinctrl settings */
 124                                 dbgu {
 125                                         pinctrl_dbgu: dbgu-0 {
 126                                                 atmel,pins =
 127                                                         <0 9 0x1 0x0    /* PA9 periph A */
 128                                                          0 10 0x1 0x1>; /* PA10 periph A with pullup */
 129                                         };
 130                                 };
 131
 132                                 usart0 {
 133                                         pinctrl_usart0: usart0-0 {
 134                                                 atmel,pins =
 135                                                         <0 0 0x1 0x1    /* PA0 periph A with pullup */
 136                                                          0 1 0x1 0x0>;  /* PA1 periph A */
 137                                         };
 138
 139                                         pinctrl_usart0_rts: usart0_rts-0 {
 140                                                 atmel,pins =
 141                                                         <0 2 0x1 0x0>;  /* PA2 periph A */
 142                                         };
 143
 144                                         pinctrl_usart0_cts: usart0_cts-0 {
 145                                                 atmel,pins =
 146                                                         <0 3 0x1 0x0>;  /* PA3 periph A */
 147                                         };
 148
 149                                         pinctrl_usart0_sck: usart0_sck-0 {
 150                                                 atmel,pins =
 151                                                         <0 4 0x1 0x0>;  /* PA4 periph A */
 152                                         };
 153                                 };
 154
 155                                 usart1 {
 156                                         pinctrl_usart1: usart1-0 {
 157                                                 atmel,pins =
 158                                                         <0 5 0x1 0x1    /* PA5 periph A with pullup */
 159                                                          0 6 0x1 0x0>;  /* PA6 periph A */
 160                                         };
 161
 162                                         pinctrl_usart1_rts: usart1_rts-0 {
 163                                                 atmel,pins =
 164                                                         <2 27 0x3 0x0>; /* PC27 periph C */
 165                                         };
 166
 167                                         pinctrl_usart1_cts: usart1_cts-0 {
 168                                                 atmel,pins =
 169                                                         <2 28 0x3 0x0>; /* PC28 periph C */
 170                                         };
 171
 172                                         pinctrl_usart1_sck: usart1_sck-0 {
 173                                                 atmel,pins =
 174                                                         <2 28 0x3 0x0>; /* PC29 periph C */
 175                                         };
 176                                 };
 177
 178                                 usart2 {
 179                                         pinctrl_usart2: usart2-0 {
 180                                                 atmel,pins =
 181                                                         <0 7 0x1 0x1    /* PA7 periph A with pullup */
 182                                                          0 8 0x1 0x0>;  /* PA8 periph A */
 183                                         };
 184
 185                                         pinctrl_uart2_rts: uart2_rts-0 {
 186                                                 atmel,pins =
 187                                                         <1 0 0x2 0x0>;  /* PB0 periph B */
 188                                         };
 189
 190                                         pinctrl_uart2_cts: uart2_cts-0 {
 191                                                 atmel,pins =
 192                                                         <1 1 0x2 0x0>;  /* PB1 periph B */
 193                                         };
 194
 195                                         pinctrl_usart2_sck: usart2_sck-0 {
 196                                                 atmel,pins =
 197                                                         <1 2 0x2 0x0>;  /* PB2 periph B */
 198                                         };
 199                                 };
 200
 201                                 usart3 {
 202                                         pinctrl_usart3: usart3-0 {
 203                                                 atmel,pins =
 204                                                         <2 22 0x2 0x1   /* PC22 periph B with pullup */
 205                                                          2 23 0x2 0x0>; /* PC23 periph B */
 206                                         };
 207
 208                                         pinctrl_usart3_rts: usart3_rts-0 {
 209                                                 atmel,pins =
 210                                                         <2 24 0x2 0x0>; /* PC24 periph B */
 211                                         };
 212
 213                                         pinctrl_usart3_cts: usart3_cts-0 {
 214                                                 atmel,pins =
 215                                                         <2 25 0x2 0x0>; /* PC25 periph B */
 216                                         };
 217
 218                                         pinctrl_usart3_sck: usart3_sck-0 {
 219                                                 atmel,pins =
 220                                                         <2 26 0x2 0x0>; /* PC26 periph B */
 221                                         };
 222                                 };
 223
 224                                 uart0 {
 225                                         pinctrl_uart0: uart0-0 {
 226                                                 atmel,pins =
 227                                                         <2 8 0x3 0x0    /* PC8 periph C */
 228                                                          2 9 0x3 0x1>;  /* PC9 periph C with pullup */
 229                                         };
 230                                 };
 231
 232                                 uart1 {
 233                                         pinctrl_uart1: uart1-0 {
 234                                                 atmel,pins =
 235                                                         <2 16 0x3 0x0   /* PC16 periph C */
 236                                                          2 17 0x3 0x1>; /* PC17 periph C with pullup */
 237                                         };
 238                                 };
 239
 240                                 nand {
 241                                         pinctrl_nand: nand-0 {
 242                                                 atmel,pins =
 243                                                         <3 0 0x1 0x0    /* PD0 periph A Read Enable */
 244                                                          3 1 0x1 0x0    /* PD1 periph A Write Enable */
 245                                                          3 2 0x1 0x0    /* PD2 periph A Address Latch Enable */
 246                                                          3 3 0x1 0x0    /* PD3 periph A Command Latch Enable */
 247                                                          3 4 0x0 0x1    /* PD4 gpio Chip Enable pin pull_up */
 248                                                          3 5 0x0 0x1    /* PD5 gpio RDY/BUSY pin pull_up */
 249                                                          3 6 0x1 0x0    /* PD6 periph A Data bit 0 */
 250                                                          3 7 0x1 0x0    /* PD7 periph A Data bit 1 */
 251                                                          3 8 0x1 0x0    /* PD8 periph A Data bit 2 */
 252                                                          3 9 0x1 0x0    /* PD9 periph A Data bit 3 */
 253                                                          3 10 0x1 0x0   /* PD10 periph A Data bit 4 */
 254                                                          3 11 0x1 0x0   /* PD11 periph A Data bit 5 */
 255                                                          3 12 0x1 0x0   /* PD12 periph A Data bit 6 */
 256                                                          3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */
 257                                         };
 258
 259                                         pinctrl_nand_16bits: nand_16bits-0 {
 260                                                 atmel,pins =
 261                                                         <3 14 0x1 0x0   /* PD14 periph A Data bit 8 */
 262                                                          3 15 0x1 0x0   /* PD15 periph A Data bit 9 */
 263                                                          3 16 0x1 0x0   /* PD16 periph A Data bit 10 */
 264                                                          3 17 0x1 0x0   /* PD17 periph A Data bit 11 */
 265                                                          3 18 0x1 0x0   /* PD18 periph A Data bit 12 */
 266                                                          3 19 0x1 0x0   /* PD19 periph A Data bit 13 */
 267                                                          3 20 0x1 0x0   /* PD20 periph A Data bit 14 */
 268                                                          3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */
 269                                         };
 270                                 };
 271
 272                                 macb0 {
 273                                         pinctrl_macb0_rmii: macb0_rmii-0 {
 274                                                 atmel,pins =
 275                                                         <1 0 0x1 0x0    /* PB0 periph A */
 276                                                          1 1 0x1 0x0    /* PB1 periph A */
 277                                                          1 2 0x1 0x0    /* PB2 periph A */
 278                                                          1 3 0x1 0x0    /* PB3 periph A */
 279                                                          1 4 0x1 0x0    /* PB4 periph A */
 280                                                          1 5 0x1 0x0    /* PB5 periph A */
 281                                                          1 6 0x1 0x0    /* PB6 periph A */
 282                                                          1 7 0x1 0x0    /* PB7 periph A */
 283                                                          1 9 0x1 0x0    /* PB9 periph A */
 284                                                          1 10 0x1 0x0>; /* PB10 periph A */
 285                                         };
 286
 287                                         pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
 288                                                 atmel,pins =
 289                                                         <1 8 0x1 0x0    /* PB8 periph A */
 290                                                          1 11 0x1 0x0   /* PB11 periph A */
 291                                                          1 12 0x1 0x0   /* PB12 periph A */
 292                                                          1 13 0x1 0x0   /* PB13 periph A */
 293                                                          1 14 0x1 0x0   /* PB14 periph A */
 294                                                          1 15 0x1 0x0   /* PB15 periph A */
 295                                                          1 16 0x1 0x0   /* PB16 periph A */
 296                                                          1 17 0x1 0x0>; /* PB17 periph A */
 297                                         };
 298                                 };
 299
 300                                 mmc0 {
 301                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
 302                                                 atmel,pins =
 303                                                         <0 17 0x1 0x0   /* PA17 periph A */
 304                                                          0 16 0x1 0x1   /* PA16 periph A with pullup */
 305                                                          0 15 0x1 0x1>; /* PA15 periph A with pullup */
 306                                         };
 307
 308                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 309                                                 atmel,pins =
 310                                                         <0 18 0x1 0x1   /* PA18 periph A with pullup */
 311                                                          0 19 0x1 0x1   /* PA19 periph A with pullup */
 312                                                          0 20 0x1 0x1>; /* PA20 periph A with pullup */
 313                                         };
 314                                 };
 315
 316                                 mmc1 {
 317                                         pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
 318                                                 atmel,pins =
 319                                                         <0 13 0x2 0x0   /* PA13 periph B */
 320                                                          0 12 0x2 0x1   /* PA12 periph B with pullup */
 321                                                          0 11 0x2 0x1>; /* PA11 periph B with pullup */
 322                                         };
 323
 324                                         pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
 325                                                 atmel,pins =
 326                                                         <0 2 0x2 0x1    /* PA2 periph B with pullup */
 327                                                          0 3 0x2 0x1    /* PA3 periph B with pullup */
 328                                                          0 4 0x2 0x1>;  /* PA4 periph B with pullup */
 329                                         };
 330                                 };
 331
 332                                 ssc0 {
 333                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 334                                                 atmel,pins =
 335                                                         <0 24 0x2 0x0   /* PA24 periph B */
 336                                                          0 25 0x2 0x0   /* PA25 periph B */
 337                                                          0 26 0x2 0x0>; /* PA26 periph B */
 338                                         };
 339
 340                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 341                                                 atmel,pins =
 342                                                         <0 27 0x2 0x0   /* PA27 periph B */
 343                                                          0 28 0x2 0x0   /* PA28 periph B */
 344                                                          0 29 0x2 0x0>; /* PA29 periph B */
 345                                         };
 346                                 };
 347
 348                                 spi0 {
 349                                         pinctrl_spi0: spi0-0 {
 350                                                 atmel,pins =
 351                                                         <0 11 0x1 0x0   /* PA11 periph A SPI0_MISO pin */
 352                                                          0 12 0x1 0x0   /* PA12 periph A SPI0_MOSI pin */
 353                                                          0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */
 354                                         };
 355                                 };
 356
 357                                 spi1 {
 358                                         pinctrl_spi1: spi1-0 {
 359                                                 atmel,pins =
 360                                                         <0 21 0x2 0x0   /* PA21 periph B SPI1_MISO pin */
 361                                                          0 22 0x2 0x0   /* PA22 periph B SPI1_MOSI pin */
 362                                                          0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */
 363                                         };
 364                                 };
 365
 366                                 i2c0 {
 367                                         pinctrl_i2c0: i2c0-0 {
 368                                                 atmel,pins =
 369                                                         <0 30 0x1 0x0   /* PA30 periph A I2C0 data */
 370                                                          0 31 0x1 0x0>; /* PA31 periph A I2C0 clock */
 371                                         };
 372                                 };
 373
 374                                 i2c1 {
 375                                         pinctrl_i2c1: i2c1-0 {
 376                                                 atmel,pins =
 377                                                         <2 0 0x3 0x0    /* PC0 periph C I2C1 data */
 378                                                          2 1 0x3 0x0>;  /* PC1 periph C I2C1 clock */
 379                                         };
 380                                 };
 381
 382                                 i2c2 {
 383                                         pinctrl_i2c2: i2c2-0 {
 384                                                 atmel,pins =
 385                                                         <1 4 0x2 0x0    /* PB4 periph B I2C2 data */
 386                                                          1 5 0x2 0x0>;  /* PB5 periph B I2C2 clock */
 387                                         };
 388                                 };
 389
 390                                 i2c_gpio0 {
 391                                         pinctrl_i2c_gpio0: i2c_gpio0-0 {
 392                                                 atmel,pins =
 393                                                         <0 30 0x0 0x2   /* PA30 gpio multidrive I2C0 data */
 394                                                          0 31 0x0 0x2>; /* PA31 gpio multidrive I2C0 clock */
 395                                         };
 396                                 };
 397
 398                                 i2c_gpio1 {
 399                                         pinctrl_i2c_gpio1: i2c_gpio1-0 {
 400                                                 atmel,pins =
 401                                                         <2 0 0x0 0x2    /* PC0 gpio multidrive I2C1 data */
 402                                                          2 1 0x0 0x2>;  /* PC1 gpio multidrive I2C1 clock */
 403                                         };
 404                                 };
 405
 406                                 i2c_gpio2 {
 407                                         pinctrl_i2c_gpio2: i2c_gpio2-0 {
 408                                                 atmel,pins =
 409                                                         <1 4 0x0 0x2    /* PB4 gpio multidrive I2C2 data */
 410                                                          1 5 0x0 0x2>;  /* PB5 gpio multidrive I2C2 clock */
 411                                         };
 412                                 };
 413
 414                                 pioA: gpio@fffff400 {
 415                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 416                                         reg = <0xfffff400 0x200>;
 417                                         interrupts = <2 4 1>;
 418                                         #gpio-cells = <2>;
 419                                         gpio-controller;
 420                                         interrupt-controller;
 421                                         #interrupt-cells = <2>;
 422                                 };
 423
 424                                 pioB: gpio@fffff600 {
 425                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 426                                         reg = <0xfffff600 0x200>;
 427                                         interrupts = <2 4 1>;
 428                                         #gpio-cells = <2>;
 429                                         gpio-controller;
 430                                         #gpio-lines = <19>;
 431                                         interrupt-controller;
 432                                         #interrupt-cells = <2>;
 433                                 };
 434
 435                                 pioC: gpio@fffff800 {
 436                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 437                                         reg = <0xfffff800 0x200>;
 438                                         interrupts = <3 4 1>;
 439                                         #gpio-cells = <2>;
 440                                         gpio-controller;
 441                                         interrupt-controller;
 442                                         #interrupt-cells = <2>;
 443                                 };
 444
 445                                 pioD: gpio@fffffa00 {
 446                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 447                                         reg = <0xfffffa00 0x200>;
 448                                         interrupts = <3 4 1>;
 449                                         #gpio-cells = <2>;
 450                                         gpio-controller;
 451                                         #gpio-lines = <22>;
 452                                         interrupt-controller;
 453                                         #interrupt-cells = <2>;
 454                                 };
 455                         };
 456
 457                         ssc0: ssc@f0010000 {
 458                                 compatible = "atmel,at91sam9g45-ssc";
 459                                 reg = <0xf0010000 0x4000>;
 460                                 interrupts = <28 4 5>;
 461                                 pinctrl-names = "default";
 462                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 463                                 status = "disabled";
 464                         };
 465
 466                         mmc0: mmc@f0008000 {
 467                                 compatible = "atmel,hsmci";
 468                                 reg = <0xf0008000 0x600>;
 469                                 interrupts = <12 4 0>;
 470                                 dmas = <&dma0 1 0>;
 471                                 dma-names = "rxtx";
 472                                 #address-cells = <1>;
 473                                 #size-cells = <0>;
 474                                 status = "disabled";
 475                         };
 476
 477                         mmc1: mmc@f000c000 {
 478                                 compatible = "atmel,hsmci";
 479                                 reg = <0xf000c000 0x600>;
 480                                 interrupts = <26 4 0>;
 481                                 dmas = <&dma1 1 0>;
 482                                 dma-names = "rxtx";
 483                                 #address-cells = <1>;
 484                                 #size-cells = <0>;
 485                                 status = "disabled";
 486                         };
 487
 488                         dbgu: serial@fffff200 {
 489                                 compatible = "atmel,at91sam9260-usart";
 490                                 reg = <0xfffff200 0x200>;
 491                                 interrupts = <1 4 7>;
 492                                 pinctrl-names = "default";
 493                                 pinctrl-0 = <&pinctrl_dbgu>;
 494                                 status = "disabled";
 495                         };
 496
 497                         usart0: serial@f801c000 {
 498                                 compatible = "atmel,at91sam9260-usart";
 499                                 reg = <0xf801c000 0x200>;
 500                                 interrupts = <5 4 5>;
 501                                 pinctrl-names = "default";
 502                                 pinctrl-0 = <&pinctrl_usart0>;
 503                                 status = "disabled";
 504                         };
 505
 506                         usart1: serial@f8020000 {
 507                                 compatible = "atmel,at91sam9260-usart";
 508                                 reg = <0xf8020000 0x200>;
 509                                 interrupts = <6 4 5>;
 510                                 pinctrl-names = "default";
 511                                 pinctrl-0 = <&pinctrl_usart1>;
 512                                 status = "disabled";
 513                         };
 514
 515                         usart2: serial@f8024000 {
 516                                 compatible = "atmel,at91sam9260-usart";
 517                                 reg = <0xf8024000 0x200>;
 518                                 interrupts = <7 4 5>;
 519                                 pinctrl-names = "default";
 520                                 pinctrl-0 = <&pinctrl_usart2>;
 521                                 status = "disabled";
 522                         };
 523
 524                         macb0: ethernet@f802c000 {
 525                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
 526                                 reg = <0xf802c000 0x100>;
 527                                 interrupts = <24 4 3>;
 528                                 pinctrl-names = "default";
 529                                 pinctrl-0 = <&pinctrl_macb0_rmii>;
 530                                 status = "disabled";
 531                         };
 532
 533                         macb1: ethernet@f8030000 {
 534                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
 535                                 reg = <0xf8030000 0x100>;
 536                                 interrupts = <27 4 3>;
 537                                 status = "disabled";
 538                         };
 539
 540                         i2c0: i2c@f8010000 {
 541                                 compatible = "atmel,at91sam9x5-i2c";
 542                                 reg = <0xf8010000 0x100>;
 543                                 interrupts = <9 4 6>;
 544                                 dmas = <&dma0 1 7>,
 545                                        <&dma0 1 8>;
 546                                 dma-names = "tx", "rx";
 547                                 #address-cells = <1>;
 548                                 #size-cells = <0>;
 549                                 pinctrl-names = "default";
 550                                 pinctrl-0 = <&pinctrl_i2c0>;
 551                                 status = "disabled";
 552                         };
 553
 554                         i2c1: i2c@f8014000 {
 555                                 compatible = "atmel,at91sam9x5-i2c";
 556                                 reg = <0xf8014000 0x100>;
 557                                 interrupts = <10 4 6>;
 558                                 dmas = <&dma1 1 5>,
 559                                        <&dma1 1 6>;
 560                                 dma-names = "tx", "rx";
 561                                 #address-cells = <1>;
 562                                 #size-cells = <0>;
 563                                 pinctrl-names = "default";
 564                                 pinctrl-0 = <&pinctrl_i2c1>;
 565                                 status = "disabled";
 566                         };
 567
 568                         i2c2: i2c@f8018000 {
 569                                 compatible = "atmel,at91sam9x5-i2c";
 570                                 reg = <0xf8018000 0x100>;
 571                                 interrupts = <11 4 6>;
 572                                 dmas = <&dma0 1 9>,
 573                                        <&dma0 1 10>;
 574                                 dma-names = "tx", "rx";
 575                                 #address-cells = <1>;
 576                                 #size-cells = <0>;
 577                                 pinctrl-names = "default";
 578                                 pinctrl-0 = <&pinctrl_i2c2>;
 579                                 status = "disabled";
 580                         };
 581
 582                         adc0: adc@f804c000 {
 583                                 compatible = "atmel,at91sam9260-adc";
 584                                 reg = <0xf804c000 0x100>;
 585                                 interrupts = <19 4 0>;
 586                                 atmel,adc-use-external;
 587                                 atmel,adc-channels-used = <0xffff>;
 588                                 atmel,adc-vref = <3300>;
 589                                 atmel,adc-num-channels = <12>;
 590                                 atmel,adc-startup-time = <40>;
 591                                 atmel,adc-channel-base = <0x50>;
 592                                 atmel,adc-drdy-mask = <0x1000000>;
 593                                 atmel,adc-status-register = <0x30>;
 594                                 atmel,adc-trigger-register = <0xc0>;
 595                                 atmel,adc-res = <8 10>;
 596                                 atmel,adc-res-names = "lowres", "highres";
 597                                 atmel,adc-use-res = "highres";
 598
 599                                 trigger@0 {
 600                                         trigger-name = "external-rising";
 601                                         trigger-value = <0x1>;
 602                                         trigger-external;
 603                                 };
 604
 605                                 trigger@1 {
 606                                         trigger-name = "external-falling";
 607                                         trigger-value = <0x2>;
 608                                         trigger-external;
 609                                 };
 610
 611                                 trigger@2 {
 612                                         trigger-name = "external-any";
 613                                         trigger-value = <0x3>;
 614                                         trigger-external;
 615                                 };
 616
 617                                 trigger@3 {
 618                                         trigger-name = "continuous";
 619                                         trigger-value = <0x6>;
 620                                 };
 621                         };
 622
 623                         spi0: spi@f0000000 {
 624                                 #address-cells = <1>;
 625                                 #size-cells = <0>;
 626                                 compatible = "atmel,at91rm9200-spi";
 627                                 reg = <0xf0000000 0x100>;
 628                                 interrupts = <13 4 3>;
 629                                 pinctrl-names = "default";
 630                                 pinctrl-0 = <&pinctrl_spi0>;
 631                                 status = "disabled";
 632                         };
 633
 634                         spi1: spi@f0004000 {
 635                                 #address-cells = <1>;
 636                                 #size-cells = <0>;
 637                                 compatible = "atmel,at91rm9200-spi";
 638                                 reg = <0xf0004000 0x100>;
 639                                 interrupts = <14 4 3>;
 640                                 pinctrl-names = "default";
 641                                 pinctrl-0 = <&pinctrl_spi1>;
 642                                 status = "disabled";
 643                         };
 644
 645                         rtc@fffffeb0 {
 646                                 compatible = "atmel,at91rm9200-rtc";
 647                                 reg = <0xfffffeb0 0x40>;
 648                                 interrupts = <1 4 7>;
 649                                 status = "disabled";
 650                         };
 651                 };
 652
 653                 nand0: nand@40000000 {
 654                         compatible = "atmel,at91rm9200-nand";
 655                         #address-cells = <1>;
 656                         #size-cells = <1>;
 657                         reg = <0x40000000 0x10000000
 658                                0xffffe000 0x600         /* PMECC Registers */
 659                                0xffffe600 0x200         /* PMECC Error Location Registers */
 660                                0x00108000 0x18000       /* PMECC looup table in ROM code  */
 661                               >;
 662                         atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
 663                         atmel,nand-addr-offset = <21>;
 664                         atmel,nand-cmd-offset = <22>;
 665                         pinctrl-names = "default";
 666                         pinctrl-0 = <&pinctrl_nand>;
 667                         gpios = <&pioD 5 0
 668                                  &pioD 4 0
 669                                  0
 670                                 >;
 671                         status = "disabled";
 672                 };
 673
 674                 usb0: ohci@00600000 {
 675                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
 676                         reg = <0x00600000 0x100000>;
 677                         interrupts = <22 4 2>;
 678                         status = "disabled";
 679                 };
 680
 681                 usb1: ehci@00700000 {
 682                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
 683                         reg = <0x00700000 0x100000>;
 684                         interrupts = <22 4 2>;
 685                         status = "disabled";
 686                 };
 687         };
 688
 689         i2c@0 {
 690                 compatible = "i2c-gpio";
 691                 gpios = <&pioA 30 0 /* sda */
 692                          &pioA 31 0 /* scl */
 693                         >;
 694                 i2c-gpio,sda-open-drain;
 695                 i2c-gpio,scl-open-drain;
 696                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
 697                 #address-cells = <1>;
 698                 #size-cells = <0>;
 699                 pinctrl-names = "default";
 700                 pinctrl-0 = <&pinctrl_i2c_gpio0>;
 701                 status = "disabled";
 702         };
 703
 704         i2c@1 {
 705                 compatible = "i2c-gpio";
 706                 gpios = <&pioC 0 0 /* sda */
 707                          &pioC 1 0 /* scl */
 708                         >;
 709                 i2c-gpio,sda-open-drain;
 710                 i2c-gpio,scl-open-drain;
 711                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
 712                 #address-cells = <1>;
 713                 #size-cells = <0>;
 714                 pinctrl-names = "default";
 715                 pinctrl-0 = <&pinctrl_i2c_gpio1>;
 716                 status = "disabled";
 717         };
 718
 719         i2c@2 {
 720                 compatible = "i2c-gpio";
 721                 gpios = <&pioB 4 0 /* sda */
 722                          &pioB 5 0 /* scl */
 723                         >;
 724                 i2c-gpio,sda-open-drain;
 725                 i2c-gpio,scl-open-drain;
 726                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
 727                 #address-cells = <1>;
 728                 #size-cells = <0>;
 729                 pinctrl-names = "default";
 730                 pinctrl-0 = <&pinctrl_i2c_gpio2>;
 731                 status = "disabled";
 732         };
 733 };