2 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
4 * Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
6 * Licensed under GPLv2 or later.
9 #include "skeleton.dtsi"
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/pwm/pwm.h>
17 model = "Atmel AT91SAM9RL family SoC";
18 compatible = "atmel,at91sam9rl", "atmel,at91sam9";
19 interrupt-parent = <&aic>;
44 compatible = "arm,arm926ej-s";
50 reg = <0x20000000 0x04000000>;
54 slow_xtal: slow_xtal {
55 compatible = "fixed-clock";
57 clock-frequency = <0>;
60 main_xtal: main_xtal {
61 compatible = "fixed-clock";
63 clock-frequency = <0>;
66 adc_op_clk: adc_op_clk{
67 compatible = "fixed-clock";
69 clock-frequency = <1000000>;
74 compatible = "mmio-sram";
75 reg = <0x00300000 0x10000>;
79 compatible = "simple-bus";
85 compatible = "atmel,at91sam9rl-lcdc";
86 reg = <0x00500000 0x1000>;
87 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
88 pinctrl-names = "default";
89 pinctrl-0 = <&pinctrl_fb>;
90 clocks = <&lcd_clk>, <&lcd_clk>;
91 clock-names = "hclk", "lcdc_clk";
96 compatible = "atmel,at91sam9rl-ebi";
100 atmel,matrix = <&matrix>;
101 reg = <0x10000000 0x80000000>;
102 ranges = <0x0 0x0 0x10000000 0x10000000
103 0x1 0x0 0x20000000 0x10000000
104 0x2 0x0 0x30000000 0x10000000
105 0x3 0x0 0x40000000 0x10000000
106 0x4 0x0 0x50000000 0x10000000
107 0x5 0x0 0x60000000 0x10000000>;
111 nand_controller: nand-controller {
112 compatible = "atmel,at91sam9g45-nand-controller";
113 #address-cells = <2>;
120 nand0: nand@40000000 {
121 compatible = "atmel,at91rm9200-nand";
122 #address-cells = <1>;
124 reg = <0x40000000 0x10000000>,
126 atmel,nand-addr-offset = <21>;
127 atmel,nand-cmd-offset = <22>;
129 pinctrl-names = "default";
130 pinctrl-0 = <&pinctrl_nand>;
131 gpios = <&pioD 17 GPIO_ACTIVE_HIGH>,
132 <&pioB 6 GPIO_ACTIVE_HIGH>,
138 compatible = "simple-bus";
139 #address-cells = <1>;
143 tcb0: timer@fffa0000 {
144 compatible = "atmel,at91rm9200-tcb";
145 reg = <0xfffa0000 0x100>;
146 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
147 <17 IRQ_TYPE_LEVEL_HIGH 0>,
148 <18 IRQ_TYPE_LEVEL_HIGH 0>;
149 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>;
150 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
154 compatible = "atmel,hsmci";
155 reg = <0xfffa4000 0x600>;
156 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
157 #address-cells = <1>;
159 pinctrl-names = "default";
160 clocks = <&mci0_clk>;
161 clock-names = "mci_clk";
166 compatible = "atmel,at91sam9260-i2c";
167 reg = <0xfffa8000 0x100>;
168 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
169 #address-cells = <1>;
171 clocks = <&twi0_clk>;
176 compatible = "atmel,at91sam9260-i2c";
177 reg = <0xfffac000 0x100>;
178 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
179 #address-cells = <1>;
184 usart0: serial@fffb0000 {
185 compatible = "atmel,at91sam9260-usart";
186 reg = <0xfffb0000 0x200>;
187 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
190 pinctrl-names = "default";
191 pinctrl-0 = <&pinctrl_usart0>;
192 clocks = <&usart0_clk>;
193 clock-names = "usart";
197 usart1: serial@fffb4000 {
198 compatible = "atmel,at91sam9260-usart";
199 reg = <0xfffb4000 0x200>;
200 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_usart1>;
205 clocks = <&usart1_clk>;
206 clock-names = "usart";
210 usart2: serial@fffb8000 {
211 compatible = "atmel,at91sam9260-usart";
212 reg = <0xfffb8000 0x200>;
213 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
216 pinctrl-names = "default";
217 pinctrl-0 = <&pinctrl_usart2>;
218 clocks = <&usart2_clk>;
219 clock-names = "usart";
223 usart3: serial@fffbc000 {
224 compatible = "atmel,at91sam9260-usart";
225 reg = <0xfffbc000 0x200>;
226 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
229 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_usart3>;
231 clocks = <&usart3_clk>;
232 clock-names = "usart";
237 compatible = "atmel,at91sam9rl-ssc";
238 reg = <0xfffc0000 0x4000>;
239 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
240 pinctrl-names = "default";
241 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
246 compatible = "atmel,at91sam9rl-ssc";
247 reg = <0xfffc4000 0x4000>;
248 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
249 pinctrl-names = "default";
250 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
255 compatible = "atmel,at91sam9rl-pwm";
256 reg = <0xfffc8000 0x300>;
257 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
260 clock-names = "pwm_clk";
265 #address-cells = <1>;
267 compatible = "atmel,at91rm9200-spi";
268 reg = <0xfffcc000 0x200>;
269 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
270 pinctrl-names = "default";
271 pinctrl-0 = <&pinctrl_spi0>;
272 clocks = <&spi0_clk>;
273 clock-names = "spi_clk";
278 #address-cells = <1>;
280 compatible = "atmel,at91sam9rl-adc";
281 reg = <0xfffd0000 0x100>;
282 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
283 clocks = <&adc_clk>, <&adc_op_clk>;
284 clock-names = "adc_clk", "adc_op_clk";
285 atmel,adc-use-external-triggers;
286 atmel,adc-channels-used = <0x3f>;
287 atmel,adc-vref = <3300>;
288 atmel,adc-startup-time = <40>;
289 atmel,adc-res = <8 10>;
290 atmel,adc-res-names = "lowres", "highres";
291 atmel,adc-use-res = "highres";
294 trigger-name = "timer-counter-0";
295 trigger-value = <0x1>;
298 trigger-name = "timer-counter-1";
299 trigger-value = <0x3>;
303 trigger-name = "timer-counter-2";
304 trigger-value = <0x5>;
308 trigger-name = "external";
309 trigger-value = <0x13>;
314 usb0: gadget@fffd4000 {
315 #address-cells = <1>;
317 compatible = "atmel,at91sam9rl-udc";
318 reg = <0x00600000 0x100000>,
320 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
321 clocks = <&udphs_clk>, <&utmi>;
322 clock-names = "pclk", "hclk";
327 atmel,fifo-size = <64>;
328 atmel,nb-banks = <1>;
333 atmel,fifo-size = <1024>;
334 atmel,nb-banks = <2>;
341 atmel,fifo-size = <1024>;
342 atmel,nb-banks = <2>;
349 atmel,fifo-size = <1024>;
350 atmel,nb-banks = <3>;
356 atmel,fifo-size = <1024>;
357 atmel,nb-banks = <3>;
363 atmel,fifo-size = <1024>;
364 atmel,nb-banks = <3>;
371 atmel,fifo-size = <1024>;
372 atmel,nb-banks = <3>;
378 dma0: dma-controller@ffffe600 {
379 compatible = "atmel,at91sam9rl-dma";
380 reg = <0xffffe600 0x200>;
381 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
383 clocks = <&dma0_clk>;
384 clock-names = "dma_clk";
387 ramc0: ramc@ffffea00 {
388 compatible = "atmel,at91sam9260-sdramc";
389 reg = <0xffffea00 0x200>;
393 compatible = "atmel,at91sam9260-smc", "syscon";
394 reg = <0xffffec00 0x200>;
397 matrix: matrix@ffffee00 {
398 compatible = "atmel,at91sam9rl-matrix", "syscon";
399 reg = <0xffffee00 0x200>;
402 aic: interrupt-controller@fffff000 {
403 #interrupt-cells = <3>;
404 compatible = "atmel,at91rm9200-aic";
405 interrupt-controller;
406 reg = <0xfffff000 0x200>;
407 atmel,external-irqs = <31>;
410 dbgu: serial@fffff200 {
411 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
412 reg = <0xfffff200 0x200>;
413 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
414 pinctrl-names = "default";
415 pinctrl-0 = <&pinctrl_dbgu>;
417 clock-names = "usart";
422 #address-cells = <1>;
424 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
425 ranges = <0xfffff400 0xfffff400 0x800>;
429 <0xffffffff 0xe05c6738>, /* pioA */
430 <0xffffffff 0x0000c780>, /* pioB */
431 <0xffffffff 0xe3ffff0e>, /* pioC */
432 <0x003fffff 0x0001ff3c>; /* pioD */
434 /* shared pinctrl settings */
436 pinctrl_adc0_ts: adc0_ts-0 {
438 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
439 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
440 <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
441 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
444 pinctrl_adc0_ad0: adc0_ad0-0 {
445 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
448 pinctrl_adc0_ad1: adc0_ad1-0 {
449 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
452 pinctrl_adc0_ad2: adc0_ad2-0 {
453 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>;
456 pinctrl_adc0_ad3: adc0_ad3-0 {
457 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
460 pinctrl_adc0_ad4: adc0_ad4-0 {
461 atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
464 pinctrl_adc0_ad5: adc0_ad5-0 {
465 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
468 pinctrl_adc0_adtrg: adc0_adtrg-0 {
469 atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
474 pinctrl_dbgu: dbgu-0 {
476 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
477 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
484 <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>,
485 <AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
486 <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>,
487 <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
488 <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
489 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
490 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
491 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>,
492 <AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>,
493 <AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
494 <AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>,
495 <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>,
496 <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
497 <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
498 <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>,
499 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
500 <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
501 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>,
502 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
503 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
504 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
509 pinctrl_i2c_gpio0: i2c_gpio0-0 {
511 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
512 <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
517 pinctrl_i2c_gpio1: i2c_gpio1-0 {
519 <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
520 <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
525 pinctrl_mmc0_clk: mmc0_clk-0 {
527 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
530 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
532 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
533 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
536 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
538 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
539 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
540 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
545 pinctrl_nand: nand-0 {
547 <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
548 <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
551 pinctrl_nand0_ale_cle: nand_ale_cle-0 {
553 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
554 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
557 pinctrl_nand0_oe_we: nand_oe_we-0 {
559 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>,
560 <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
563 pinctrl_nand0_cs: nand_cs-0 {
565 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
570 pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
571 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
574 pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
575 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
578 pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
579 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
582 pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
583 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
586 pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
587 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
590 pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
591 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
594 pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
595 atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
598 pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
599 atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
602 pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 {
603 atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
606 pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
607 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
610 pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
611 atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
616 pinctrl_spi0: spi0-0 {
618 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
619 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
620 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
625 pinctrl_ssc0_tx: ssc0_tx-0 {
627 <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
628 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
629 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
632 pinctrl_ssc0_rx: ssc0_rx-0 {
634 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
635 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
636 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
641 pinctrl_ssc1_tx: ssc1_tx-0 {
643 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
644 <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
645 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
648 pinctrl_ssc1_rx: ssc1_rx-0 {
650 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>,
651 <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
652 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
657 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
658 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
661 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
662 atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
665 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
666 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
669 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
670 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
673 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
674 atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
677 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
678 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
681 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
682 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
685 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
686 atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
689 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
690 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
695 pinctrl_usart0: usart0-0 {
697 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
698 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
701 pinctrl_usart0_rts: usart0_rts-0 {
703 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
706 pinctrl_usart0_cts: usart0_cts-0 {
708 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
711 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
713 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
714 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
717 pinctrl_usart0_dcd: usart0_dcd-0 {
719 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
722 pinctrl_usart0_ri: usart0_ri-0 {
724 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
727 pinctrl_usart0_sck: usart0_sck-0 {
729 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
734 pinctrl_usart1: usart1-0 {
736 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
737 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
740 pinctrl_usart1_rts: usart1_rts-0 {
742 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
745 pinctrl_usart1_cts: usart1_cts-0 {
747 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
750 pinctrl_usart1_sck: usart1_sck-0 {
752 <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
757 pinctrl_usart2: usart2-0 {
759 <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
760 <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
763 pinctrl_usart2_rts: usart2_rts-0 {
765 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
768 pinctrl_usart2_cts: usart2_cts-0 {
770 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
773 pinctrl_usart2_sck: usart2_sck-0 {
775 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
780 pinctrl_usart3: usart3-0 {
782 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
783 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
786 pinctrl_usart3_rts: usart3_rts-0 {
788 <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
791 pinctrl_usart3_cts: usart3_cts-0 {
793 <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
796 pinctrl_usart3_sck: usart3_sck-0 {
798 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
802 pioA: gpio@fffff400 {
803 compatible = "atmel,at91rm9200-gpio";
804 reg = <0xfffff400 0x200>;
805 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
808 interrupt-controller;
809 #interrupt-cells = <2>;
810 clocks = <&pioA_clk>;
813 pioB: gpio@fffff600 {
814 compatible = "atmel,at91rm9200-gpio";
815 reg = <0xfffff600 0x200>;
816 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
819 interrupt-controller;
820 #interrupt-cells = <2>;
821 clocks = <&pioB_clk>;
824 pioC: gpio@fffff800 {
825 compatible = "atmel,at91rm9200-gpio";
826 reg = <0xfffff800 0x200>;
827 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
830 interrupt-controller;
831 #interrupt-cells = <2>;
832 clocks = <&pioC_clk>;
835 pioD: gpio@fffffa00 {
836 compatible = "atmel,at91rm9200-gpio";
837 reg = <0xfffffa00 0x200>;
838 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
841 interrupt-controller;
842 #interrupt-cells = <2>;
843 clocks = <&pioD_clk>;
848 compatible = "atmel,at91sam9g45-pmc", "syscon";
849 reg = <0xfffffc00 0x100>;
850 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
851 interrupt-controller;
852 #address-cells = <1>;
854 #interrupt-cells = <1>;
857 compatible = "atmel,at91rm9200-clk-main";
859 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
860 clocks = <&main_xtal>;
864 compatible = "atmel,at91rm9200-clk-pll";
866 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
869 atmel,clk-input-range = <1000000 32000000>;
870 #atmel,pll-clk-output-range-cells = <3>;
871 atmel,pll-clk-output-ranges = <80000000 200000000 0>,
872 <190000000 240000000 2>;
876 compatible = "atmel,at91sam9x5-clk-utmi";
878 interrupt-parent = <&pmc>;
879 interrupts = <AT91_PMC_LOCKU>;
884 compatible = "atmel,at91rm9200-clk-master";
886 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
887 clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
888 atmel,clk-output-range = <0 94000000>;
889 atmel,clk-divisors = <1 2 4 0>;
893 compatible = "atmel,at91rm9200-clk-programmable";
894 #address-cells = <1>;
896 interrupt-parent = <&pmc>;
897 clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>;
902 interrupts = <AT91_PMC_PCKRDY(0)>;
908 interrupts = <AT91_PMC_PCKRDY(1)>;
913 compatible = "atmel,at91rm9200-clk-system";
914 #address-cells = <1>;
932 compatible = "atmel,at91rm9200-clk-peripheral";
933 #address-cells = <1>;
957 usart0_clk: usart0_clk {
962 usart1_clk: usart1_clk {
967 usart2_clk: usart2_clk {
972 usart3_clk: usart3_clk {
1002 ssc1_clk: ssc1_clk {
1032 dma0_clk: dma0_clk {
1037 udphs_clk: udphs_clk {
1050 compatible = "atmel,at91sam9260-rstc";
1051 reg = <0xfffffd00 0x10>;
1056 compatible = "atmel,at91sam9260-shdwc";
1057 reg = <0xfffffd10 0x10>;
1061 pit: timer@fffffd30 {
1062 compatible = "atmel,at91sam9260-pit";
1063 reg = <0xfffffd30 0xf>;
1064 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1069 compatible = "atmel,at91sam9260-wdt";
1070 reg = <0xfffffd40 0x10>;
1071 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1073 status = "disabled";
1077 compatible = "atmel,at91sam9x5-sckc";
1078 reg = <0xfffffd50 0x4>;
1080 slow_osc: slow_osc {
1081 compatible = "atmel,at91sam9x5-clk-slow-osc";
1083 atmel,startup-time-usec = <1200000>;
1084 clocks = <&slow_xtal>;
1087 slow_rc_osc: slow_rc_osc {
1088 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1090 atmel,startup-time-usec = <75>;
1091 clock-frequency = <32768>;
1092 clock-accuracy = <50000000>;
1096 compatible = "atmel,at91sam9x5-clk-slow";
1098 clocks = <&slow_rc_osc &slow_osc>;
1103 compatible = "atmel,at91sam9260-rtt";
1104 reg = <0xfffffd20 0x10>;
1105 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1107 status = "disabled";
1110 gpbr: syscon@fffffd60 {
1111 compatible = "atmel,at91sam9260-gpbr", "syscon";
1112 reg = <0xfffffd60 0x10>;
1113 status = "disabled";
1117 compatible = "atmel,at91rm9200-rtc";
1118 reg = <0xfffffe00 0x40>;
1119 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1121 status = "disabled";
1128 compatible = "i2c-gpio";
1129 gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */
1130 <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */
1131 i2c-gpio,sda-open-drain;
1132 i2c-gpio,scl-open-drain;
1133 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1134 #address-cells = <1>;
1136 pinctrl-names = "default";
1137 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1138 status = "disabled";
1142 compatible = "i2c-gpio";
1143 gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */
1144 <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */
1145 i2c-gpio,sda-open-drain;
1146 i2c-gpio,scl-open-drain;
1147 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1148 #address-cells = <1>;
1150 pinctrl-names = "default";
1151 pinctrl-0 = <&pinctrl_i2c_gpio1>;
1152 status = "disabled";