1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
4 * applies to AT91SAM9G45, AT91SAM9M10,
5 * AT91SAM9G46, AT91SAM9M11 SoC
7 * Copyright (C) 2011 Atmel,
8 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
20 model = "Atmel AT91SAM9G45 family SoC";
21 compatible = "atmel,at91sam9g45";
22 interrupt-parent = <&aic>;
48 compatible = "arm,arm926ej-s";
54 device_type = "memory";
55 reg = <0x70000000 0x10000000>;
59 slow_xtal: slow_xtal {
60 compatible = "fixed-clock";
62 clock-frequency = <0>;
65 main_xtal: main_xtal {
66 compatible = "fixed-clock";
68 clock-frequency = <0>;
71 adc_op_clk: adc_op_clk{
72 compatible = "fixed-clock";
74 clock-frequency = <300000>;
79 compatible = "mmio-sram";
80 reg = <0x00300000 0x10000>;
84 compatible = "simple-bus";
90 compatible = "simple-bus";
95 aic: interrupt-controller@fffff000 {
96 #interrupt-cells = <3>;
97 compatible = "atmel,at91rm9200-aic";
99 reg = <0xfffff000 0x200>;
100 atmel,external-irqs = <31>;
103 ramc0: ramc@ffffe400 {
104 compatible = "atmel,at91sam9g45-ddramc";
105 reg = <0xffffe400 0x200>;
106 clocks = <&pmc PMC_TYPE_SYSTEM 2>;
107 clock-names = "ddrck";
110 ramc1: ramc@ffffe600 {
111 compatible = "atmel,at91sam9g45-ddramc";
112 reg = <0xffffe600 0x200>;
113 clocks = <&pmc PMC_TYPE_SYSTEM 2>;
114 clock-names = "ddrck";
118 compatible = "atmel,at91sam9260-smc", "syscon";
119 reg = <0xffffe800 0x200>;
122 matrix: matrix@ffffea00 {
123 compatible = "atmel,at91sam9g45-matrix", "syscon";
124 reg = <0xffffea00 0x200>;
128 compatible = "atmel,at91sam9g45-pmc", "syscon";
129 reg = <0xfffffc00 0x100>;
130 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
132 clocks = <&clk32k>, <&main_xtal>;
133 clock-names = "slow_clk", "main_xtal";
137 compatible = "atmel,at91sam9g45-rstc";
138 reg = <0xfffffd00 0x10>;
142 pit: timer@fffffd30 {
143 compatible = "atmel,at91sam9260-pit";
144 reg = <0xfffffd30 0xf>;
145 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
146 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
151 compatible = "atmel,at91sam9rl-shdwc";
152 reg = <0xfffffd10 0x10>;
156 tcb0: timer@fff7c000 {
157 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
158 #address-cells = <1>;
160 reg = <0xfff7c000 0x100>;
161 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
162 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>;
163 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
166 tcb1: timer@fffd4000 {
167 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
168 #address-cells = <1>;
170 reg = <0xfffd4000 0x100>;
171 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
172 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>;
173 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
176 dma: dma-controller@ffffec00 {
177 compatible = "atmel,at91sam9g45-dma";
178 reg = <0xffffec00 0x200>;
179 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
181 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
182 clock-names = "dma_clk";
186 #address-cells = <1>;
188 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
189 ranges = <0xfffff200 0xfffff200 0xa00>;
193 0xffffffff 0xffc003ff /* pioA */
194 0xffffffff 0x800f8f00 /* pioB */
195 0xffffffff 0x00000e00 /* pioC */
196 0xffffffff 0xff0c1381 /* pioD */
197 0xffffffff 0x81ffff81 /* pioE */
200 /* shared pinctrl settings */
202 pinctrl_ac97: ac97-0 {
204 <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* AC97RX */
205 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* AC97TX */
206 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* AC97FS */
207 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* AC97CK */
212 pinctrl_adc0_adtrg: adc0_adtrg {
213 atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
215 pinctrl_adc0_ad0: adc0_ad0 {
216 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
218 pinctrl_adc0_ad1: adc0_ad1 {
219 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
221 pinctrl_adc0_ad2: adc0_ad2 {
222 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
224 pinctrl_adc0_ad3: adc0_ad3 {
225 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
227 pinctrl_adc0_ad4: adc0_ad4 {
228 atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
230 pinctrl_adc0_ad5: adc0_ad5 {
231 atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
233 pinctrl_adc0_ad6: adc0_ad6 {
234 atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
236 pinctrl_adc0_ad7: adc0_ad7 {
237 atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
242 pinctrl_dbgu: dbgu-0 {
244 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
245 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
250 pinctrl_i2c0: i2c0-0 {
252 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA21 periph A TWCK0 */
253 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */
258 pinctrl_i2c1: i2c1-0 {
260 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A TWCK1 */
261 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */
266 pinctrl_isi_data_0_7: isi-0-data-0-7 {
268 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* D0 */
269 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* D1 */
270 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* D2 */
271 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* D3 */
272 AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* D4 */
273 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* D5 */
274 AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* D6 */
275 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* D7 */
276 AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PCK */
277 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* VSYNC */
278 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* HSYNC */
281 pinctrl_isi_data_8_9: isi-0-data-8-9 {
283 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* D8 */
284 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D9 */
287 pinctrl_isi_data_10_11: isi-0-data-10-11 {
289 <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* D10 */
290 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D11 */
295 pinctrl_usart0: usart0-0 {
297 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
298 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
301 pinctrl_usart0_rts: usart0_rts-0 {
303 <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
306 pinctrl_usart0_cts: usart0_cts-0 {
308 <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
313 pinctrl_usart1: usart1-0 {
315 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
316 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
319 pinctrl_usart1_rts: usart1_rts-0 {
321 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
324 pinctrl_usart1_cts: usart1_cts-0 {
326 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
331 pinctrl_usart2: usart2-0 {
333 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
334 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
337 pinctrl_usart2_rts: usart2_rts-0 {
339 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */
342 pinctrl_usart2_cts: usart2_cts-0 {
344 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
349 pinctrl_usart3: usart3-0 {
351 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
352 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
355 pinctrl_usart3_rts: usart3_rts-0 {
357 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
360 pinctrl_usart3_cts: usart3_cts-0 {
362 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
367 pinctrl_nand_rb: nand-rb-0 {
369 <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
372 pinctrl_nand_cs: nand-cs-0 {
374 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
379 pinctrl_macb_rmii: macb_rmii-0 {
381 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
382 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
383 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
384 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
385 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
386 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
387 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
388 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
389 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
390 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
393 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
395 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */
396 AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */
397 AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */
398 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */
399 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
400 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
401 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */
402 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
407 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
409 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */
410 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
411 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */
414 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
416 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
417 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
418 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
421 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
423 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
424 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
425 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
426 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */
431 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
433 <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */
434 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */
435 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
438 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
440 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
441 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */
442 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */
445 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
447 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */
448 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
449 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */
450 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */
455 pinctrl_ssc0_tx: ssc0_tx-0 {
457 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
458 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */
459 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */
462 pinctrl_ssc0_rx: ssc0_rx-0 {
464 <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */
465 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */
466 AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */
471 pinctrl_ssc1_tx: ssc1_tx-0 {
473 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */
474 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */
475 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
478 pinctrl_ssc1_rx: ssc1_rx-0 {
480 <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */
481 AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */
482 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
487 pinctrl_spi0: spi0-0 {
489 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */
490 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */
491 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */
496 pinctrl_spi1: spi1-0 {
498 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */
499 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */
500 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
505 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
506 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
509 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
510 atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
513 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
514 atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
517 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
518 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
521 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
522 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
525 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
526 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
529 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
530 atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
533 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
534 atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
537 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
538 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
543 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
544 atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
547 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
548 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
551 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
552 atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
555 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
556 atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
559 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
560 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
563 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
564 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
567 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
568 atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
571 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
572 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
575 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
576 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
583 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */
584 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */
585 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */
586 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */
587 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE5 periph A */
588 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE6 periph A */
589 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE7 periph A */
590 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE8 periph A */
591 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE9 periph A */
592 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE10 periph A */
593 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE11 periph A */
594 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE12 periph A */
595 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE13 periph A */
596 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE14 periph A */
597 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE15 periph A */
598 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE16 periph A */
599 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE17 periph A */
600 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE18 periph A */
601 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE19 periph A */
602 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE20 periph A */
603 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
604 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE22 periph A */
605 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
606 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
607 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
608 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
609 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
610 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
611 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
612 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
616 pioA: gpio@fffff200 {
617 compatible = "atmel,at91rm9200-gpio";
618 reg = <0xfffff200 0x200>;
619 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
622 interrupt-controller;
623 #interrupt-cells = <2>;
624 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
627 pioB: gpio@fffff400 {
628 compatible = "atmel,at91rm9200-gpio";
629 reg = <0xfffff400 0x200>;
630 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
633 interrupt-controller;
634 #interrupt-cells = <2>;
635 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
638 pioC: gpio@fffff600 {
639 compatible = "atmel,at91rm9200-gpio";
640 reg = <0xfffff600 0x200>;
641 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
644 interrupt-controller;
645 #interrupt-cells = <2>;
646 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
649 pioD: gpio@fffff800 {
650 compatible = "atmel,at91rm9200-gpio";
651 reg = <0xfffff800 0x200>;
652 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
655 interrupt-controller;
656 #interrupt-cells = <2>;
657 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
660 pioE: gpio@fffffa00 {
661 compatible = "atmel,at91rm9200-gpio";
662 reg = <0xfffffa00 0x200>;
663 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
666 interrupt-controller;
667 #interrupt-cells = <2>;
668 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
672 dbgu: serial@ffffee00 {
673 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
674 reg = <0xffffee00 0x200>;
675 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
676 pinctrl-names = "default";
677 pinctrl-0 = <&pinctrl_dbgu>;
678 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
679 clock-names = "usart";
683 usart0: serial@fff8c000 {
684 compatible = "atmel,at91sam9260-usart";
685 reg = <0xfff8c000 0x200>;
686 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
689 pinctrl-names = "default";
690 pinctrl-0 = <&pinctrl_usart0>;
691 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
692 clock-names = "usart";
696 usart1: serial@fff90000 {
697 compatible = "atmel,at91sam9260-usart";
698 reg = <0xfff90000 0x200>;
699 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
702 pinctrl-names = "default";
703 pinctrl-0 = <&pinctrl_usart1>;
704 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
705 clock-names = "usart";
709 usart2: serial@fff94000 {
710 compatible = "atmel,at91sam9260-usart";
711 reg = <0xfff94000 0x200>;
712 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
715 pinctrl-names = "default";
716 pinctrl-0 = <&pinctrl_usart2>;
717 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
718 clock-names = "usart";
722 usart3: serial@fff98000 {
723 compatible = "atmel,at91sam9260-usart";
724 reg = <0xfff98000 0x200>;
725 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
728 pinctrl-names = "default";
729 pinctrl-0 = <&pinctrl_usart3>;
730 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
731 clock-names = "usart";
735 macb0: ethernet@fffbc000 {
736 compatible = "cdns,at91sam9260-macb", "cdns,macb";
737 reg = <0xfffbc000 0x100>;
738 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
739 pinctrl-names = "default";
740 pinctrl-0 = <&pinctrl_macb_rmii>;
741 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_PERIPHERAL 25>;
742 clock-names = "hclk", "pclk";
747 compatible = "atmel,at91sam9g45-trng";
748 reg = <0xfffcc000 0x100>;
749 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
750 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
754 compatible = "atmel,at91sam9g10-i2c";
755 reg = <0xfff84000 0x100>;
756 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
757 pinctrl-names = "default";
758 pinctrl-0 = <&pinctrl_i2c0>;
759 #address-cells = <1>;
761 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
766 compatible = "atmel,at91sam9g10-i2c";
767 reg = <0xfff88000 0x100>;
768 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
769 pinctrl-names = "default";
770 pinctrl-0 = <&pinctrl_i2c1>;
771 #address-cells = <1>;
773 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
778 compatible = "atmel,at91sam9g45-ssc";
779 reg = <0xfff9c000 0x4000>;
780 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
781 pinctrl-names = "default";
782 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
783 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
784 clock-names = "pclk";
789 compatible = "atmel,at91sam9g45-ssc";
790 reg = <0xfffa0000 0x4000>;
791 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
792 pinctrl-names = "default";
793 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
794 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
795 clock-names = "pclk";
799 ac97: sound@fffac000 {
800 compatible = "atmel,at91sam9263-ac97c";
801 reg = <0xfffac000 0x4000>;
802 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 4>;
803 pinctrl-names = "default";
804 pinctrl-0 = <&pinctrl_ac97>;
805 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
806 clock-names = "ac97_clk";
811 #address-cells = <1>;
813 compatible = "atmel,at91sam9g45-adc";
814 reg = <0xfffb0000 0x100>;
815 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
816 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>;
817 clock-names = "adc_clk", "adc_op_clk";
818 atmel,adc-channels-used = <0xff>;
819 atmel,adc-vref = <3300>;
820 atmel,adc-startup-time = <40>;
821 atmel,adc-res = <8 10>;
822 atmel,adc-res-names = "lowres", "highres";
823 atmel,adc-use-res = "highres";
826 trigger-name = "external-rising";
827 trigger-value = <0x1>;
831 trigger-name = "external-falling";
832 trigger-value = <0x2>;
837 trigger-name = "external-any";
838 trigger-value = <0x3>;
843 trigger-name = "continuous";
844 trigger-value = <0x6>;
849 compatible = "atmel,at91sam9g45-isi";
850 reg = <0xfffb4000 0x4000>;
851 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 5>;
852 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
853 clock-names = "isi_clk";
856 #address-cells = <1>;
862 compatible = "atmel,at91sam9rl-pwm";
863 reg = <0xfffb8000 0x300>;
864 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
866 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
871 compatible = "atmel,hsmci";
872 reg = <0xfff80000 0x600>;
873 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
874 pinctrl-names = "default";
875 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
877 #address-cells = <1>;
879 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
880 clock-names = "mci_clk";
885 compatible = "atmel,hsmci";
886 reg = <0xfffd0000 0x600>;
887 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
888 pinctrl-names = "default";
889 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
891 #address-cells = <1>;
893 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
894 clock-names = "mci_clk";
899 compatible = "atmel,at91sam9260-wdt";
900 reg = <0xfffffd40 0x10>;
901 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
903 atmel,watchdog-type = "hardware";
904 atmel,reset-type = "all";
910 #address-cells = <1>;
912 compatible = "atmel,at91rm9200-spi";
913 reg = <0xfffa4000 0x200>;
914 interrupts = <14 4 3>;
915 pinctrl-names = "default";
916 pinctrl-0 = <&pinctrl_spi0>;
917 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
918 clock-names = "spi_clk";
923 #address-cells = <1>;
925 compatible = "atmel,at91rm9200-spi";
926 reg = <0xfffa8000 0x200>;
927 interrupts = <15 4 3>;
928 pinctrl-names = "default";
929 pinctrl-0 = <&pinctrl_spi1>;
930 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
931 clock-names = "spi_clk";
935 usb2: gadget@fff78000 {
936 compatible = "atmel,at91sam9g45-udc";
937 reg = <0x00600000 0x80000
939 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
940 clocks = <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
941 clock-names = "pclk", "hclk";
945 clk32k: sckc@fffffd50 {
946 compatible = "atmel,at91sam9x5-sckc";
947 reg = <0xfffffd50 0x4>;
948 clocks = <&slow_xtal>;
953 compatible = "atmel,at91sam9260-rtt";
954 reg = <0xfffffd20 0x10>;
955 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
961 compatible = "atmel,at91rm9200-rtc";
962 reg = <0xfffffdb0 0x30>;
963 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
968 gpbr: syscon@fffffd60 {
969 compatible = "atmel,at91sam9260-gpbr", "syscon";
970 reg = <0xfffffd60 0x10>;
976 compatible = "atmel,at91sam9g45-lcdc";
977 reg = <0x00500000 0x1000>;
978 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
979 pinctrl-names = "default";
980 pinctrl-0 = <&pinctrl_fb>;
981 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>;
982 clock-names = "hclk", "lcdc_clk";
987 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
988 reg = <0x00700000 0x100000>;
989 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
990 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
991 clock-names = "ohci_clk", "hclk", "uhpck";
996 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
997 reg = <0x00800000 0x100000>;
998 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
999 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
1000 clock-names = "usb_clk", "ehci_clk";
1001 status = "disabled";
1005 compatible = "atmel,at91sam9g45-ebi";
1006 #address-cells = <2>;
1009 atmel,matrix = <&matrix>;
1010 reg = <0x10000000 0x80000000>;
1011 ranges = <0x0 0x0 0x10000000 0x10000000
1012 0x1 0x0 0x20000000 0x10000000
1013 0x2 0x0 0x30000000 0x10000000
1014 0x3 0x0 0x40000000 0x10000000
1015 0x4 0x0 0x50000000 0x10000000
1016 0x5 0x0 0x60000000 0x10000000>;
1017 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
1018 status = "disabled";
1020 nand_controller: nand-controller {
1021 compatible = "atmel,at91sam9g45-nand-controller";
1022 #address-cells = <2>;
1025 status = "disabled";
1031 compatible = "i2c-gpio";
1032 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
1033 &pioA 21 GPIO_ACTIVE_HIGH /* scl */
1035 i2c-gpio,sda-open-drain;
1036 i2c-gpio,scl-open-drain;
1037 i2c-gpio,delay-us = <5>; /* ~100 kHz */
1038 #address-cells = <1>;
1040 status = "disabled";