2 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
6 * Licensed under GPLv2 only.
9 #include "skeleton.dtsi"
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
16 model = "Atmel AT91SAM9263 family SoC";
17 compatible = "atmel,at91sam9263";
18 interrupt-parent = <&aic>;
42 compatible = "arm,arm926ej-s";
48 reg = <0x20000000 0x08000000>;
52 main_xtal: main_xtal {
53 compatible = "fixed-clock";
55 clock-frequency = <0>;
58 slow_xtal: slow_xtal {
59 compatible = "fixed-clock";
61 clock-frequency = <0>;
65 sram0: sram@00300000 {
66 compatible = "mmio-sram";
67 reg = <0x00300000 0x14000>;
70 sram1: sram@00500000 {
71 compatible = "mmio-sram";
72 reg = <0x00500000 0x4000>;
76 compatible = "simple-bus";
82 compatible = "simple-bus";
87 aic: interrupt-controller@fffff000 {
88 #interrupt-cells = <3>;
89 compatible = "atmel,at91rm9200-aic";
91 reg = <0xfffff000 0x200>;
92 atmel,external-irqs = <30 31>;
96 compatible = "atmel,at91rm9200-pmc", "syscon";
97 reg = <0xfffffc00 0x100>;
98 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
100 #address-cells = <1>;
102 #interrupt-cells = <1>;
105 compatible = "atmel,at91rm9200-clk-main-osc";
107 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
108 clocks = <&main_xtal>;
112 compatible = "atmel,at91rm9200-clk-main";
114 clocks = <&main_osc>;
118 compatible = "atmel,at91rm9200-clk-pll";
120 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
123 atmel,clk-input-range = <1000000 32000000>;
124 #atmel,pll-clk-output-range-cells = <4>;
125 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
126 <190000000 240000000 2 1>;
130 compatible = "atmel,at91rm9200-clk-pll";
132 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
135 atmel,clk-input-range = <1000000 32000000>;
136 #atmel,pll-clk-output-range-cells = <4>;
137 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
138 <190000000 240000000 2 1>;
142 compatible = "atmel,at91rm9200-clk-master";
144 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
145 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
146 atmel,clk-output-range = <0 120000000>;
147 atmel,clk-divisors = <1 2 4 0>;
151 compatible = "atmel,at91rm9200-clk-usb";
153 atmel,clk-divisors = <1 2 4 0>;
158 compatible = "atmel,at91rm9200-clk-programmable";
159 #address-cells = <1>;
161 interrupt-parent = <&pmc>;
162 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
167 interrupts = <AT91_PMC_PCKRDY(0)>;
173 interrupts = <AT91_PMC_PCKRDY(1)>;
179 interrupts = <AT91_PMC_PCKRDY(2)>;
185 interrupts = <AT91_PMC_PCKRDY(3)>;
190 compatible = "atmel,at91rm9200-clk-system";
191 #address-cells = <1>;
232 compatible = "atmel,at91rm9200-clk-peripheral";
233 #address-cells = <1>;
247 pioCDE_clk: pioCDE_clk {
252 usart0_clk: usart0_clk {
257 usart1_clk: usart1_clk {
262 usart2_clk: usart2_clk {
322 macb0_clk: macb0_clk {
359 ramc0: ramc@ffffe200 {
360 compatible = "atmel,at91sam9260-sdramc";
361 reg = <0xffffe200 0x200>;
365 compatible = "atmel,at91sam9260-smc", "syscon";
366 reg = <0xffffe400 0x200>;
369 ramc1: ramc@ffffe800 {
370 compatible = "atmel,at91sam9260-sdramc";
371 reg = <0xffffe800 0x200>;
375 compatible = "atmel,at91sam9260-smc", "syscon";
376 reg = <0xffffea00 0x200>;
379 matrix: matrix@ffffec00 {
380 compatible = "atmel,at91sam9263-matrix", "syscon";
381 reg = <0xffffec00 0x200>;
384 pit: timer@fffffd30 {
385 compatible = "atmel,at91sam9260-pit";
386 reg = <0xfffffd30 0xf>;
387 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
391 tcb0: timer@fff7c000 {
392 compatible = "atmel,at91rm9200-tcb";
393 reg = <0xfff7c000 0x100>;
394 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
395 clocks = <&tcb_clk>, <&slow_xtal>;
396 clock-names = "t0_clk", "slow_clk";
400 compatible = "atmel,at91sam9260-rstc";
401 reg = <0xfffffd00 0x10>;
402 clocks = <&slow_xtal>;
406 compatible = "atmel,at91sam9260-shdwc";
407 reg = <0xfffffd10 0x10>;
408 clocks = <&slow_xtal>;
412 #address-cells = <1>;
414 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
415 ranges = <0xfffff200 0xfffff200 0xa00>;
419 0xfffffffb 0xffffe07f /* pioA */
420 0x0007ffff 0x39072fff /* pioB */
421 0xffffffff 0x3ffffff8 /* pioC */
422 0xfffffbff 0xffffffff /* pioD */
423 0xffe00fff 0xfbfcff00 /* pioE */
426 /* shared pinctrl settings */
428 pinctrl_dbgu: dbgu-0 {
430 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
431 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
436 pinctrl_usart0: usart0-0 {
438 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */
439 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
442 pinctrl_usart0_rts: usart0_rts-0 {
444 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */
447 pinctrl_usart0_cts: usart0_cts-0 {
449 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */
454 pinctrl_usart1: usart1-0 {
456 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
457 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */
460 pinctrl_usart1_rts: usart1_rts-0 {
462 <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */
465 pinctrl_usart1_cts: usart1_cts-0 {
467 <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */
472 pinctrl_usart2: usart2-0 {
474 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */
475 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */
478 pinctrl_usart2_rts: usart2_rts-0 {
480 <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */
483 pinctrl_usart2_cts: usart2_cts-0 {
485 <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */
490 pinctrl_nand: nand-0 {
492 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/
493 AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */
498 pinctrl_macb_rmii: macb_rmii-0 {
500 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
501 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
502 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
503 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
504 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
505 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
506 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
507 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
508 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
509 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
512 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
514 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
515 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
516 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */
517 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */
518 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */
519 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
520 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
521 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */
526 pinctrl_mmc0_clk: mmc0_clk-0 {
528 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */
531 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
533 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
534 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */
537 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
539 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
540 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
541 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
544 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
546 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
547 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */
550 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
552 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
553 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
554 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
559 pinctrl_mmc1_clk: mmc1_clk-0 {
561 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
564 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
566 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
567 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */
570 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
572 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
573 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
574 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
577 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
579 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */
580 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */
583 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
585 <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */
586 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
587 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */
592 pinctrl_ssc0_tx: ssc0_tx-0 {
594 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */
595 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */
596 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
599 pinctrl_ssc0_rx: ssc0_rx-0 {
601 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */
602 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */
603 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */
608 pinctrl_ssc1_tx: ssc1_tx-0 {
610 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
611 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
612 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
615 pinctrl_ssc1_rx: ssc1_rx-0 {
617 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
618 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
619 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
624 pinctrl_spi0: spi0-0 {
626 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */
627 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */
628 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */
633 pinctrl_spi1: spi1-0 {
635 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */
636 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */
637 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */
642 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
643 atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
646 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
647 atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
650 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
651 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
654 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
655 atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
658 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
659 atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
662 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
663 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
666 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
667 atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
670 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
671 atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
674 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
675 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
682 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */
683 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */
684 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */
685 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */
686 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */
687 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */
688 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */
689 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */
690 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */
691 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */
692 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */
693 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */
694 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */
695 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */
696 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */
697 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */
698 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */
699 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */
700 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */
701 AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */
702 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */
703 AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */
708 pinctrl_can_rx_tx: can_rx_tx {
710 <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* CANRX, conflicts with IRQ0 */
711 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* CANTX, conflicts with PCK0 */
716 pinctrl_ac97: ac97-0 {
718 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A AC97FS pin */
719 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A AC97CK pin */
720 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A AC97TX pin */
721 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A AC97RX pin */
725 pioA: gpio@fffff200 {
726 compatible = "atmel,at91rm9200-gpio";
727 reg = <0xfffff200 0x200>;
728 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
731 interrupt-controller;
732 #interrupt-cells = <2>;
733 clocks = <&pioA_clk>;
736 pioB: gpio@fffff400 {
737 compatible = "atmel,at91rm9200-gpio";
738 reg = <0xfffff400 0x200>;
739 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
742 interrupt-controller;
743 #interrupt-cells = <2>;
744 clocks = <&pioB_clk>;
747 pioC: gpio@fffff600 {
748 compatible = "atmel,at91rm9200-gpio";
749 reg = <0xfffff600 0x200>;
750 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
753 interrupt-controller;
754 #interrupt-cells = <2>;
755 clocks = <&pioCDE_clk>;
758 pioD: gpio@fffff800 {
759 compatible = "atmel,at91rm9200-gpio";
760 reg = <0xfffff800 0x200>;
761 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
764 interrupt-controller;
765 #interrupt-cells = <2>;
766 clocks = <&pioCDE_clk>;
769 pioE: gpio@fffffa00 {
770 compatible = "atmel,at91rm9200-gpio";
771 reg = <0xfffffa00 0x200>;
772 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
775 interrupt-controller;
776 #interrupt-cells = <2>;
777 clocks = <&pioCDE_clk>;
781 dbgu: serial@ffffee00 {
782 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
783 reg = <0xffffee00 0x200>;
784 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
785 pinctrl-names = "default";
786 pinctrl-0 = <&pinctrl_dbgu>;
788 clock-names = "usart";
792 usart0: serial@fff8c000 {
793 compatible = "atmel,at91sam9260-usart";
794 reg = <0xfff8c000 0x200>;
795 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
798 pinctrl-names = "default";
799 pinctrl-0 = <&pinctrl_usart0>;
800 clocks = <&usart0_clk>;
801 clock-names = "usart";
805 usart1: serial@fff90000 {
806 compatible = "atmel,at91sam9260-usart";
807 reg = <0xfff90000 0x200>;
808 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
811 pinctrl-names = "default";
812 pinctrl-0 = <&pinctrl_usart1>;
813 clocks = <&usart1_clk>;
814 clock-names = "usart";
818 usart2: serial@fff94000 {
819 compatible = "atmel,at91sam9260-usart";
820 reg = <0xfff94000 0x200>;
821 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
824 pinctrl-names = "default";
825 pinctrl-0 = <&pinctrl_usart2>;
826 clocks = <&usart2_clk>;
827 clock-names = "usart";
832 compatible = "atmel,at91rm9200-ssc";
833 reg = <0xfff98000 0x4000>;
834 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
835 pinctrl-names = "default";
836 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
837 clocks = <&ssc0_clk>;
838 clock-names = "pclk";
843 compatible = "atmel,at91rm9200-ssc";
844 reg = <0xfff9c000 0x4000>;
845 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
846 pinctrl-names = "default";
847 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
848 clocks = <&ssc1_clk>;
849 clock-names = "pclk";
853 ac97: sound@fffa0000 {
854 compatible = "atmel,at91sam9263-ac97c";
855 reg = <0xfffa0000 0x4000>;
856 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>;
857 pinctrl-names = "default";
858 pinctrl-0 = <&pinctrl_ac97>;
859 clocks = <&ac97_clk>;
860 clock-names = "ac97_clk";
864 macb0: ethernet@fffbc000 {
865 compatible = "cdns,at91sam9260-macb", "cdns,macb";
866 reg = <0xfffbc000 0x100>;
867 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
868 pinctrl-names = "default";
869 pinctrl-0 = <&pinctrl_macb_rmii>;
870 clocks = <&macb0_clk>, <&macb0_clk>;
871 clock-names = "hclk", "pclk";
875 usb1: gadget@fff78000 {
876 compatible = "atmel,at91sam9263-udc";
877 reg = <0xfff78000 0x4000>;
878 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
879 clocks = <&udc_clk>, <&udpck>;
880 clock-names = "pclk", "hclk";
885 compatible = "atmel,at91sam9260-i2c";
886 reg = <0xfff88000 0x100>;
887 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
888 #address-cells = <1>;
890 clocks = <&twi0_clk>;
895 compatible = "atmel,hsmci";
896 reg = <0xfff80000 0x600>;
897 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
898 pinctrl-names = "default";
899 #address-cells = <1>;
901 clocks = <&mci0_clk>;
902 clock-names = "mci_clk";
907 compatible = "atmel,hsmci";
908 reg = <0xfff84000 0x600>;
909 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
910 pinctrl-names = "default";
911 #address-cells = <1>;
913 clocks = <&mci1_clk>;
914 clock-names = "mci_clk";
919 compatible = "atmel,at91sam9260-wdt";
920 reg = <0xfffffd40 0x10>;
921 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
922 clocks = <&slow_xtal>;
923 atmel,watchdog-type = "hardware";
924 atmel,reset-type = "all";
930 #address-cells = <1>;
932 compatible = "atmel,at91rm9200-spi";
933 reg = <0xfffa4000 0x200>;
934 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
935 pinctrl-names = "default";
936 pinctrl-0 = <&pinctrl_spi0>;
937 clocks = <&spi0_clk>;
938 clock-names = "spi_clk";
943 #address-cells = <1>;
945 compatible = "atmel,at91rm9200-spi";
946 reg = <0xfffa8000 0x200>;
947 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
948 pinctrl-names = "default";
949 pinctrl-0 = <&pinctrl_spi1>;
950 clocks = <&spi1_clk>;
951 clock-names = "spi_clk";
956 compatible = "atmel,at91sam9rl-pwm";
957 reg = <0xfffb8000 0x300>;
958 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
961 clock-names = "pwm_clk";
966 compatible = "atmel,at91sam9263-can";
967 reg = <0xfffac000 0x300>;
968 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
969 pinctrl-names = "default";
970 pinctrl-0 = <&pinctrl_can_rx_tx>;
972 clock-names = "can_clk";
976 compatible = "atmel,at91sam9260-rtt";
977 reg = <0xfffffd20 0x10>;
978 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
979 clocks = <&slow_xtal>;
984 compatible = "atmel,at91sam9260-rtt";
985 reg = <0xfffffd50 0x10>;
986 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
987 clocks = <&slow_xtal>;
991 gpbr: syscon@fffffd60 {
992 compatible = "atmel,at91sam9260-gpbr", "syscon";
993 reg = <0xfffffd60 0x50>;
999 compatible = "atmel,at91sam9263-lcdc";
1000 reg = <0x00700000 0x1000>;
1001 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
1002 pinctrl-names = "default";
1003 pinctrl-0 = <&pinctrl_fb>;
1004 clocks = <&lcd_clk>, <&lcd_clk>;
1005 clock-names = "lcdc_clk", "hclk";
1006 status = "disabled";
1009 nand0: nand@40000000 {
1010 compatible = "atmel,at91rm9200-nand";
1011 #address-cells = <1>;
1013 reg = <0x40000000 0x10000000
1016 atmel,nand-addr-offset = <21>;
1017 atmel,nand-cmd-offset = <22>;
1018 pinctrl-names = "default";
1019 pinctrl-0 = <&pinctrl_nand>;
1020 gpios = <&pioA 22 GPIO_ACTIVE_HIGH
1021 &pioD 15 GPIO_ACTIVE_HIGH
1024 status = "disabled";
1027 usb0: ohci@00a00000 {
1028 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1029 reg = <0x00a00000 0x100000>;
1030 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
1031 clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
1032 clock-names = "ohci_clk", "hclk", "uhpck";
1033 status = "disabled";
1036 ebi0: ebi@10000000 {
1037 compatible = "atmel,at91sam9263-ebi0";
1038 #address-cells = <2>;
1040 atmel,smc = <&smc0>;
1041 atmel,matrix = <&matrix>;
1042 reg = <0x10000000 0x80000000>;
1043 ranges = <0x0 0x0 0x10000000 0x10000000
1044 0x1 0x0 0x20000000 0x10000000
1045 0x2 0x0 0x30000000 0x10000000
1046 0x3 0x0 0x40000000 0x10000000
1047 0x4 0x0 0x50000000 0x10000000
1048 0x5 0x0 0x60000000 0x10000000>;
1050 status = "disabled";
1052 nand_controller0: nand-controller {
1053 compatible = "atmel,at91sam9260-nand-controller";
1054 #address-cells = <2>;
1057 status = "disabled";
1061 ebi1: ebi@70000000 {
1062 compatible = "atmel,at91sam9263-ebi1";
1063 #address-cells = <2>;
1065 atmel,smc = <&smc1>;
1066 atmel,matrix = <&matrix>;
1067 reg = <0x80000000 0x20000000>;
1068 ranges = <0x0 0x0 0x80000000 0x10000000
1069 0x1 0x0 0x90000000 0x10000000>;
1071 status = "disabled";
1073 nand_controller1: nand-controller {
1074 compatible = "atmel,at91sam9260-nand-controller";
1075 #address-cells = <2>;
1078 status = "disabled";
1084 compatible = "i2c-gpio";
1085 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
1086 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
1088 i2c-gpio,sda-open-drain;
1089 i2c-gpio,scl-open-drain;
1090 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1091 #address-cells = <1>;
1093 status = "disabled";