2 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
4 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
6 * Licensed under GPLv2 only.
9 #include "skeleton.dtsi"
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
16 model = "Atmel AT91SAM9261 family SoC";
17 compatible = "atmel,at91sam9261";
18 interrupt-parent = <&aic>;
40 compatible = "arm,arm926ej-s";
46 reg = <0x20000000 0x08000000>;
50 main_xtal: main_xtal {
51 compatible = "fixed-clock";
53 clock-frequency = <0>;
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
59 clock-frequency = <0>;
64 compatible = "mmio-sram";
65 reg = <0x00300000 0x28000>;
69 compatible = "simple-bus";
75 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
76 reg = <0x00500000 0x100000>;
77 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
78 clocks = <&ohci_clk>, <&hclk0>, <&uhpck>;
79 clock-names = "ohci_clk", "hclk", "uhpck";
84 compatible = "atmel,at91sam9261-lcdc";
85 reg = <0x00600000 0x1000>;
86 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_fb>;
89 clocks = <&lcd_clk>, <&hclk1>;
90 clock-names = "lcdc_clk", "hclk";
95 compatible = "atmel,at91sam9261-ebi";
99 atmel,matrix = <&matrix>;
100 reg = <0x10000000 0x80000000>;
101 ranges = <0x0 0x0 0x10000000 0x10000000
102 0x1 0x0 0x20000000 0x10000000
103 0x2 0x0 0x30000000 0x10000000
104 0x3 0x0 0x40000000 0x10000000
105 0x4 0x0 0x50000000 0x10000000
106 0x5 0x0 0x60000000 0x10000000
107 0x6 0x0 0x70000000 0x10000000
108 0x7 0x0 0x80000000 0x10000000>;
112 nand_controller: nand-controller {
113 compatible = "atmel,at91sam9261-nand-controller";
114 #address-cells = <2>;
121 nand0: nand@40000000 {
122 compatible = "atmel,at91rm9200-nand";
123 #address-cells = <1>;
125 reg = <0x40000000 0x10000000>;
126 atmel,nand-addr-offset = <22>;
127 atmel,nand-cmd-offset = <21>;
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_nand>;
131 gpios = <&pioC 15 GPIO_ACTIVE_HIGH>,
132 <&pioC 14 GPIO_ACTIVE_HIGH>,
138 compatible = "simple-bus";
139 #address-cells = <1>;
143 tcb0: timer@fffa0000 {
144 compatible = "atmel,at91rm9200-tcb";
145 reg = <0xfffa0000 0x100>;
146 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
147 <18 IRQ_TYPE_LEVEL_HIGH 0>,
148 <19 IRQ_TYPE_LEVEL_HIGH 0>;
149 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>;
150 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
153 usb1: gadget@fffa4000 {
154 compatible = "atmel,at91sam9261-udc";
155 reg = <0xfffa4000 0x4000>;
156 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
157 clocks = <&udc_clk>, <&udpck>;
158 clock-names = "pclk", "hclk";
159 atmel,matrix = <&matrix>;
164 compatible = "atmel,hsmci";
165 reg = <0xfffa8000 0x600>;
166 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
169 #address-cells = <1>;
171 clocks = <&mci0_clk>;
172 clock-names = "mci_clk";
177 compatible = "atmel,at91sam9261-i2c";
178 pinctrl-names = "default";
179 pinctrl-0 = <&pinctrl_i2c_twi>;
180 reg = <0xfffac000 0x100>;
181 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
182 #address-cells = <1>;
184 clocks = <&twi0_clk>;
188 usart0: serial@fffb0000 {
189 compatible = "atmel,at91sam9260-usart";
190 reg = <0xfffb0000 0x200>;
191 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
194 pinctrl-names = "default";
195 pinctrl-0 = <&pinctrl_usart0>;
196 clocks = <&usart0_clk>;
197 clock-names = "usart";
201 usart1: serial@fffb4000 {
202 compatible = "atmel,at91sam9260-usart";
203 reg = <0xfffb4000 0x200>;
204 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
207 pinctrl-names = "default";
208 pinctrl-0 = <&pinctrl_usart1>;
209 clocks = <&usart1_clk>;
210 clock-names = "usart";
214 usart2: serial@fffb8000{
215 compatible = "atmel,at91sam9260-usart";
216 reg = <0xfffb8000 0x200>;
217 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
220 pinctrl-names = "default";
221 pinctrl-0 = <&pinctrl_usart2>;
222 clocks = <&usart2_clk>;
223 clock-names = "usart";
228 compatible = "atmel,at91rm9200-ssc";
229 reg = <0xfffbc000 0x4000>;
230 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
231 pinctrl-names = "default";
232 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
233 clocks = <&ssc0_clk>;
234 clock-names = "pclk";
239 compatible = "atmel,at91rm9200-ssc";
240 reg = <0xfffc0000 0x4000>;
241 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
242 pinctrl-names = "default";
243 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
244 clocks = <&ssc1_clk>;
245 clock-names = "pclk";
250 compatible = "atmel,at91rm9200-ssc";
251 reg = <0xfffc4000 0x4000>;
252 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
253 pinctrl-names = "default";
254 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
255 clocks = <&ssc2_clk>;
256 clock-names = "pclk";
261 #address-cells = <1>;
263 compatible = "atmel,at91rm9200-spi";
264 reg = <0xfffc8000 0x200>;
265 cs-gpios = <0>, <0>, <0>, <0>;
266 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
267 pinctrl-names = "default";
268 pinctrl-0 = <&pinctrl_spi0>;
269 clocks = <&spi0_clk>;
270 clock-names = "spi_clk";
275 #address-cells = <1>;
277 compatible = "atmel,at91rm9200-spi";
278 reg = <0xfffcc000 0x200>;
279 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
280 pinctrl-names = "default";
281 pinctrl-0 = <&pinctrl_spi1>;
282 clocks = <&spi1_clk>;
283 clock-names = "spi_clk";
287 ramc: ramc@ffffea00 {
288 compatible = "atmel,at91sam9260-sdramc";
289 reg = <0xffffea00 0x200>;
293 compatible = "atmel,at91sam9260-smc", "syscon";
294 reg = <0xffffec00 0x200>;
297 matrix: matrix@ffffee00 {
298 compatible = "atmel,at91sam9261-matrix", "syscon";
299 reg = <0xffffee00 0x200>;
302 aic: interrupt-controller@fffff000 {
303 #interrupt-cells = <3>;
304 compatible = "atmel,at91rm9200-aic";
305 interrupt-controller;
306 reg = <0xfffff000 0x200>;
307 atmel,external-irqs = <29 30 31>;
310 dbgu: serial@fffff200 {
311 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
312 reg = <0xfffff200 0x200>;
313 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
314 pinctrl-names = "default";
315 pinctrl-0 = <&pinctrl_dbgu>;
317 clock-names = "usart";
322 #address-cells = <1>;
324 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
325 ranges = <0xfffff400 0xfffff400 0x600>;
329 <0xffffffff 0xfffffff7>, /* pioA */
330 <0xffffffff 0xfffffff4>, /* pioB */
331 <0xffffffff 0xffffff07>; /* pioC */
333 /* shared pinctrl settings */
335 pinctrl_dbgu: dbgu-0 {
337 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
338 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
343 pinctrl_usart0: usart0-0 {
345 <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
346 <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
349 pinctrl_usart0_rts: usart0_rts-0 {
351 <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
354 pinctrl_usart0_cts: usart0_cts-0 {
356 <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
361 pinctrl_usart1: usart1-0 {
363 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
364 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
367 pinctrl_usart1_rts: usart1_rts-0 {
369 <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
372 pinctrl_usart1_cts: usart1_cts-0 {
374 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
379 pinctrl_usart2: usart2-0 {
381 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
382 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
385 pinctrl_usart2_rts: usart2_rts-0 {
387 <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
390 pinctrl_usart2_cts: usart2_cts-0 {
392 <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
397 pinctrl_nand: nand-0 {
399 <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
400 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
405 pinctrl_mmc0_clk: mmc0_clk-0 {
407 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
410 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
412 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
413 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
416 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
418 <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
419 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
420 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
425 pinctrl_ssc0_tx: ssc0_tx-0 {
427 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
428 <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
429 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
432 pinctrl_ssc0_rx: ssc0_rx-0 {
434 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
435 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
436 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
441 pinctrl_ssc1_tx: ssc1_tx-0 {
443 <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
444 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
445 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
448 pinctrl_ssc1_rx: ssc1_rx-0 {
450 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
451 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
452 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
457 pinctrl_ssc2_tx: ssc2_tx-0 {
459 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
460 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
461 <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
464 pinctrl_ssc2_rx: ssc2_rx-0 {
466 <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
467 <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
468 <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
473 pinctrl_spi0: spi0-0 {
475 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
476 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
477 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
482 pinctrl_spi1: spi1-0 {
484 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
485 <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
486 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
491 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
492 atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
495 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
496 atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
499 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
500 atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
503 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
504 atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
507 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
508 atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
511 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
512 atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
515 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
516 atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
519 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
520 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
523 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
524 atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
529 pinctrl_i2c_bitbang: i2c-0-bitbang {
531 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
532 <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
534 pinctrl_i2c_twi: i2c-0-twi {
536 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
537 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
544 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
545 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
546 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
547 <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
548 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
549 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
550 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
551 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
552 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
553 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
554 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
555 <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
556 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
557 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
558 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
559 <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
560 <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
561 <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
562 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
563 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
564 <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
568 pioA: gpio@fffff400 {
569 compatible = "atmel,at91rm9200-gpio";
570 reg = <0xfffff400 0x200>;
571 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
574 interrupt-controller;
575 #interrupt-cells = <2>;
576 clocks = <&pioA_clk>;
579 pioB: gpio@fffff600 {
580 compatible = "atmel,at91rm9200-gpio";
581 reg = <0xfffff600 0x200>;
582 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
585 interrupt-controller;
586 #interrupt-cells = <2>;
587 clocks = <&pioB_clk>;
590 pioC: gpio@fffff800 {
591 compatible = "atmel,at91rm9200-gpio";
592 reg = <0xfffff800 0x200>;
593 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
596 interrupt-controller;
597 #interrupt-cells = <2>;
598 clocks = <&pioC_clk>;
603 compatible = "atmel,at91rm9200-pmc", "syscon";
604 reg = <0xfffffc00 0x100>;
605 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
606 interrupt-controller;
607 #address-cells = <1>;
609 #interrupt-cells = <1>;
612 compatible = "atmel,at91rm9200-clk-main-osc";
614 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
615 clocks = <&main_xtal>;
619 compatible = "atmel,at91rm9200-clk-main";
621 clocks = <&main_osc>;
625 compatible = "atmel,at91rm9200-clk-pll";
627 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
630 atmel,clk-input-range = <1000000 32000000>;
631 #atmel,pll-clk-output-range-cells = <4>;
632 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
633 <190000000 240000000 2 1>;
637 compatible = "atmel,at91rm9200-clk-pll";
639 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
642 atmel,clk-input-range = <1000000 5000000>;
643 #atmel,pll-clk-output-range-cells = <4>;
644 atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
648 compatible = "atmel,at91rm9200-clk-master";
650 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
651 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
652 atmel,clk-output-range = <0 94000000>;
653 atmel,clk-divisors = <1 2 4 0>;
657 compatible = "atmel,at91rm9200-clk-usb";
659 atmel,clk-divisors = <1 2 4 0>;
664 compatible = "atmel,at91rm9200-clk-programmable";
665 #address-cells = <1>;
667 interrupt-parent = <&pmc>;
668 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
673 interrupts = <AT91_PMC_PCKRDY(0)>;
679 interrupts = <AT91_PMC_PCKRDY(1)>;
685 interrupts = <AT91_PMC_PCKRDY(2)>;
691 interrupts = <AT91_PMC_PCKRDY(3)>;
696 compatible = "atmel,at91rm9200-clk-system";
697 #address-cells = <1>;
750 compatible = "atmel,at91rm9200-clk-peripheral";
751 #address-cells = <1>;
770 usart0_clk: usart0_clk {
775 usart1_clk: usart1_clk {
780 usart2_clk: usart2_clk {
853 compatible = "atmel,at91sam9260-rstc";
854 reg = <0xfffffd00 0x10>;
855 clocks = <&slow_xtal>;
859 compatible = "atmel,at91sam9260-shdwc";
860 reg = <0xfffffd10 0x10>;
861 clocks = <&slow_xtal>;
864 pit: timer@fffffd30 {
865 compatible = "atmel,at91sam9260-pit";
866 reg = <0xfffffd30 0xf>;
867 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
872 compatible = "atmel,at91sam9260-rtt";
873 reg = <0xfffffd20 0x10>;
874 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
875 clocks = <&slow_xtal>;
880 compatible = "atmel,at91sam9260-wdt";
881 reg = <0xfffffd40 0x10>;
882 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
883 clocks = <&slow_xtal>;
887 gpbr: syscon@fffffd50 {
888 compatible = "atmel,at91sam9260-gpbr", "syscon";
889 reg = <0xfffffd50 0x10>;
896 compatible = "i2c-gpio";
897 pinctrl-names = "default";
898 pinctrl-0 = <&pinctrl_i2c_bitbang>;
899 gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
900 <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
901 i2c-gpio,sda-open-drain;
902 i2c-gpio,scl-open-drain;
903 i2c-gpio,delay-us = <2>; /* ~100 kHz */
904 #address-cells = <1>;