1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for Marvell Armada 370 Reference Design board
6 * Copied from arch/arm/boot/dts/armada-370-db.dts
8 * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
10 * Note: this Device Tree assumes that the bootloader has remapped the
11 * internal registers to 0xf1000000 (instead of the default
12 * 0xd0000000). The 0xf1000000 is the default used by the recent,
13 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
14 * boards were delivered with an older version of the bootloader that
15 * left internal registers mapped at 0xd0000000. If you are in this
16 * situation, you should either update your bootloader (preferred
17 * solution) or the below Device Tree should be adjusted.
21 #include <dt-bindings/input/input.h>
22 #include <dt-bindings/interrupt-controller/irq.h>
23 #include <dt-bindings/leds/common.h>
24 #include <dt-bindings/gpio/gpio.h>
25 #include "armada-370.dtsi"
28 model = "Marvell Armada 370 Reference Design";
29 compatible = "marvell,a370-rd", "marvell,armada370", "marvell,armada-370-xp";
32 stdout-path = "serial0:115200n8";
36 device_type = "memory";
37 reg = <0x00000000 0x20000000>; /* 512 MB */
41 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
42 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
43 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
60 pinctrl-0 = <&ge1_rgmii_pins>;
61 pinctrl-names = "default";
63 phy-mode = "rgmii-id";
71 pinctrl-0 = <&sdio_pins1>;
72 pinctrl-names = "default";
74 /* No CD or WP GPIOs */
87 compatible = "gpio-keys";
89 label = "Software Button";
90 linux,code = <KEY_POWER>;
91 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
96 compatible = "gpio-fan";
97 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
98 gpio-fan,speed-map = <0 0 3000 1>;
99 pinctrl-0 = <&fan_pins>;
100 pinctrl-names = "default";
104 compatible = "gpio-leds";
105 pinctrl-names = "default";
106 pinctrl-0 = <&led_pins>;
109 label = "370rd:green:sw";
110 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
111 default-state = "keep";
121 /* Internal mini-PCIe connector */
127 /* Internal mini-PCIe connector */
135 pinctrl-0 = <&mdio_pins>;
136 pinctrl-names = "default";
137 phy0: ethernet-phy@0 {
140 #address-cells = <1>;
145 color = <LED_COLOR_ID_WHITE>;
146 function = LED_FUNCTION_WAN;
147 default-state = "keep";
153 compatible = "marvell,mv88e6085";
154 #address-cells = <1>;
157 interrupt-controller;
158 #interrupt-cells = <2>;
161 #address-cells = <1>;
187 phy-mode = "rgmii-id";
196 #address-cells = <1>;
199 switchphy0: switchphy@0 {
201 interrupt-parent = <&switch>;
202 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
205 switchphy1: switchphy@1 {
207 interrupt-parent = <&switch>;
208 interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
211 switchphy2: switchphy@2 {
213 interrupt-parent = <&switch>;
214 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
217 switchphy3: switchphy@3 {
219 interrupt-parent = <&switch>;
220 interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
229 marvell,pins = "mpp8";
230 marvell,function = "gpio";
234 marvell,pins = "mpp32";
235 marvell,function = "gpio";
244 label = "pxa3xx_nand-0";
246 marvell,nand-keep-config;
250 compatible = "fixed-partitions";
251 #address-cells = <1>;
260 reg = <0x800000 0x800000>;
263 label = "Filesystem";
264 reg = <0x1000000 0x3f000000>;