arch/arm/boot/dts/am43x-epos-evm.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
   4  */
   5
   6 /* AM43x EPOS EVM */
   7
   8 /dts-v1/;
   9
  10 #include "am4372.dtsi"
  11 #include <dt-bindings/pinctrl/am43xx.h>
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/pwm/pwm.h>
  14 #include <dt-bindings/sound/tlv320aic31xx-micbias.h>
  15
  16 / {
  17         model = "TI AM43x EPOS EVM";
  18         compatible = "ti,am43x-epos-evm","ti,am438x","ti,am43";
  19
  20         aliases {
  21                 display0 = &lcd0;
  22         };
  23
  24         chosen {
  25                 stdout-path = &uart0;
  26         };
  27
  28         vmmcsd_fixed: fixedregulator-sd {
  29                 compatible = "regulator-fixed";
  30                 regulator-name = "vmmcsd_fixed";
  31                 regulator-min-microvolt = <3300000>;
  32                 regulator-max-microvolt = <3300000>;
  33                 enable-active-high;
  34         };
  35
  36         vbat: fixedregulator0 {
  37                 compatible = "regulator-fixed";
  38                 regulator-name = "vbat";
  39                 regulator-min-microvolt = <5000000>;
  40                 regulator-max-microvolt = <5000000>;
  41                 regulator-boot-on;
  42         };
  43
  44         lcd0: display {
  45                 compatible = "osddisplays,osd070t1718-19ts", "panel-dpi";
  46                 label = "lcd";
  47
  48                 backlight = <&lcd_bl>;
  49
  50                 panel-timing {
  51                         clock-frequency = <33000000>;
  52                         hactive = <800>;
  53                         vactive = <480>;
  54                         hfront-porch = <210>;
  55                         hback-porch = <16>;
  56                         hsync-len = <30>;
  57                         vback-porch = <10>;
  58                         vfront-porch = <22>;
  59                         vsync-len = <13>;
  60                         hsync-active = <0>;
  61                         vsync-active = <0>;
  62                         de-active = <1>;
  63                         pixelclk-active = <1>;
  64                 };
  65
  66                 port {
  67                         lcd_in: endpoint {
  68                                 remote-endpoint = <&dpi_out>;
  69                         };
  70                 };
  71         };
  72
  73         matrix_keypad: matrix_keypad0 {
  74                 compatible = "gpio-matrix-keypad";
  75                 debounce-delay-ms = <5>;
  76                 col-scan-delay-us = <2>;
  77                 pinctrl-names = "default", "sleep";
  78                 pinctrl-0 = <&matrix_keypad_default>;
  79                 pinctrl-1 = <&matrix_keypad_sleep>;
  80                 wakeup-source;
  81
  82                 row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH         /* Bank0, pin12 */
  83                              &gpio0 13 GPIO_ACTIVE_HIGH         /* Bank0, pin13 */
  84                              &gpio0 14 GPIO_ACTIVE_HIGH         /* Bank0, pin14 */
  85                              &gpio0 15 GPIO_ACTIVE_HIGH>;       /* Bank0, pin15 */
  86
  87                 col-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH          /* Bank3, pin9 */
  88                              &gpio3 10 GPIO_ACTIVE_HIGH         /* Bank3, pin10 */
  89                              &gpio2 18 GPIO_ACTIVE_HIGH         /* Bank2, pin18 */
  90                              &gpio2 19 GPIO_ACTIVE_HIGH>;       /* Bank2, pin19 */
  91
  92                 linux,keymap = <0x00000201      /* P1 */
  93                         0x01000204      /* P4 */
  94                         0x02000207      /* P7 */
  95                         0x0300020a      /* NUMERIC_STAR */
  96                         0x00010202      /* P2 */
  97                         0x01010205      /* P5 */
  98                         0x02010208      /* P8 */
  99                         0x03010200      /* P0 */
 100                         0x00020203      /* P3 */
 101                         0x01020206      /* P6 */
 102                         0x02020209      /* P9 */
 103                         0x0302020b      /* NUMERIC_POUND */
 104                         0x00030067      /* UP */
 105                         0x0103006a      /* RIGHT */
 106                         0x0203006c      /* DOWN */
 107                         0x03030069>;    /* LEFT */
 108         };
 109
 110         lcd_bl: backlight {
 111                 compatible = "pwm-backlight";
 112                 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
 113                 brightness-levels = <0 51 53 56 62 75 101 152 255>;
 114                 default-brightness-level = <8>;
 115         };
 116
 117         sound0: sound0 {
 118                 compatible = "simple-audio-card";
 119                 simple-audio-card,name = "AM43-EPOS-EVM";
 120                 simple-audio-card,widgets =
 121                         "Microphone", "Microphone Jack",
 122                         "Headphone", "Headphone Jack",
 123                         "Speaker", "Speaker";
 124                 simple-audio-card,routing =
 125                         "MIC1LP", "Microphone Jack",
 126                         "MIC1RP", "Microphone Jack",
 127                         "MIC1LP", "MICBIAS",
 128                         "MIC1RP", "MICBIAS",
 129                         "Headphone Jack", "HPL",
 130                         "Headphone Jack", "HPR",
 131                         "Speaker", "SPL",
 132                         "Speaker", "SPR";
 133                 simple-audio-card,format = "dsp_b";
 134                 simple-audio-card,bitclock-master = <&sound0_master>;
 135                 simple-audio-card,frame-master = <&sound0_master>;
 136                 simple-audio-card,bitclock-inversion;
 137
 138                 simple-audio-card,cpu {
 139                         sound-dai = <&mcasp1>;
 140                         system-clock-frequency = <12000000>;
 141                 };
 142
 143                 sound0_master: simple-audio-card,codec {
 144                         sound-dai = <&tlv320aic3111>;
 145                         system-clock-frequency = <12000000>;
 146                 };
 147         };
 148
 149         audio_mstrclk: clock {
 150                 compatible = "fixed-clock";
 151                 #clock-cells = <0>;
 152                 clock-frequency = <12000000>;
 153         };
 154 };
 155
 156 &am43xx_pinmux {
 157                 pinctrl-names = "default";
 158                 pinctrl-0 = <&unused_pins>;
 159
 160                 unused_pins: unused_pins {
 161                         pinctrl-single,pins = <
 162                                 AM4372_IOPAD(0x848, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
 163                                 AM4372_IOPAD(0x850, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 164                                 AM4372_IOPAD(0x858, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 165                                 AM4372_IOPAD(0x860, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 166                                 AM4372_IOPAD(0x864, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 167                                 AM4372_IOPAD(0x868, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 168                                 AM4372_IOPAD(0x86c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 169                                 AM4372_IOPAD(0x878, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
 170                                 AM4372_IOPAD(0x908, DS0_PIN_INPUT_PULLDOWN | PIN_INPUT_PULLDOWN | MUX_MODE7)
 171                                 AM4372_IOPAD(0x91c, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
 172                                 AM4372_IOPAD(0x920, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 173                                 AM4372_IOPAD(0x9e0, DS0_PIN_INPUT_PULLDOWN | PIN_INPUT_PULLDOWN | MUX_MODE7)
 174                                 AM4372_IOPAD(0xA0c, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
 175                                 AM4372_IOPAD(0xA38, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 176                                 AM4372_IOPAD(0xA3c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 177                                 AM4372_IOPAD(0xA40, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 178                                 AM4372_IOPAD(0xA44, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 179                                 AM4372_IOPAD(0xA48, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 180                                 AM4372_IOPAD(0xA4c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 181                                 AM4372_IOPAD(0xA50, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 182                                 AM4372_IOPAD(0xA54, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 183                                 AM4372_IOPAD(0xA58, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 184                                 AM4372_IOPAD(0xA5c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 185                                 AM4372_IOPAD(0xA60, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 186                                 AM4372_IOPAD(0xA64, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
 187                                 AM4372_IOPAD(0xA68, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 188                                 AM4372_IOPAD(0xA6C, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 189                                 AM4372_IOPAD(0xA74, DS0_PIN_INPUT_PULLDOWN | PIN_INPUT_PULLDOWN | MUX_MODE7)
 190                                 AM4372_IOPAD(0xA78, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
 191                         >;
 192                 };
 193
 194                 cpsw_default: cpsw_default {
 195                         pinctrl-single,pins = <
 196                                 /* Slave 1 */
 197                                 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_crs.rmii1_crs */
 198                                 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxerr.rmii1_rxerr */
 199                                 AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* mii1_txen.rmii1_txen */
 200                                 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxdv.rmii1_rxdv */
 201                                 AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* mii1_txd1.rmii1_txd1 */
 202                                 AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* mii1_txd0.rmii1_txd0 */
 203                                 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxd1.rmii1_rxd1 */
 204                                 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxd0.rmii1_rxd0 */
 205                                 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* rmii1_refclk.rmii1_refclk */
 206                         >;
 207                 };
 208
 209                 cpsw_sleep: cpsw_sleep {
 210                         pinctrl-single,pins = <
 211                                 /* Slave 1 reset value */
 212                                 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 213                                 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
 214                                 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
 215                                 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
 216                                 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
 217                                 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
 218                                 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 219                                 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
 220                                 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
 221                         >;
 222                 };
 223
 224                 davinci_mdio_default: davinci_mdio_default {
 225                         pinctrl-single,pins = <
 226                                 /* MDIO */
 227                                 AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
 228                                 AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
 229                         >;
 230                 };
 231
 232                 davinci_mdio_sleep: davinci_mdio_sleep {
 233                         pinctrl-single,pins = <
 234                                 /* MDIO reset value */
 235                                 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
 236                                 AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 237                         >;
 238                 };
 239
 240                 i2c0_pins: pinmux_i2c0_pins {
 241                         pinctrl-single,pins = <
 242                                 AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* i2c0_sda.i2c0_sda */
 243                                 AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* i2c0_scl.i2c0_scl */
 244                         >;
 245                 };
 246
 247                 nand_flash_x8_default: nand_flash_x8_default {
 248                         pinctrl-single,pins = <
 249                                 AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_a0.SELQSPIorNAND/GPIO */
 250                                 AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad0.gpmc_ad0 */
 251                                 AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad1.gpmc_ad1 */
 252                                 AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad2.gpmc_ad2 */
 253                                 AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad3.gpmc_ad3 */
 254                                 AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
 255                                 AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
 256                                 AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
 257                                 AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
 258                                 AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_wait0.gpmc_wait0 */
 259                                 AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_wpn.gpmc_wpn */
 260                                 AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_csn0.gpmc_csn0  */
 261                                 AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)             /* gpmc_advn_ale.gpmc_advn_ale */
 262                                 AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)             /* gpmc_oen_ren.gpmc_oen_ren */
 263                                 AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)             /* gpmc_wen.gpmc_wen */
 264                                 AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_be0n_cle.gpmc_be0n_cle */
 265                         >;
 266                 };
 267
 268                 nand_flash_x8_sleep: nand_flash_x8_sleep {
 269                         pinctrl-single,pins = <
 270                                 AM4372_IOPAD(0x840, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
 271                                 AM4372_IOPAD(0x800, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
 272                                 AM4372_IOPAD(0x804, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
 273                                 AM4372_IOPAD(0x808, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
 274                                 AM4372_IOPAD(0x80c, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
 275                                 AM4372_IOPAD(0x810, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
 276                                 AM4372_IOPAD(0x814, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
 277                                 AM4372_IOPAD(0x818, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
 278                                 AM4372_IOPAD(0x81c, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
 279                                 AM4372_IOPAD(0x870, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
 280                                 AM4372_IOPAD(0x874, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
 281                                 AM4372_IOPAD(0x87c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
 282                                 AM4372_IOPAD(0x890, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
 283                                 AM4372_IOPAD(0x894, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
 284                                 AM4372_IOPAD(0x898, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
 285                                 AM4372_IOPAD(0x89c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
 286                         >;
 287                 };
 288
 289                 ecap0_pins_default: backlight_pins_default {
 290                         pinctrl-single,pins = <
 291                                 AM4372_IOPAD(0x964, MUX_MODE0)         /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
 292                         >;
 293                 };
 294
 295                 ecap0_pins_sleep: backlight_pins_sleep {
 296                         pinctrl-single,pins = <
 297                                 AM4372_IOPAD(0x964, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
 298                         >;
 299                 };
 300
 301                 i2c2_pins: pinmux_i2c2_pins {
 302                         pinctrl-single,pins = <
 303                                 AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8)    /* i2c2_sda.i2c2_sda */
 304                                 AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8)    /* i2c2_scl.i2c2_scl */
 305                         >;
 306                 };
 307
 308                 spi0_pins_default: pinmux_spi0_pins_default {
 309                         pinctrl-single,pins = <
 310                                 AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0)           /* spi0_clk.spi0_clk */
 311                                 AM4372_IOPAD(0x954, PIN_OUTPUT | MUX_MODE0)           /* spi0_d0.spi0_d0 */
 312                                 AM4372_IOPAD(0x958, PIN_INPUT | MUX_MODE0)           /* spi0_d1.spi0_d1 */
 313                                 AM4372_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE0)          /* spi0_cs0.spi0_cs0 */
 314                         >;
 315                 };
 316
 317                 spi0_pins_sleep: pinmux_spi0_pins_sleep {
 318                         pinctrl-single,pins = <
 319                                 AM4372_IOPAD(0x950, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
 320                                 AM4372_IOPAD(0x954, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
 321                                 AM4372_IOPAD(0x958, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
 322                                 AM4372_IOPAD(0x95c, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
 323                         >;
 324                 };
 325
 326                 spi1_pins_default: pinmux_spi1_pins_default {
 327                         pinctrl-single,pins = <
 328                                 AM4372_IOPAD(0x990, PIN_INPUT | MUX_MODE3)           /* mcasp0_aclkx.spi1_clk */
 329                                 AM4372_IOPAD(0x994, PIN_OUTPUT | MUX_MODE3)           /* mcasp0_fsx.spi1_d0 */
 330                                 AM4372_IOPAD(0x998, PIN_INPUT | MUX_MODE3)           /* mcasp0_axr0.spi1_d1 */
 331                                 AM4372_IOPAD(0x99c, PIN_OUTPUT | MUX_MODE3)          /* mcasp0_ahclkr.spi1_cs0 */
 332                         >;
 333                 };
 334
 335                 spi1_pins_sleep: pinmux_spi1_pins_sleep {
 336                         pinctrl-single,pins = <
 337                                 AM4372_IOPAD(0x990, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
 338                                 AM4372_IOPAD(0x994, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
 339                                 AM4372_IOPAD(0x998, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
 340                                 AM4372_IOPAD(0x99c, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
 341                         >;
 342                 };
 343
 344                 mmc1_pins_default: pinmux_mmc1_pins_default {
 345                         pinctrl-single,pins = <
 346                                 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
 347                         >;
 348                 };
 349
 350                 mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
 351                         pinctrl-single,pins = <
 352                                 AM4372_IOPAD(0x960, DS0_PIN_OUTPUT_PULLUP | PIN_INPUT | MUX_MODE7)
 353                         >;
 354                 };
 355
 356                 matrix_keypad_default: matrix_keypad_default {
 357                         pinctrl-single,pins = <
 358                                  AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE7)          /* mii1_tx_clk.gpio3_9 */
 359                                  AM4372_IOPAD(0x930, PIN_OUTPUT | MUX_MODE7)          /* mii1_rx_clk.gpio3_10 */
 360                                  AM4372_IOPAD(0x934, PIN_OUTPUT | MUX_MODE7)          /* mii1_rxd3.gpio2_18 */
 361                                  AM4372_IOPAD(0x938, PIN_OUTPUT | MUX_MODE7)          /* mii1_rxd2.gpio2_19 */
 362                                  AM4372_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE7)  /* uart1_ctsn.gpio0_12 */
 363                                  AM4372_IOPAD(0x97C, PIN_INPUT_PULLDOWN | MUX_MODE7)  /* uart1_rtsn.gpio0_13 */
 364                                  AM4372_IOPAD(0x980, PIN_INPUT_PULLDOWN | MUX_MODE7)  /* uart1_rxd.gpio0_14 */
 365                                  AM4372_IOPAD(0x984, PIN_INPUT_PULLDOWN | MUX_MODE7)  /* uart1_txd.gpio0_15 */
 366                         >;
 367                 };
 368
 369                 matrix_keypad_sleep: matrix_keypad_sleep {
 370                         pinctrl-single,pins = <
 371                                 AM4372_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE7)
 372                                 AM4372_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE7)
 373                                 AM4372_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE7)
 374                                 AM4372_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE7)
 375                                 AM4372_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE7)
 376                                 AM4372_IOPAD(0x97C, PIN_INPUT_PULLDOWN | MUX_MODE7)
 377                                 AM4372_IOPAD(0x980, PIN_INPUT_PULLDOWN | MUX_MODE7)
 378                                 AM4372_IOPAD(0x984, PIN_INPUT_PULLDOWN | MUX_MODE7)
 379                         >;
 380                 };
 381
 382                 qspi1_pins_default: qspi1_pins_default {
 383                         pinctrl-single,pins = <
 384                                 AM4372_IOPAD(0x87c, PIN_INPUT_PULLUP | MUX_MODE3)
 385                                 AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE2)
 386                                 AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3)
 387                                 AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3)
 388                                 AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3)
 389                                 AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3)
 390                         >;
 391                 };
 392
 393                 qspi1_pins_sleep: qspi1_pins_sleep {
 394                         pinctrl-single,pins = <
 395                                 AM4372_IOPAD(0x87c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
 396                                 AM4372_IOPAD(0x888, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
 397                                 AM4372_IOPAD(0x890, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
 398                                 AM4372_IOPAD(0x894, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
 399                                 AM4372_IOPAD(0x898, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
 400                                 AM4372_IOPAD(0x89c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
 401                         >;
 402                 };
 403
 404                 pixcir_ts_pins_default: pixcir_ts_pins_default {
 405                         pinctrl-single,pins = <
 406                                 AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7)       /* gpmc_a1.gpio1_17 */
 407                         >;
 408                 };
 409
 410                 pixcir_ts_pins_sleep: pixcir_ts_pins_sleep {
 411                         pinctrl-single,pins = <
 412                                 AM4372_IOPAD(0x844, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_a1.gpio1_17 */
 413                         >;
 414                 };
 415
 416                 hdq_pins: pinmux_hdq_pins {
 417                         pinctrl-single,pins = <
 418                                 AM4372_IOPAD(0xa34, PIN_INPUT_PULLUP | MUX_MODE1)    /* cam1_wen.hdq_gpio */
 419                         >;
 420                 };
 421
 422                 dss_pins: dss_pins {
 423                         pinctrl-single,pins = <
 424                                 AM4372_IOPAD(0x820, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
 425                                 AM4372_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE1)
 426                                 AM4372_IOPAD(0x828, PIN_OUTPUT_PULLUP | MUX_MODE1)
 427                                 AM4372_IOPAD(0x82c, PIN_OUTPUT_PULLUP | MUX_MODE1)
 428                                 AM4372_IOPAD(0x830, PIN_OUTPUT_PULLUP | MUX_MODE1)
 429                                 AM4372_IOPAD(0x834, PIN_OUTPUT_PULLUP | MUX_MODE1)
 430                                 AM4372_IOPAD(0x838, PIN_OUTPUT_PULLUP | MUX_MODE1)
 431                                 AM4372_IOPAD(0x83c, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
 432                                 AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
 433                                 AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
 434                                 AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
 435                                 AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
 436                                 AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
 437                                 AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
 438                                 AM4372_IOPAD(0x8B8, PIN_OUTPUT_PULLUP | MUX_MODE0)
 439                                 AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
 440                                 AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
 441                                 AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
 442                                 AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
 443                                 AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
 444                                 AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
 445                                 AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
 446                                 AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
 447                                 AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
 448                                 AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
 449                                 AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
 450                                 AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
 451                                 AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
 452                         >;
 453                 };
 454
 455                 display_mux_pins: display_mux_pins {
 456                         pinctrl-single,pins = <
 457                                 /* GPMC CLK -> GPIO 2_1 to select LCD / HDMI */
 458                                 AM4372_IOPAD(0x88C, PIN_OUTPUT_PULLUP | MUX_MODE7)
 459                         >;
 460                 };
 461
 462                 vpfe1_pins_default: vpfe1_pins_default {
 463                         pinctrl-single,pins = <
 464                                 AM4372_IOPAD(0x9cc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data9 mode 0 */
 465                                 AM4372_IOPAD(0x9d0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data8 mode 0 */
 466                                 AM4372_IOPAD(0x9d4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_hd mode 0 */
 467                                 AM4372_IOPAD(0x9d8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_vd mode 0 */
 468                                 AM4372_IOPAD(0x9dc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_pclk mode 0 */
 469                                 AM4372_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data0 mode 0 */
 470                                 AM4372_IOPAD(0x9ec, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data1 mode 0 */
 471                                 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data2 mode 0 */
 472                                 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data3 mode 0 */
 473                                 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data4 mode 0 */
 474                                 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data5 mode 0 */
 475                                 AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data6 mode 0 */
 476                                 AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data7 mode 0 */
 477                         >;
 478                 };
 479
 480                 vpfe1_pins_sleep: vpfe1_pins_sleep {
 481                         pinctrl-single,pins = <
 482                                 AM4372_IOPAD(0x9cc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 483                                 AM4372_IOPAD(0x9d0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 484                                 AM4372_IOPAD(0x9d4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 485                                 AM4372_IOPAD(0x9d8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 486                                 AM4372_IOPAD(0x9dc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 487                                 AM4372_IOPAD(0x9e8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 488                                 AM4372_IOPAD(0x9ec, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 489                                 AM4372_IOPAD(0x9f0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 490                                 AM4372_IOPAD(0x9f4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 491                                 AM4372_IOPAD(0x9f8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 492                                 AM4372_IOPAD(0x9fc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 493                                 AM4372_IOPAD(0xa00, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 494                                 AM4372_IOPAD(0xa04, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 495                         >;
 496                 };
 497
 498                 uart0_pins_default: uart0_pins_default {
 499                         pinctrl-single,pins = <
 500                                 AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */
 501                                 AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */
 502                                 AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
 503                                 AM4372_IOPAD(0x974, PIN_INPUT | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0)        /* uart0_txd.uart0_txd */
 504                         >;
 505                 };
 506
 507                 uart0_pins_sleep: uart0_pins_sleep {
 508                         pinctrl-single,pins = <
 509                                 AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 510                                 AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 511                                 AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0)
 512                                 AM4372_IOPAD(0x974, PIN_INPUT | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0)
 513                         >;
 514                 };
 515
 516                 usb2_phy1_default: usb2_phy1_default {
 517                         pinctrl-single,pins = <
 518                                 AM4372_IOPAD(0xac0, PIN_INPUT_PULLDOWN | MUX_MODE0)
 519                         >;
 520                 };
 521
 522                 usb2_phy1_sleep: usb2_phy1_sleep {
 523                         pinctrl-single,pins = <
 524                                 AM4372_IOPAD(0xac0, DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7)
 525                         >;
 526                 };
 527
 528                 usb2_phy2_default: usb2_phy2_default {
 529                         pinctrl-single,pins = <
 530                                 AM4372_IOPAD(0xac4, PIN_INPUT_PULLDOWN | MUX_MODE0)
 531                         >;
 532                 };
 533
 534                 usb2_phy2_sleep: usb2_phy2_sleep {
 535                         pinctrl-single,pins = <
 536                                 AM4372_IOPAD(0xac4, DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7)
 537                         >;
 538                 };
 539
 540                 mcasp1_pins: mcasp1_pins {
 541                         pinctrl-single,pins = <
 542                                 AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_ACLKR/MCASP1_ACLKX */
 543                                 AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_FSR/MCASP1_FSX */
 544                                 AM4372_IOPAD(0x9a8, PIN_OUTPUT_PULLDOWN | MUX_MODE3)/* MCASP0_AXR1/MCASP1_AXR0 */
 545                                 AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_AHCLKX/MCASP1_AXR1 */
 546                         >;
 547                 };
 548
 549                 mcasp1_sleep_pins: mcasp1_sleep_pins {
 550                         pinctrl-single,pins = <
 551                                 AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
 552                                 AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE7)
 553                                 AM4372_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7)
 554                                 AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7)
 555                         >;
 556                 };
 557 };
 558
 559 &mmc1 {
 560         status = "okay";
 561         vmmc-supply = <&vmmcsd_fixed>;
 562         bus-width = <4>;
 563         pinctrl-names = "default", "sleep";
 564         pinctrl-0 = <&mmc1_pins_default>;
 565         pinctrl-1 = <&mmc1_pins_sleep>;
 566         cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
 567 };
 568
 569 &mac {
 570         pinctrl-names = "default", "sleep";
 571         pinctrl-0 = <&cpsw_default>;
 572         pinctrl-1 = <&cpsw_sleep>;
 573         status = "okay";
 574         slaves = <1>;
 575 };
 576
 577 &davinci_mdio {
 578         pinctrl-names = "default", "sleep";
 579         pinctrl-0 = <&davinci_mdio_default>;
 580         pinctrl-1 = <&davinci_mdio_sleep>;
 581         status = "okay";
 582
 583         ethphy0: ethernet-phy@16 {
 584                 reg = <16>;
 585         };
 586 };
 587
 588 &cpsw_emac0 {
 589         phy-handle = <&ethphy0>;
 590         phy-mode = "rmii";
 591         phys = <&phy_gmii_sel 1 1>;
 592 };
 593
 594 &i2c0 {
 595         status = "okay";
 596         pinctrl-names = "default";
 597         pinctrl-0 = <&i2c0_pins>;
 598         clock-frequency = <400000>;
 599
 600         tps65218: tps65218@24 {
 601                 reg = <0x24>;
 602                 compatible = "ti,tps65218";
 603                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* NMIn */
 604                 interrupt-controller;
 605                 #interrupt-cells = <2>;
 606
 607                 dcdc1: regulator-dcdc1 {
 608                         regulator-name = "vdd_core";
 609                         regulator-min-microvolt = <912000>;
 610                         regulator-max-microvolt = <1144000>;
 611                         regulator-boot-on;
 612                         regulator-always-on;
 613                 };
 614
 615                 dcdc2: regulator-dcdc2 {
 616                         regulator-name = "vdd_mpu";
 617                         regulator-min-microvolt = <912000>;
 618                         regulator-max-microvolt = <1378000>;
 619                         regulator-boot-on;
 620                         regulator-always-on;
 621                 };
 622
 623                 dcdc3: regulator-dcdc3 {
 624                         regulator-name = "vdcdc3";
 625                         regulator-boot-on;
 626                         regulator-always-on;
 627                         regulator-state-mem {
 628                                 regulator-on-in-suspend;
 629                         };
 630                         regulator-state-disk {
 631                                 regulator-off-in-suspend;
 632                         };
 633                 };
 634
 635                 dcdc4: regulator-dcdc4 {
 636                         regulator-name = "vdcdc4";
 637                         regulator-min-microvolt = <3300000>;
 638                         regulator-max-microvolt = <3300000>;
 639                         regulator-boot-on;
 640                         regulator-always-on;
 641                 };
 642
 643                 dcdc5: regulator-dcdc5 {
 644                         regulator-name = "v1_0bat";
 645                         regulator-min-microvolt = <1000000>;
 646                         regulator-max-microvolt = <1000000>;
 647                         regulator-boot-on;
 648                         regulator-always-on;
 649                 };
 650
 651                 dcdc6: regulator-dcdc6 {
 652                         regulator-name = "v1_8bat";
 653                         regulator-min-microvolt = <1800000>;
 654                         regulator-max-microvolt = <1800000>;
 655                         regulator-boot-on;
 656                         regulator-always-on;
 657                 };
 658
 659                 ldo1: regulator-ldo1 {
 660                         regulator-min-microvolt = <1800000>;
 661                         regulator-max-microvolt = <1800000>;
 662                         regulator-boot-on;
 663                         regulator-always-on;
 664                 };
 665         };
 666
 667         at24@50 {
 668                 compatible = "atmel,24c256";
 669                 pagesize = <64>;
 670                 reg = <0x50>;
 671         };
 672
 673         pixcir_ts@5c {
 674                 compatible = "pixcir,pixcir_tangoc";
 675                 pinctrl-names = "default", "sleep";
 676                 pinctrl-0 = <&pixcir_ts_pins_default>;
 677                 pinctrl-1 = <&pixcir_ts_pins_sleep>;
 678
 679                 reg = <0x5c>;
 680                 interrupt-parent = <&gpio1>;
 681                 interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
 682
 683                 attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
 684
 685                 touchscreen-size-x = <1024>;
 686                 touchscreen-size-y = <600>;
 687         };
 688
 689         tlv320aic3111: tlv320aic3111@18 {
 690                 #sound-dai-cells = <0>;
 691                 compatible = "ti,tlv320aic3111";
 692                 reg = <0x18>;
 693                 status = "okay";
 694
 695                 ai31xx-micbias-vg = <MICBIAS_2_0V>;
 696
 697                 /* Regulators */
 698                 HPVDD-supply = <&dcdc4>; /* v3_3AUD -> V3_3D -> DCDC4 */
 699                 SPRVDD-supply = <&vbat>; /* vbat */
 700                 SPLVDD-supply = <&vbat>; /* vbat */
 701                 AVDD-supply = <&dcdc4>; /* v3_3AUD -> V3_3D -> DCDC4 */
 702                 IOVDD-supply = <&dcdc4>; /* V3_3D -> DCDC4 */
 703                 DVDD-supply = <&ldo1>; /* V1_8AUD -> V1_8D -> LDO1 */
 704         };
 705
 706         ov2659@30 {
 707                 compatible = "ovti,ov2659";
 708                 reg = <0x30>;
 709
 710                 clocks = <&audio_mstrclk>;
 711                 clock-names = "xvclk";
 712
 713                 port {
 714                         ov2659_1: endpoint {
 715                                 remote-endpoint = <&vpfe1_ep>;
 716                                 link-frequencies = /bits/ 64 <70000000>;
 717                         };
 718                 };
 719         };
 720 };
 721
 722 &i2c2 {
 723         pinctrl-names = "default";
 724         pinctrl-0 = <&i2c2_pins>;
 725         status = "okay";
 726 };
 727
 728 &gpio0 {
 729         status = "okay";
 730 };
 731
 732 &gpio1 {
 733         status = "okay";
 734 };
 735
 736 &gpio2 {
 737         pinctrl-names = "default";
 738         pinctrl-0 = <&display_mux_pins>;
 739         status = "okay";
 740
 741         p1 {
 742                 /*
 743                  * SelLCDorHDMI selects between display and audio paths:
 744                  * Low: HDMI display with audio via HDMI
 745                  * High: LCD display with analog audio via aic3111 codec
 746                  */
 747                 gpio-hog;
 748                 gpios = <1 GPIO_ACTIVE_HIGH>;
 749                 output-high;
 750                 line-name = "SelLCDorHDMI";
 751         };
 752 };
 753
 754 &gpio3 {
 755         status = "okay";
 756 };
 757
 758 &elm {
 759         status = "okay";
 760 };
 761
 762 &gpmc {
 763         status = "okay";        /* Disable QSPI when enabling GPMC (NAND) */
 764         pinctrl-names = "default", "sleep";
 765         pinctrl-0 = <&nand_flash_x8_default>;
 766         pinctrl-1 = <&nand_flash_x8_sleep>;
 767         ranges = <0 0 0x08000000 0x01000000>;   /* CS0 space. Min partition = 16MB */
 768         nand@0,0 {
 769                 compatible = "ti,omap2-nand";
 770                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
 771                 interrupt-parent = <&gpmc>;
 772                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 773                              <1 IRQ_TYPE_NONE>; /* termcount */
 774                 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>;  /* gpmc_wait0 */
 775                 ti,nand-xfer-type = "prefetch-dma";
 776                 ti,nand-ecc-opt = "bch16";
 777                 ti,elm-id = <&elm>;
 778                 nand-bus-width = <8>;
 779                 gpmc,device-width = <1>;
 780                 gpmc,sync-clk-ps = <0>;
 781                 gpmc,cs-on-ns = <0>;
 782                 gpmc,cs-rd-off-ns = <40>; /* tCEA + tCHZ + 1 */
 783                 gpmc,cs-wr-off-ns = <40>;
 784                 gpmc,adv-on-ns = <0>;  /* cs-on-ns */
 785                 gpmc,adv-rd-off-ns = <25>; /* min( tALH + tALS + 1) */
 786                 gpmc,adv-wr-off-ns = <25>; /* min( tALH + tALS + 1) */
 787                 gpmc,we-on-ns = <0>;   /* cs-on-ns */
 788                 gpmc,we-off-ns = <20>; /* we-on-time + tWP + 2 */
 789                 gpmc,oe-on-ns = <3>;  /* cs-on-ns + tRR + 2 */
 790                 gpmc,oe-off-ns = <30>; /* oe-on-ns + tRP + 2 */
 791                 gpmc,access-ns = <30>; /* tCEA + 4*/
 792                 gpmc,rd-cycle-ns = <40>;
 793                 gpmc,wr-cycle-ns = <40>;
 794                 gpmc,bus-turnaround-ns = <0>;
 795                 gpmc,cycle2cycle-delay-ns = <0>;
 796                 gpmc,clk-activation-ns = <0>;
 797                 gpmc,wr-access-ns = <40>;
 798                 gpmc,wr-data-mux-bus-ns = <0>;
 799                 /* MTD partition table */
 800                 /* All SPL-* partitions are sized to minimal length
 801                  * which can be independently programmable. For
 802                  * NAND flash this is equal to size of erase-block */
 803                 #address-cells = <1>;
 804                 #size-cells = <1>;
 805                 partition@0 {
 806                         label = "NAND.SPL";
 807                         reg = <0x00000000 0x00040000>;
 808                 };
 809                 partition@1 {
 810                         label = "NAND.SPL.backup1";
 811                         reg = <0x00040000 0x00040000>;
 812                 };
 813                 partition@2 {
 814                         label = "NAND.SPL.backup2";
 815                         reg = <0x00080000 0x00040000>;
 816                 };
 817                 partition@3 {
 818                         label = "NAND.SPL.backup3";
 819                         reg = <0x000C0000 0x00040000>;
 820                 };
 821                 partition@4 {
 822                         label = "NAND.u-boot-spl-os";
 823                         reg = <0x00100000 0x00080000>;
 824                 };
 825                 partition@5 {
 826                         label = "NAND.u-boot";
 827                         reg = <0x00180000 0x00100000>;
 828                 };
 829                 partition@6 {
 830                         label = "NAND.u-boot-env";
 831                         reg = <0x00280000 0x00040000>;
 832                 };
 833                 partition@7 {
 834                         label = "NAND.u-boot-env.backup1";
 835                         reg = <0x002C0000 0x00040000>;
 836                 };
 837                 partition@8 {
 838                         label = "NAND.kernel";
 839                         reg = <0x00300000 0x00700000>;
 840                 };
 841                 partition@9 {
 842                         label = "NAND.file-system";
 843                         reg = <0x00a00000 0x1f600000>;
 844                 };
 845         };
 846 };
 847
 848 &epwmss0 {
 849         status = "okay";
 850 };
 851
 852 &tscadc {
 853         status = "okay";
 854
 855         adc {
 856                 ti,adc-channels = <0 1 2 3 4 5 6 7>;
 857         };
 858 };
 859
 860 &ecap0 {
 861                 status = "okay";
 862                 pinctrl-names = "default", "sleep";
 863                 pinctrl-0 = <&ecap0_pins_default>;
 864                 pinctrl-1 = <&ecap0_pins_sleep>;
 865 };
 866
 867 &spi0 {
 868         status = "okay";
 869         pinctrl-names = "default", "sleep";
 870         pinctrl-0 = <&spi0_pins_default>;
 871         pinctrl-1 = <&spi0_pins_sleep>;
 872 };
 873
 874 &spi1 {
 875         status = "okay";
 876         pinctrl-names = "default", "sleep";
 877         pinctrl-0 = <&spi1_pins_default>;
 878         pinctrl-1 = <&spi1_pins_sleep>;
 879 };
 880
 881 &usb2_phy1 {
 882         status = "okay";
 883         pinctrl-names = "default", "sleep";
 884         pinctrl-0 = <&usb2_phy1_default>;
 885         pinctrl-1 = <&usb2_phy1_sleep>;
 886 };
 887
 888 &usb1 {
 889         dr_mode = "otg";
 890         status = "okay";
 891 };
 892
 893 &usb2_phy2 {
 894         status = "okay";
 895         pinctrl-names = "default", "sleep";
 896         pinctrl-0 = <&usb2_phy2_default>;
 897         pinctrl-1 = <&usb2_phy2_sleep>;
 898 };
 899
 900 &usb2 {
 901         dr_mode = "host";
 902         status = "okay";
 903 };
 904
 905 &qspi {
 906         status = "disabled";    /* Disable GPMC (NAND) when enabling QSPI */
 907         pinctrl-names = "default", "sleep";
 908         pinctrl-0 = <&qspi1_pins_default>;
 909         pinctrl-1 = <&qspi1_pins_sleep>;
 910
 911         spi-max-frequency = <48000000>;
 912         m25p80@0 {
 913                 compatible = "mx66l51235l";
 914                 spi-max-frequency = <48000000>;
 915                 reg = <0>;
 916                 spi-cpol;
 917                 spi-cpha;
 918                 spi-tx-bus-width = <1>;
 919                 spi-rx-bus-width = <4>;
 920                 #address-cells = <1>;
 921                 #size-cells = <1>;
 922
 923                 /* MTD partition table.
 924                  * The ROM checks the first 512KiB
 925                  * for a valid file to boot(XIP).
 926                  */
 927                 partition@0 {
 928                         label = "QSPI.U_BOOT";
 929                         reg = <0x00000000 0x000080000>;
 930                 };
 931                 partition@1 {
 932                         label = "QSPI.U_BOOT.backup";
 933                         reg = <0x00080000 0x00080000>;
 934                 };
 935                 partition@2 {
 936                         label = "QSPI.U-BOOT-SPL_OS";
 937                         reg = <0x00100000 0x00010000>;
 938                 };
 939                 partition@3 {
 940                         label = "QSPI.U_BOOT_ENV";
 941                         reg = <0x00110000 0x00010000>;
 942                 };
 943                 partition@4 {
 944                         label = "QSPI.U-BOOT-ENV.backup";
 945                         reg = <0x00120000 0x00010000>;
 946                 };
 947                 partition@5 {
 948                         label = "QSPI.KERNEL";
 949                         reg = <0x00130000 0x0800000>;
 950                 };
 951                 partition@6 {
 952                         label = "QSPI.FILESYSTEM";
 953                         reg = <0x00930000 0x36D0000>;
 954                 };
 955         };
 956 };
 957
 958 &hdq {
 959         status = "okay";
 960         pinctrl-names = "default";
 961         pinctrl-0 = <&hdq_pins>;
 962 };
 963
 964 &dss {
 965         status = "ok";
 966
 967         pinctrl-names = "default";
 968         pinctrl-0 = <&dss_pins>;
 969
 970         port {
 971                 dpi_out: endpoint {
 972                         remote-endpoint = <&lcd_in>;
 973                         data-lines = <24>;
 974                 };
 975         };
 976 };
 977
 978 &vpfe1 {
 979         status = "okay";
 980         pinctrl-names = "default", "sleep";
 981         pinctrl-0 = <&vpfe1_pins_default>;
 982         pinctrl-1 = <&vpfe1_pins_sleep>;
 983
 984         port {
 985                 vpfe1_ep: endpoint {
 986                         remote-endpoint = <&ov2659_1>;
 987                         ti,am437x-vpfe-interface = <0>;
 988                         bus-width = <8>;
 989                         hsync-active = <0>;
 990                         vsync-active = <0>;
 991                 };
 992         };
 993 };
 994
 995 &uart0 {
 996         status = "okay";
 997         pinctrl-names = "default", "sleep";
 998         pinctrl-0 = <&uart0_pins_default>;
 999         pinctrl-1 = <&uart0_pins_sleep>;
1000 };
1001
1002 &mcasp1 {
1003         #sound-dai-cells = <0>;
1004         pinctrl-names = "default", "sleep";
1005         pinctrl-0 = <&mcasp1_pins>;
1006         pinctrl-1 = <&mcasp1_sleep_pins>;
1007
1008         status = "okay";
1009
1010         op-mode = <0>;          /* MCASP_IIS_MODE */
1011         tdm-slots = <2>;
1012         /* 4 serializer */
1013         serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
1014                 1 2 0 0
1015         >;
1016         tx-num-evt = <32>;
1017         rx-num-evt = <32>;
1018 };
1019
1020 &mux_synctimer32k_ck {
1021         assigned-clocks = <&mux_synctimer32k_ck>;
1022         assigned-clock-parents = <&clkdiv32k_ick>;
1023 };
1024
1025 &cpu {
1026         cpu0-supply = <&dcdc2>;
1027 };