2 * Device Tree Source for AM4372 SoC
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include "skeleton.dtsi"
17 compatible = "ti,am4372", "ti,am43";
18 interrupt-parent = <&gic>;
26 ethernet0 = &cpsw_emac0;
27 ethernet1 = &cpsw_emac1;
34 compatible = "arm,cortex-a9";
38 clocks = <&dpll_mpu_ck>;
41 clock-latency = <300000>; /* From omap-cpufreq driver */
45 gic: interrupt-controller@48241000 {
46 compatible = "arm,cortex-a9-gic";
48 #interrupt-cells = <3>;
49 reg = <0x48241000 0x1000>,
53 l2-cache-controller@48242000 {
54 compatible = "arm,pl310-cache";
55 reg = <0x48242000 0x1000>;
60 am43xx_pinmux: pinmux@44e10800 {
61 compatible = "pinctrl-single";
62 reg = <0x44e10800 0x31c>;
65 pinctrl-single,register-width = <32>;
66 pinctrl-single,function-mask = <0xffffffff>;
70 compatible = "ti,am4372-l3-noc", "simple-bus";
74 ti,hwmods = "l3_main";
75 reg = <0x44000000 0x400000
77 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
78 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
81 compatible = "ti,am4-prcm";
82 reg = <0x44df0000 0x11000>;
89 prcm_clockdomains: clockdomains {
94 compatible = "ti,am4-scrm";
95 reg = <0x44e10000 0x2000>;
102 scrm_clockdomains: clockdomains {
106 edma: edma@49000000 {
107 compatible = "ti,edma3";
108 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
109 reg = <0x49000000 0x10000>,
111 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
112 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
113 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
116 ti,edma-regions = <4>;
117 ti,edma-slots = <256>;
120 uart0: serial@44e09000 {
121 compatible = "ti,am4372-uart","ti,omap2-uart";
122 reg = <0x44e09000 0x2000>;
123 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
127 uart1: serial@48022000 {
128 compatible = "ti,am4372-uart","ti,omap2-uart";
129 reg = <0x48022000 0x2000>;
130 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
135 uart2: serial@48024000 {
136 compatible = "ti,am4372-uart","ti,omap2-uart";
137 reg = <0x48024000 0x2000>;
138 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
143 uart3: serial@481a6000 {
144 compatible = "ti,am4372-uart","ti,omap2-uart";
145 reg = <0x481a6000 0x2000>;
146 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
151 uart4: serial@481a8000 {
152 compatible = "ti,am4372-uart","ti,omap2-uart";
153 reg = <0x481a8000 0x2000>;
154 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
159 uart5: serial@481aa000 {
160 compatible = "ti,am4372-uart","ti,omap2-uart";
161 reg = <0x481aa000 0x2000>;
162 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
167 mailbox: mailbox@480C8000 {
168 compatible = "ti,omap4-mailbox";
169 reg = <0x480C8000 0x200>;
170 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
171 ti,hwmods = "mailbox";
172 ti,mbox-num-users = <4>;
173 ti,mbox-num-fifos = <8>;
174 ti,mbox-names = "wkup_m3";
175 ti,mbox-data = <0 0 0 0>;
179 timer1: timer@44e31000 {
180 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
181 reg = <0x44e31000 0x400>;
182 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
184 ti,hwmods = "timer1";
187 timer2: timer@48040000 {
188 compatible = "ti,am4372-timer","ti,am335x-timer";
189 reg = <0x48040000 0x400>;
190 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
191 ti,hwmods = "timer2";
194 timer3: timer@48042000 {
195 compatible = "ti,am4372-timer","ti,am335x-timer";
196 reg = <0x48042000 0x400>;
197 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
198 ti,hwmods = "timer3";
202 timer4: timer@48044000 {
203 compatible = "ti,am4372-timer","ti,am335x-timer";
204 reg = <0x48044000 0x400>;
205 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
207 ti,hwmods = "timer4";
211 timer5: timer@48046000 {
212 compatible = "ti,am4372-timer","ti,am335x-timer";
213 reg = <0x48046000 0x400>;
214 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
216 ti,hwmods = "timer5";
220 timer6: timer@48048000 {
221 compatible = "ti,am4372-timer","ti,am335x-timer";
222 reg = <0x48048000 0x400>;
223 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
225 ti,hwmods = "timer6";
229 timer7: timer@4804a000 {
230 compatible = "ti,am4372-timer","ti,am335x-timer";
231 reg = <0x4804a000 0x400>;
232 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
234 ti,hwmods = "timer7";
238 timer8: timer@481c1000 {
239 compatible = "ti,am4372-timer","ti,am335x-timer";
240 reg = <0x481c1000 0x400>;
241 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
242 ti,hwmods = "timer8";
246 timer9: timer@4833d000 {
247 compatible = "ti,am4372-timer","ti,am335x-timer";
248 reg = <0x4833d000 0x400>;
249 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
250 ti,hwmods = "timer9";
254 timer10: timer@4833f000 {
255 compatible = "ti,am4372-timer","ti,am335x-timer";
256 reg = <0x4833f000 0x400>;
257 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
258 ti,hwmods = "timer10";
262 timer11: timer@48341000 {
263 compatible = "ti,am4372-timer","ti,am335x-timer";
264 reg = <0x48341000 0x400>;
265 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
266 ti,hwmods = "timer11";
270 counter32k: counter@44e86000 {
271 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
272 reg = <0x44e86000 0x40>;
273 ti,hwmods = "counter_32k";
277 compatible = "ti,am4372-rtc","ti,da830-rtc";
278 reg = <0x44e3e000 0x1000>;
279 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
280 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
286 compatible = "ti,am4372-wdt","ti,omap3-wdt";
287 reg = <0x44e35000 0x1000>;
288 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
289 ti,hwmods = "wd_timer2";
292 gpio0: gpio@44e07000 {
293 compatible = "ti,am4372-gpio","ti,omap4-gpio";
294 reg = <0x44e07000 0x1000>;
295 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
298 interrupt-controller;
299 #interrupt-cells = <2>;
304 gpio1: gpio@4804c000 {
305 compatible = "ti,am4372-gpio","ti,omap4-gpio";
306 reg = <0x4804c000 0x1000>;
307 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
310 interrupt-controller;
311 #interrupt-cells = <2>;
316 gpio2: gpio@481ac000 {
317 compatible = "ti,am4372-gpio","ti,omap4-gpio";
318 reg = <0x481ac000 0x1000>;
319 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
322 interrupt-controller;
323 #interrupt-cells = <2>;
328 gpio3: gpio@481ae000 {
329 compatible = "ti,am4372-gpio","ti,omap4-gpio";
330 reg = <0x481ae000 0x1000>;
331 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
334 interrupt-controller;
335 #interrupt-cells = <2>;
340 gpio4: gpio@48320000 {
341 compatible = "ti,am4372-gpio","ti,omap4-gpio";
342 reg = <0x48320000 0x1000>;
343 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
346 interrupt-controller;
347 #interrupt-cells = <2>;
352 gpio5: gpio@48322000 {
353 compatible = "ti,am4372-gpio","ti,omap4-gpio";
354 reg = <0x48322000 0x1000>;
355 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
358 interrupt-controller;
359 #interrupt-cells = <2>;
364 hwspinlock: spinlock@480ca000 {
365 compatible = "ti,omap4-hwspinlock";
366 reg = <0x480ca000 0x1000>;
367 ti,hwmods = "spinlock";
372 compatible = "ti,am4372-i2c","ti,omap4-i2c";
373 reg = <0x44e0b000 0x1000>;
374 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
376 #address-cells = <1>;
382 compatible = "ti,am4372-i2c","ti,omap4-i2c";
383 reg = <0x4802a000 0x1000>;
384 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
386 #address-cells = <1>;
392 compatible = "ti,am4372-i2c","ti,omap4-i2c";
393 reg = <0x4819c000 0x1000>;
394 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
396 #address-cells = <1>;
402 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
403 reg = <0x48030000 0x400>;
404 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
406 #address-cells = <1>;
412 compatible = "ti,omap4-hsmmc";
413 reg = <0x48060000 0x1000>;
416 ti,needs-special-reset;
419 dma-names = "tx", "rx";
420 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
425 compatible = "ti,omap4-hsmmc";
426 reg = <0x481d8000 0x1000>;
428 ti,needs-special-reset;
431 dma-names = "tx", "rx";
432 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
437 compatible = "ti,omap4-hsmmc";
438 reg = <0x47810000 0x1000>;
440 ti,needs-special-reset;
441 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
446 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
447 reg = <0x481a0000 0x400>;
448 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
450 #address-cells = <1>;
456 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
457 reg = <0x481a2000 0x400>;
458 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
460 #address-cells = <1>;
466 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
467 reg = <0x481a4000 0x400>;
468 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
470 #address-cells = <1>;
476 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
477 reg = <0x48345000 0x400>;
478 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
480 #address-cells = <1>;
485 mac: ethernet@4a100000 {
486 compatible = "ti,am4372-cpsw","ti,cpsw";
487 reg = <0x4a100000 0x800
489 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
490 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
491 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
492 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
493 #address-cells = <1>;
495 ti,hwmods = "cpgmac0";
497 cpdma_channels = <8>;
498 ale_entries = <1024>;
499 bd_ram_size = <0x2000>;
502 mac_control = <0x20>;
505 cpts_clock_mult = <0x80000000>;
506 cpts_clock_shift = <29>;
509 davinci_mdio: mdio@4a101000 {
510 compatible = "ti,am4372-mdio","ti,davinci_mdio";
511 reg = <0x4a101000 0x100>;
512 #address-cells = <1>;
514 ti,hwmods = "davinci_mdio";
515 bus_freq = <1000000>;
519 cpsw_emac0: slave@4a100200 {
520 /* Filled in by U-Boot */
521 mac-address = [ 00 00 00 00 00 00 ];
524 cpsw_emac1: slave@4a100300 {
525 /* Filled in by U-Boot */
526 mac-address = [ 00 00 00 00 00 00 ];
529 phy_sel: cpsw-phy-sel@44e10650 {
530 compatible = "ti,am43xx-cpsw-phy-sel";
531 reg= <0x44e10650 0x4>;
532 reg-names = "gmii-sel";
536 epwmss0: epwmss@48300000 {
537 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
538 reg = <0x48300000 0x10>;
539 #address-cells = <1>;
542 ti,hwmods = "epwmss0";
545 ecap0: ecap@48300100 {
546 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
548 reg = <0x48300100 0x80>;
553 ehrpwm0: ehrpwm@48300200 {
554 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
556 reg = <0x48300200 0x80>;
557 ti,hwmods = "ehrpwm0";
562 epwmss1: epwmss@48302000 {
563 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
564 reg = <0x48302000 0x10>;
565 #address-cells = <1>;
568 ti,hwmods = "epwmss1";
571 ecap1: ecap@48302100 {
572 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
574 reg = <0x48302100 0x80>;
579 ehrpwm1: ehrpwm@48302200 {
580 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
582 reg = <0x48302200 0x80>;
583 ti,hwmods = "ehrpwm1";
588 epwmss2: epwmss@48304000 {
589 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
590 reg = <0x48304000 0x10>;
591 #address-cells = <1>;
594 ti,hwmods = "epwmss2";
597 ecap2: ecap@48304100 {
598 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
600 reg = <0x48304100 0x80>;
605 ehrpwm2: ehrpwm@48304200 {
606 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
608 reg = <0x48304200 0x80>;
609 ti,hwmods = "ehrpwm2";
614 epwmss3: epwmss@48306000 {
615 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
616 reg = <0x48306000 0x10>;
617 #address-cells = <1>;
620 ti,hwmods = "epwmss3";
623 ehrpwm3: ehrpwm@48306200 {
624 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
626 reg = <0x48306200 0x80>;
627 ti,hwmods = "ehrpwm3";
632 epwmss4: epwmss@48308000 {
633 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
634 reg = <0x48308000 0x10>;
635 #address-cells = <1>;
638 ti,hwmods = "epwmss4";
641 ehrpwm4: ehrpwm@48308200 {
642 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
644 reg = <0x48308200 0x80>;
645 ti,hwmods = "ehrpwm4";
650 epwmss5: epwmss@4830a000 {
651 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
652 reg = <0x4830a000 0x10>;
653 #address-cells = <1>;
656 ti,hwmods = "epwmss5";
659 ehrpwm5: ehrpwm@4830a200 {
660 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
662 reg = <0x4830a200 0x80>;
663 ti,hwmods = "ehrpwm5";
668 sham: sham@53100000 {
669 compatible = "ti,omap5-sham";
671 reg = <0x53100000 0x300>;
674 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
678 compatible = "ti,omap4-aes";
680 reg = <0x53501000 0xa0>;
681 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
684 dma-names = "tx", "rx";
688 compatible = "ti,omap4-des";
690 reg = <0x53701000 0xa0>;
691 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
694 dma-names = "tx", "rx";
697 mcasp0: mcasp@48038000 {
698 compatible = "ti,am33xx-mcasp-audio";
699 ti,hwmods = "mcasp0";
700 reg = <0x48038000 0x2000>,
701 <0x46000000 0x400000>;
702 reg-names = "mpu", "dat";
703 interrupts = <80>, <81>;
704 interrupt-names = "tx", "rx";
708 dma-names = "tx", "rx";
711 mcasp1: mcasp@4803C000 {
712 compatible = "ti,am33xx-mcasp-audio";
713 ti,hwmods = "mcasp1";
714 reg = <0x4803C000 0x2000>,
715 <0x46400000 0x400000>;
716 reg-names = "mpu", "dat";
717 interrupts = <82>, <83>;
718 interrupt-names = "tx", "rx";
722 dma-names = "tx", "rx";
726 compatible = "ti,am3352-elm";
727 reg = <0x48080000 0x2000>;
728 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
730 clocks = <&l4ls_gclk>;
735 gpmc: gpmc@50000000 {
736 compatible = "ti,am3352-gpmc";
738 clocks = <&l3s_gclk>;
740 reg = <0x50000000 0x2000>;
741 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
743 gpmc,num-waitpins = <2>;
744 #address-cells = <2>;
749 am43xx_control_usb2phy1: control-phy@44e10620 {
750 compatible = "ti,control-phy-usb2-am437";
751 reg = <0x44e10620 0x4>;
755 am43xx_control_usb2phy2: control-phy@0x44e10628 {
756 compatible = "ti,control-phy-usb2-am437";
757 reg = <0x44e10628 0x4>;
761 ocp2scp0: ocp2scp@483a8000 {
762 compatible = "ti,omap-ocp2scp";
763 #address-cells = <1>;
766 ti,hwmods = "ocp2scp0";
768 usb2_phy1: phy@483a8000 {
769 compatible = "ti,am437x-usb2";
770 reg = <0x483a8000 0x8000>;
771 ctrl-module = <&am43xx_control_usb2phy1>;
772 clocks = <&usb_phy0_always_on_clk32k>,
773 <&usb_otg_ss0_refclk960m>;
774 clock-names = "wkupclk", "refclk";
780 ocp2scp1: ocp2scp@483e8000 {
781 compatible = "ti,omap-ocp2scp";
782 #address-cells = <1>;
785 ti,hwmods = "ocp2scp1";
787 usb2_phy2: phy@483e8000 {
788 compatible = "ti,am437x-usb2";
789 reg = <0x483e8000 0x8000>;
790 ctrl-module = <&am43xx_control_usb2phy2>;
791 clocks = <&usb_phy1_always_on_clk32k>,
792 <&usb_otg_ss1_refclk960m>;
793 clock-names = "wkupclk", "refclk";
799 dwc3_1: omap_dwc3@48380000 {
800 compatible = "ti,am437x-dwc3";
801 ti,hwmods = "usb_otg_ss0";
802 reg = <0x48380000 0x10000>;
803 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
804 #address-cells = <1>;
810 compatible = "synopsys,dwc3";
811 reg = <0x48390000 0x17000>;
812 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
814 phy-names = "usb2-phy";
815 maximum-speed = "high-speed";
821 dwc3_2: omap_dwc3@483c0000 {
822 compatible = "ti,am437x-dwc3";
823 ti,hwmods = "usb_otg_ss1";
824 reg = <0x483c0000 0x10000>;
825 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
826 #address-cells = <1>;
832 compatible = "synopsys,dwc3";
833 reg = <0x483d0000 0x17000>;
834 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
836 phy-names = "usb2-phy";
837 maximum-speed = "high-speed";
843 qspi: qspi@47900000 {
844 compatible = "ti,am4372-qspi";
845 reg = <0x47900000 0x100>;
846 #address-cells = <1>;
849 interrupts = <0 138 0x4>;
855 compatible = "ti,am43xx-hdq";
856 reg = <0x48347000 0x1000>;
857 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
858 clocks = <&func_12m_clk>;
866 /include/ "am43xx-clocks.dtsi"